1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188
4189
4190
4191
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260
4261
4262
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352
4353
4354
4355
4356
4357
4358
4359
4360
4361
4362
4363
4364
4365
4366
4367
4368
4369
4370
4371
4372
4373
4374
4375
4376
4377
4378
4379
4380
4381
4382
4383
4384
4385
4386
4387
4388
4389
4390
4391
4392
4393
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416
4417
4418
4419
4420
4421
4422
4423
4424
4425
4426
4427
4428
4429
4430
4431
4432
4433
4434
4435
4436
4437
4438
4439
4440
4441
4442
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452
4453
4454
4455
4456
4457
4458
4459
4460
4461
4462
4463
4464
4465
4466
4467
4468
4469
4470
4471
4472
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482
4483
4484
4485
4486
4487
4488
4489
4490
4491
4492
4493
4494
4495
4496
4497
4498
4499
4500
4501
4502
4503
4504
4505
4506
4507
4508
4509
4510
4511
4512
4513
4514
4515
4516
4517
4518
4519
4520
4521
4522
4523
4524
4525
4526
4527
4528
4529
4530
4531
4532
4533
4534
4535
4536
4537
4538
4539
4540
4541
4542
4543
4544
4545
4546
4547
4548
4549
4550
4551
4552
4553
4554
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564
4565
4566
4567
4568
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592
4593
4594
4595
4596
4597
4598
4599
4600
4601
4602
4603
4604
4605
4606
4607
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620
4621
4622
4623
4624
4625
4626
4627
4628
4629
4630
4631
4632
4633
4634
4635
4636
4637
4638
4639
4640
4641
4642
4643
4644
4645
4646
4647
4648
4649
4650
4651
4652
4653
4654
4655
4656
4657
4658
4659
4660
4661
4662
4663
4664
4665
4666
4667
4668
4669
4670
4671
4672
4673
4674
4675
4676
4677
4678
4679
4680
4681
4682
4683
4684
4685
4686
4687
4688
4689
4690
4691
4692
4693
4694
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705
4706
4707
4708
4709
4710
4711
4712
4713
4714
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728
4729
4730
4731
4732
4733
4734
4735
4736
4737
4738
4739
4740
4741
4742
4743
4744
4745
4746
4747
4748
4749
4750
4751
4752
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762
4763
4764
4765
4766
4767
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777
4778
4779
4780
4781
4782
4783
4784
4785
4786
4787
4788
4789
4790
4791
4792
4793
4794
4795
4796
4797
4798
4799
4800
4801
4802
4803
4804
4805
4806
4807
4808
4809
4810
4811
4812
4813
4814
4815
4816
4817
4818
4819
4820
4821
4822
4823
4824
4825
4826
4827
4828
4829
4830
4831
4832
4833
4834
4835
4836
4837
4838
4839
4840
4841
4842
4843
4844
4845
4846
4847
4848
4849
4850
4851
4852
4853
4854
4855
4856
4857
4858
4859
4860
4861
4862
4863
4864
4865
4866
4867
4868
4869
4870
4871
4872
4873
4874
4875
4876
4877
4878
4879
4880
4881
4882
4883
4884
4885
4886
4887
4888
4889
4890
4891
4892
4893
4894
4895
4896
4897
4898
4899
4900
4901
4902
4903
4904
4905
4906
4907
4908
4909
4910
4911
4912
4913
4914
4915
4916
4917
4918
4919
4920
4921
4922
4923
4924
4925
4926
4927
4928
4929
4930
4931
4932
4933
4934
4935
4936
4937
4938
4939
4940
4941
4942
4943
4944
4945
4946
4947
4948
4949
4950
4951
4952
4953
4954
4955
4956
4957
4958
4959
|
/*
*
* ETRAX 100LX USB Host Controller Driver
*
* Copyright (C) 2005 - 2008 Axis Communications AB
*
* Author: Konrad Eriksson <konrad.eriksson@axis.se>
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/moduleparam.h>
#include <linux/spinlock.h>
#include <linux/usb.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/arch/dma.h>
#include <asm/arch/io_interface_mux.h>
#include "../core/hcd.h"
#include "../core/hub.h"
#include "hc-crisv10.h"
#include "hc-cris-dbg.h"
/***************************************************************************/
/***************************************************************************/
/* Host Controller settings */
/***************************************************************************/
/***************************************************************************/
#define VERSION "1.00-openwrt_diff"
#define COPYRIGHT "(c) 2005, 2006 Axis Communications AB"
#define DESCRIPTION "ETRAX 100LX USB Host Controller"
#define ETRAX_USB_HC_IRQ USB_HC_IRQ_NBR
#define ETRAX_USB_RX_IRQ USB_DMA_RX_IRQ_NBR
#define ETRAX_USB_TX_IRQ USB_DMA_TX_IRQ_NBR
/* Number of physical ports in Etrax 100LX */
#define USB_ROOT_HUB_PORTS 2
const char hc_name[] = "hc-crisv10";
const char product_desc[] = DESCRIPTION;
/* The number of epids is, among other things, used for pre-allocating
ctrl, bulk and isoc EP descriptors (one for each epid).
Assumed to be > 1 when initiating the DMA lists. */
#define NBR_OF_EPIDS 32
/* Support interrupt traffic intervals up to 128 ms. */
#define MAX_INTR_INTERVAL 128
/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP
table must be "invalid". By this we mean that we shouldn't care about epid
attentions for this epid, or at least handle them differently from epid
attentions for "valid" epids. This define determines which one to use
(don't change it). */
#define INVALID_EPID 31
/* A special epid for the bulk dummys. */
#define DUMMY_EPID 30
/* Module settings */
MODULE_DESCRIPTION(DESCRIPTION);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Konrad Eriksson <konrad.eriksson@axis.se>");
/* Module parameters */
/* 0 = No ports enabled
1 = Only port 1 enabled (on board ethernet on devboard)
2 = Only port 2 enabled (external connector on devboard)
3 = Both ports enabled
*/
static unsigned int ports = 3;
module_param(ports, uint, S_IRUGO);
MODULE_PARM_DESC(ports, "Bitmask indicating USB ports to use");
/***************************************************************************/
/***************************************************************************/
/* Shared global variables for this module */
/***************************************************************************/
/***************************************************************************/
/* EP descriptor lists for non period transfers. Must be 32-bit aligned. */
static volatile struct USB_EP_Desc TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
static volatile struct USB_EP_Desc TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
/* EP descriptor lists for period transfers. Must be 32-bit aligned. */
static volatile struct USB_EP_Desc TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
static volatile struct USB_SB_Desc TxIntrSB_zout __attribute__ ((aligned (4)));
static volatile struct USB_EP_Desc TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
static volatile struct USB_SB_Desc TxIsocSB_zout __attribute__ ((aligned (4)));
static volatile struct USB_SB_Desc TxIsocSBList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
/* After each enabled bulk EP IN we put two disabled EP descriptors with the eol flag set,
causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
in each frame. */
static volatile struct USB_EP_Desc TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
/* List of URB pointers, where each points to the active URB for a epid.
For Bulk, Ctrl and Intr this means which URB that currently is added to
DMA lists (Isoc URBs are all directly added to DMA lists). As soon as
URB has completed is the queue examined and the first URB in queue is
removed and moved to the activeUrbList while its state change to STARTED and
its transfer(s) gets added to DMA list (exception Isoc where URBs enter
state STARTED directly and added transfers added to DMA lists). */
static struct urb *activeUrbList[NBR_OF_EPIDS];
/* Additional software state info for each epid */
static struct etrax_epid epid_state[NBR_OF_EPIDS];
/* Timer handles for bulk traffic timer used to avoid DMA bug where DMA stops
even if there is new data waiting to be processed */
static struct timer_list bulk_start_timer = TIMER_INITIALIZER(NULL, 0, 0);
static struct timer_list bulk_eot_timer = TIMER_INITIALIZER(NULL, 0, 0);
/* We want the start timer to expire before the eot timer, because the former
might start traffic, thus making it unnecessary for the latter to time
out. */
#define BULK_START_TIMER_INTERVAL (HZ/50) /* 20 ms */
#define BULK_EOT_TIMER_INTERVAL (HZ/16) /* 60 ms */
/* Delay before a URB completion happen when it's scheduled to be delayed */
#define LATER_TIMER_DELAY (HZ/50) /* 20 ms */
/* Simplifying macros for checking software state info of a epid */
/* ----------------------------------------------------------------------- */
#define epid_inuse(epid) epid_state[epid].inuse
#define epid_out_traffic(epid) epid_state[epid].out_traffic
#define epid_isoc(epid) (epid_state[epid].type == PIPE_ISOCHRONOUS ? 1 : 0)
#define epid_intr(epid) (epid_state[epid].type == PIPE_INTERRUPT ? 1 : 0)
/***************************************************************************/
/***************************************************************************/
/* DEBUG FUNCTIONS */
/***************************************************************************/
/***************************************************************************/
/* Note that these functions are always available in their "__" variants,
for use in error situations. The "__" missing variants are controlled by
the USB_DEBUG_DESC/USB_DEBUG_URB macros. */
static void __dump_urb(struct urb* purb)
{
struct crisv10_urb_priv *urb_priv = purb->hcpriv;
int urb_num = -1;
if(urb_priv) {
urb_num = urb_priv->urb_num;
}
printk("\nURB:0x%x[%d]\n", (unsigned int)purb, urb_num);
printk("dev :0x%08lx\n", (unsigned long)purb->dev);
printk("pipe :0x%08x\n", purb->pipe);
printk("status :%d\n", purb->status);
printk("transfer_flags :0x%08x\n", purb->transfer_flags);
printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
printk("actual_length :%d\n", purb->actual_length);
printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
printk("start_frame :%d\n", purb->start_frame);
printk("number_of_packets :%d\n", purb->number_of_packets);
printk("interval :%d\n", purb->interval);
printk("error_count :%d\n", purb->error_count);
printk("context :0x%08lx\n", (unsigned long)purb->context);
printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
}
static void __dump_in_desc(volatile struct USB_IN_Desc *in)
{
printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
printk(" command : 0x%04x\n", in->command);
printk(" next : 0x%08lx\n", in->next);
printk(" buf : 0x%08lx\n", in->buf);
printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
printk(" status : 0x%04x\n\n", in->status);
}
static void __dump_sb_desc(volatile struct USB_SB_Desc *sb)
{
char tt = (sb->command & 0x30) >> 4;
char *tt_string;
switch (tt) {
case 0:
tt_string = "zout";
break;
case 1:
tt_string = "in";
break;
case 2:
tt_string = "out";
break;
case 3:
tt_string = "setup";
break;
default:
tt_string = "unknown (weird)";
}
printk(" USB_SB_Desc at 0x%08lx ", (unsigned long)sb);
printk(" command:0x%04x (", sb->command);
printk("rem:%d ", (sb->command & 0x3f00) >> 8);
printk("full:%d ", (sb->command & 0x40) >> 6);
printk("tt:%d(%s) ", tt, tt_string);
printk("intr:%d ", (sb->command & 0x8) >> 3);
printk("eot:%d ", (sb->command & 0x2) >> 1);
printk("eol:%d)", sb->command & 0x1);
printk(" sw_len:0x%04x(%d)", sb->sw_len, sb->sw_len);
printk(" next:0x%08lx", sb->next);
printk(" buf:0x%08lx\n", sb->buf);
}
static void __dump_ep_desc(volatile struct USB_EP_Desc *ep)
{
printk("USB_EP_Desc at 0x%08lx ", (unsigned long)ep);
printk(" command:0x%04x (", ep->command);
printk("ep_id:%d ", (ep->command & 0x1f00) >> 8);
printk("enable:%d ", (ep->command & 0x10) >> 4);
printk("intr:%d ", (ep->command & 0x8) >> 3);
printk("eof:%d ", (ep->command & 0x2) >> 1);
printk("eol:%d)", ep->command & 0x1);
printk(" hw_len:0x%04x(%d)", ep->hw_len, ep->hw_len);
printk(" next:0x%08lx", ep->next);
printk(" sub:0x%08lx\n", ep->sub);
}
static inline void __dump_ep_list(int pipe_type)
{
volatile struct USB_EP_Desc *ep;
volatile struct USB_EP_Desc *first_ep;
volatile struct USB_SB_Desc *sb;
switch (pipe_type)
{
case PIPE_BULK:
first_ep = &TxBulkEPList[0];
break;
case PIPE_CONTROL:
first_ep = &TxCtrlEPList[0];
break;
case PIPE_INTERRUPT:
first_ep = &TxIntrEPList[0];
break;
case PIPE_ISOCHRONOUS:
first_ep = &TxIsocEPList[0];
break;
default:
return;
}
ep = first_ep;
printk("\n\nDumping EP list...\n\n");
do {
__dump_ep_desc(ep);
/* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
sb = ep->sub ? phys_to_virt(ep->sub) : 0;
while (sb) {
__dump_sb_desc(sb);
sb = sb->next ? phys_to_virt(sb->next) : 0;
}
ep = (volatile struct USB_EP_Desc *)(phys_to_virt(ep->next));
} while (ep != first_ep);
}
static inline void __dump_ept_data(int epid)
{
unsigned long flags;
__u32 r_usb_ept_data;
if (epid < 0 || epid > 31) {
printk("Cannot dump ept data for invalid epid %d\n", epid);
return;
}
local_irq_save(flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
nop();
r_usb_ept_data = *R_USB_EPT_DATA;
local_irq_restore(flags);
printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
if (r_usb_ept_data == 0) {
/* No need for more detailed printing. */
return;
}
printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
}
static inline void __dump_ept_data_iso(int epid)
{
unsigned long flags;
__u32 ept_data;
if (epid < 0 || epid > 31) {
printk("Cannot dump ept data for invalid epid %d\n", epid);
return;
}
local_irq_save(flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
nop();
ept_data = *R_USB_EPT_DATA_ISO;
local_irq_restore(flags);
printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", ept_data, epid);
if (ept_data == 0) {
/* No need for more detailed printing. */
return;
}
printk(" valid : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, valid,
ept_data));
printk(" port : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, port,
ept_data));
printk(" error_code : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code,
ept_data));
printk(" max_len : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len,
ept_data));
printk(" ep : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, ep,
ept_data));
printk(" dev : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, dev,
ept_data));
}
static inline void __dump_ept_data_list(void)
{
int i;
printk("Dumping the whole R_USB_EPT_DATA list\n");
for (i = 0; i < 32; i++) {
__dump_ept_data(i);
}
}
static void debug_epid(int epid) {
int i;
if(epid_isoc(epid)) {
__dump_ept_data_iso(epid);
} else {
__dump_ept_data(epid);
}
printk("Bulk:\n");
for(i = 0; i < 32; i++) {
if(IO_EXTRACT(USB_EP_command, epid, TxBulkEPList[i].command) ==
epid) {
printk("%d: ", i); __dump_ep_desc(&(TxBulkEPList[i]));
}
}
printk("Ctrl:\n");
for(i = 0; i < 32; i++) {
if(IO_EXTRACT(USB_EP_command, epid, TxCtrlEPList[i].command) ==
epid) {
printk("%d: ", i); __dump_ep_desc(&(TxCtrlEPList[i]));
}
}
printk("Intr:\n");
for(i = 0; i < MAX_INTR_INTERVAL; i++) {
if(IO_EXTRACT(USB_EP_command, epid, TxIntrEPList[i].command) ==
epid) {
printk("%d: ", i); __dump_ep_desc(&(TxIntrEPList[i]));
}
}
printk("Isoc:\n");
for(i = 0; i < 32; i++) {
if(IO_EXTRACT(USB_EP_command, epid, TxIsocEPList[i].command) ==
epid) {
printk("%d: ", i); __dump_ep_desc(&(TxIsocEPList[i]));
}
}
__dump_ept_data_list();
__dump_ep_list(PIPE_INTERRUPT);
printk("\n\n");
}
char* hcd_status_to_str(__u8 bUsbStatus) {
static char hcd_status_str[128];
hcd_status_str[0] = '\0';
if(bUsbStatus & IO_STATE(R_USB_STATUS, ourun, yes)) {
strcat(hcd_status_str, "ourun ");
}
if(bUsbStatus & IO_STATE(R_USB_STATUS, perror, yes)) {
strcat(hcd_status_str, "perror ");
}
if(bUsbStatus & IO_STATE(R_USB_STATUS, device_mode, yes)) {
strcat(hcd_status_str, "device_mode ");
}
if(bUsbStatus & IO_STATE(R_USB_STATUS, host_mode, yes)) {
strcat(hcd_status_str, "host_mode ");
}
if(bUsbStatus & IO_STATE(R_USB_STATUS, started, yes)) {
strcat(hcd_status_str, "started ");
}
if(bUsbStatus & IO_STATE(R_USB_STATUS, running, yes)) {
strcat(hcd_status_str, "running ");
}
return hcd_status_str;
}
char* sblist_to_str(struct USB_SB_Desc* sb_desc) {
static char sblist_to_str_buff[128];
char tmp[32], tmp2[32];
sblist_to_str_buff[0] = '\0';
while(sb_desc != NULL) {
switch(IO_EXTRACT(USB_SB_command, tt, sb_desc->command)) {
case 0: sprintf(tmp, "zout"); break;
case 1: sprintf(tmp, "in"); break;
case 2: sprintf(tmp, "out"); break;
case 3: sprintf(tmp, "setup"); break;
}
sprintf(tmp2, "(%s %d)", tmp, sb_desc->sw_len);
strcat(sblist_to_str_buff, tmp2);
if(sb_desc->next != 0) {
sb_desc = phys_to_virt(sb_desc->next);
} else {
sb_desc = NULL;
}
}
return sblist_to_str_buff;
}
char* port_status_to_str(__u16 wPortStatus) {
static char port_status_str[128];
port_status_str[0] = '\0';
if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) {
strcat(port_status_str, "connected ");
}
if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) {
strcat(port_status_str, "enabled ");
}
if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, suspended, yes)) {
strcat(port_status_str, "suspended ");
}
if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes)) {
strcat(port_status_str, "reset ");
}
if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, speed, full)) {
strcat(port_status_str, "full-speed ");
} else {
strcat(port_status_str, "low-speed ");
}
return port_status_str;
}
char* endpoint_to_str(struct usb_endpoint_descriptor *ed) {
static char endpoint_to_str_buff[128];
char tmp[32];
int epnum = ed->bEndpointAddress & 0x0F;
int dir = ed->bEndpointAddress & 0x80;
int type = ed->bmAttributes & 0x03;
endpoint_to_str_buff[0] = '\0';
sprintf(endpoint_to_str_buff, "ep:%d ", epnum);
switch(type) {
case 0:
sprintf(tmp, " ctrl");
break;
case 1:
sprintf(tmp, " isoc");
break;
case 2:
sprintf(tmp, " bulk");
break;
case 3:
sprintf(tmp, " intr");
break;
}
strcat(endpoint_to_str_buff, tmp);
if(dir) {
sprintf(tmp, " in");
} else {
sprintf(tmp, " out");
}
strcat(endpoint_to_str_buff, tmp);
return endpoint_to_str_buff;
}
/* Debug helper functions for Transfer Controller */
char* pipe_to_str(unsigned int pipe) {
static char pipe_to_str_buff[128];
char tmp[64];
sprintf(pipe_to_str_buff, "dir:%s", str_dir(pipe));
sprintf(tmp, " type:%s", str_type(pipe));
strcat(pipe_to_str_buff, tmp);
sprintf(tmp, " dev:%d", usb_pipedevice(pipe));
strcat(pipe_to_str_buff, tmp);
sprintf(tmp, " ep:%d", usb_pipeendpoint(pipe));
strcat(pipe_to_str_buff, tmp);
return pipe_to_str_buff;
}
#define USB_DEBUG_DESC 1
#ifdef USB_DEBUG_DESC
#define dump_in_desc(x) __dump_in_desc(x)
#define dump_sb_desc(...) __dump_sb_desc(...)
#define dump_ep_desc(x) __dump_ep_desc(x)
#define dump_ept_data(x) __dump_ept_data(x)
#else
#define dump_in_desc(...) do {} while (0)
#define dump_sb_desc(...) do {} while (0)
#define dump_ep_desc(...) do {} while (0)
#endif
/* Uncomment this to enable massive function call trace
#define USB_DEBUG_TRACE */
#ifdef USB_DEBUG_TRACE
#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
#else
#define DBFENTER do {} while (0)
#define DBFEXIT do {} while (0)
#endif
#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
/* Most helpful debugging aid */
#define ASSERT(expr) ((void) ((expr) ? 0 : (err("assert failed at: %s %d",__FUNCTION__, __LINE__))))
/***************************************************************************/
/***************************************************************************/
/* Forward declarations */
/***************************************************************************/
/***************************************************************************/
void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg);
void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg);
void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg);
void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg);
void rh_port_status_change(__u16[]);
int rh_clear_port_feature(__u8, __u16);
int rh_set_port_feature(__u8, __u16);
static void rh_disable_port(unsigned int port);
static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
int timer);
static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
int mem_flags);
static void tc_free_epid(struct usb_host_endpoint *ep);
static int tc_allocate_epid(void);
static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status);
static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
int status);
static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
int mem_flags);
static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb);
static int crisv10_usb_check_bandwidth(struct usb_device *dev,struct urb *urb);
static void crisv10_usb_claim_bandwidth(
struct usb_device *dev, struct urb *urb, int bustime, int isoc);
static void crisv10_usb_release_bandwidth(
struct usb_hcd *hcd, int isoc, int bandwidth);
static inline struct urb *urb_list_first(int epid);
static inline void urb_list_add(struct urb *urb, int epid,
int mem_flags);
static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid);
static inline void urb_list_del(struct urb *urb, int epid);
static inline void urb_list_move_last(struct urb *urb, int epid);
static inline struct urb *urb_list_next(struct urb *urb, int epid);
int create_sb_for_urb(struct urb *urb, int mem_flags);
int init_intr_urb(struct urb *urb, int mem_flags);
static inline void etrax_epid_set(__u8 index, __u32 data);
static inline void etrax_epid_clear_error(__u8 index);
static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
__u8 toggle);
static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout);
static inline __u32 etrax_epid_get(__u8 index);
/* We're accessing the same register position in Etrax so
when we do full access the internal difference doesn't matter */
#define etrax_epid_iso_set(index, data) etrax_epid_set(index, data)
#define etrax_epid_iso_get(index) etrax_epid_get(index)
static void tc_dma_process_isoc_urb(struct urb *urb);
static void tc_dma_process_queue(int epid);
static void tc_dma_unlink_intr_urb(struct urb *urb);
static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc);
static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc);
static void tc_bulk_start_timer_func(unsigned long dummy);
static void tc_bulk_eot_timer_func(unsigned long dummy);
/*************************************************************/
/*************************************************************/
/* Host Controler Driver block */
/*************************************************************/
/*************************************************************/
/* HCD operations */
static irqreturn_t crisv10_hcd_top_irq(int irq, void*);
static int crisv10_hcd_reset(struct usb_hcd *);
static int crisv10_hcd_start(struct usb_hcd *);
static void crisv10_hcd_stop(struct usb_hcd *);
#ifdef CONFIG_PM
static int crisv10_hcd_suspend(struct device *, u32, u32);
static int crisv10_hcd_resume(struct device *, u32);
#endif /* CONFIG_PM */
static int crisv10_hcd_get_frame(struct usb_hcd *);
static int tc_urb_enqueue(struct usb_hcd *, struct urb *, gfp_t mem_flags);
static int tc_urb_dequeue(struct usb_hcd *, struct urb *, int);
static void tc_endpoint_disable(struct usb_hcd *, struct usb_host_endpoint *ep);
static int rh_status_data_request(struct usb_hcd *, char *);
static int rh_control_request(struct usb_hcd *, u16, u16, u16, char*, u16);
#ifdef CONFIG_PM
static int crisv10_hcd_hub_suspend(struct usb_hcd *);
static int crisv10_hcd_hub_resume(struct usb_hcd *);
#endif /* CONFIG_PM */
#ifdef CONFIG_USB_OTG
static int crisv10_hcd_start_port_reset(struct usb_hcd *, unsigned);
#endif /* CONFIG_USB_OTG */
/* host controller driver interface */
static const struct hc_driver crisv10_hc_driver =
{
.description = hc_name,
.product_desc = product_desc,
.hcd_priv_size = sizeof(struct crisv10_hcd),
/* Attaching IRQ handler manualy in probe() */
/* .irq = crisv10_hcd_irq, */
.flags = HCD_USB11,
/* called to init HCD and root hub */
.reset = crisv10_hcd_reset,
.start = crisv10_hcd_start,
/* cleanly make HCD stop writing memory and doing I/O */
.stop = crisv10_hcd_stop,
/* return current frame number */
.get_frame_number = crisv10_hcd_get_frame,
/* Manage i/o requests via the Transfer Controller */
.urb_enqueue = tc_urb_enqueue,
.urb_dequeue = tc_urb_dequeue,
/* hw synch, freeing endpoint resources that urb_dequeue can't */
.endpoint_disable = tc_endpoint_disable,
/* Root Hub support */
.hub_status_data = rh_status_data_request,
.hub_control = rh_control_request,
#ifdef CONFIG_PM
.hub_suspend = rh_suspend_request,
.hub_resume = rh_resume_request,
#endif /* CONFIG_PM */
#ifdef CONFIG_USB_OTG
.start_port_reset = crisv10_hcd_start_port_reset,
#endif /* CONFIG_USB_OTG */
};
/*
* conversion between pointers to a hcd and the corresponding
* crisv10_hcd
*/
static inline struct crisv10_hcd *hcd_to_crisv10_hcd(struct usb_hcd *hcd)
{
return (struct crisv10_hcd *) hcd->hcd_priv;
}
static inline struct usb_hcd *crisv10_hcd_to_hcd(struct crisv10_hcd *hcd)
{
return container_of((void *) hcd, struct usb_hcd, hcd_priv);
}
/* check if specified port is in use */
static inline int port_in_use(unsigned int port)
{
return ports & (1 << port);
}
/* number of ports in use */
static inline unsigned int num_ports(void)
{
unsigned int i, num = 0;
for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
if (port_in_use(i))
num++;
return num;
}
/* map hub port number to the port number used internally by the HC */
static inline unsigned int map_port(unsigned int port)
{
unsigned int i, num = 0;
for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
if (port_in_use(i))
if (++num == port)
return i;
return -1;
}
/* size of descriptors in slab cache */
#ifndef MAX
#define MAX(x, y) ((x) > (y) ? (x) : (y))
#endif
/******************************************************************/
/* Hardware Interrupt functions */
/******************************************************************/
/* Fast interrupt handler for HC */
static irqreturn_t crisv10_hcd_top_irq(int irq, void *vcd)
{
struct usb_hcd *hcd = vcd;
struct crisv10_irq_reg reg;
__u32 irq_mask;
unsigned long flags;
DBFENTER;
ASSERT(hcd != NULL);
reg.hcd = hcd;
/* Turn of other interrupts while handling these sensitive cases */
local_irq_save(flags);
/* Read out which interrupts that are flaged */
irq_mask = *R_USB_IRQ_MASK_READ;
reg.r_usb_irq_mask_read = irq_mask;
/* Reading R_USB_STATUS clears the ctl_status interrupt. Note that
R_USB_STATUS must be read before R_USB_EPID_ATTN since reading the latter
clears the ourun and perror fields of R_USB_STATUS. */
reg.r_usb_status = *R_USB_STATUS;
/* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn
interrupts. */
reg.r_usb_epid_attn = *R_USB_EPID_ATTN;
/* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
port_status interrupt. */
reg.r_usb_rh_port_status_1 = *R_USB_RH_PORT_STATUS_1;
reg.r_usb_rh_port_status_2 = *R_USB_RH_PORT_STATUS_2;
/* Reading R_USB_FM_NUMBER clears the sof interrupt. */
/* Note: the lower 11 bits contain the actual frame number, sent with each
sof. */
reg.r_usb_fm_number = *R_USB_FM_NUMBER;
/* Interrupts are handled in order of priority. */
if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
crisv10_hcd_port_status_irq(®);
}
if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
crisv10_hcd_epid_attn_irq(®);
}
if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
crisv10_hcd_ctl_status_irq(®);
}
if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
crisv10_hcd_isoc_eof_irq(®);
}
if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
/* Update/restart the bulk start timer since obviously the channel is
running. */
mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
/* Update/restart the bulk eot timer since we just received an bulk eot
interrupt. */
mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
/* Check for finished bulk transfers on epids */
check_finished_bulk_tx_epids(hcd, 0);
}
local_irq_restore(flags);
DBFEXIT;
return IRQ_HANDLED;
}
void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg) {
struct usb_hcd *hcd = reg->hcd;
struct crisv10_urb_priv *urb_priv;
int epid;
DBFENTER;
for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
if (test_bit(epid, (void *)®->r_usb_epid_attn)) {
struct urb *urb;
__u32 ept_data;
int error_code;
if (epid == DUMMY_EPID || epid == INVALID_EPID) {
/* We definitely don't care about these ones. Besides, they are
always disabled, so any possible disabling caused by the
epid attention interrupt is irrelevant. */
continue;
}
if(!epid_inuse(epid)) {
irq_err("Epid attention on epid:%d that isn't in use\n", epid);
printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
debug_epid(epid);
continue;
}
/* Note that although there are separate R_USB_EPT_DATA and
R_USB_EPT_DATA_ISO registers, they are located at the same address and
are of the same size. In other words, this read should be ok for isoc
also. */
ept_data = etrax_epid_get(epid);
error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, ept_data);
/* Get the active URB for this epid. We blatantly assume
that only this URB could have caused the epid attention. */
urb = activeUrbList[epid];
if (urb == NULL) {
irq_err("Attention on epid:%d error:%d with no active URB.\n",
epid, error_code);
printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
debug_epid(epid);
continue;
}
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
/* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
/* Isoc traffic doesn't have error_count_in/error_count_out. */
if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
(IO_EXTRACT(R_USB_EPT_DATA, error_count_in, ept_data) == 3 ||
IO_EXTRACT(R_USB_EPT_DATA, error_count_out, ept_data) == 3)) {
/* Check if URB allready is marked for late-finish, we can get
several 3rd error for Intr traffic when a device is unplugged */
if(urb_priv->later_data == NULL) {
/* 3rd error. */
irq_warn("3rd error for epid:%d (%s %s) URB:0x%x[%d]\n", epid,
str_dir(urb->pipe), str_type(urb->pipe),
(unsigned int)urb, urb_priv->urb_num);
tc_finish_urb_later(hcd, urb, -EPROTO);
}
} else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
irq_warn("Perror for epid:%d\n", epid);
printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
__dump_urb(urb);
debug_epid(epid);
if (!(ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
/* invalid ep_id */
panic("Perror because of invalid epid."
" Deconfigured too early?");
} else {
/* past eof1, near eof, zout transfer, setup transfer */
/* Dump the urb and the relevant EP descriptor. */
panic("Something wrong with DMA descriptor contents."
" Too much traffic inserted?");
}
} else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
/* buffer ourun */
printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
__dump_urb(urb);
debug_epid(epid);
panic("Buffer overrun/underrun for epid:%d. DMA too busy?", epid);
} else {
irq_warn("Attention on epid:%d (%s %s) with no error code\n", epid,
str_dir(urb->pipe), str_type(urb->pipe));
printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
__dump_urb(urb);
debug_epid(epid);
}
} else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
stall)) {
/* Not really a protocol error, just says that the endpoint gave
a stall response. Note that error_code cannot be stall for isoc. */
if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
panic("Isoc traffic cannot stall");
}
tc_dbg("Stall for epid:%d (%s %s) URB:0x%x\n", epid,
str_dir(urb->pipe), str_type(urb->pipe), (unsigned int)urb);
tc_finish_urb(hcd, urb, -EPIPE);
} else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
bus_error)) {
/* Two devices responded to a transaction request. Must be resolved
by software. FIXME: Reset ports? */
panic("Bus error for epid %d."
" Two devices responded to transaction request\n",
epid);
} else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
buffer_error)) {
/* DMA overrun or underrun. */
irq_warn("Buffer overrun/underrun for epid:%d (%s %s)\n", epid,
str_dir(urb->pipe), str_type(urb->pipe));
/* It seems that error_code = buffer_error in
R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
are the same error. */
tc_finish_urb(hcd, urb, -EPROTO);
} else {
irq_warn("Unknown attention on epid:%d (%s %s)\n", epid,
str_dir(urb->pipe), str_type(urb->pipe));
dump_ept_data(epid);
}
}
}
DBFEXIT;
}
void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg)
{
__u16 port_reg[USB_ROOT_HUB_PORTS];
DBFENTER;
port_reg[0] = reg->r_usb_rh_port_status_1;
port_reg[1] = reg->r_usb_rh_port_status_2;
rh_port_status_change(port_reg);
DBFEXIT;
}
void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg)
{
int epid;
struct urb *urb;
struct crisv10_urb_priv *urb_priv;
DBFENTER;
for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
/* Only check epids that are in use, is valid and has SB list */
if (!epid_inuse(epid) || epid == INVALID_EPID ||
TxIsocEPList[epid].sub == 0 || epid == DUMMY_EPID) {
/* Nothing here to see. */
continue;
}
ASSERT(epid_isoc(epid));
/* Get the active URB for this epid (if any). */
urb = activeUrbList[epid];
if (urb == 0) {
isoc_warn("Ignoring NULL urb for epid:%d\n", epid);
continue;
}
if(!epid_out_traffic(epid)) {
/* Sanity check. */
ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
if (urb_priv->urb_state == NOT_STARTED) {
/* If ASAP is not set and urb->start_frame is the current frame,
start the transfer. */
if (!(urb->transfer_flags & URB_ISO_ASAP) &&
(urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
/* EP should not be enabled if we're waiting for start_frame */
ASSERT((TxIsocEPList[epid].command &
IO_STATE(USB_EP_command, enable, yes)) == 0);
isoc_warn("Enabling isoc IN EP descr for epid %d\n", epid);
TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
/* This urb is now active. */
urb_priv->urb_state = STARTED;
continue;
}
}
}
}
DBFEXIT;
}
void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg)
{
struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(reg->hcd);
DBFENTER;
ASSERT(crisv10_hcd);
/* irq_dbg("ctr_status_irq, controller status: %s\n",
hcd_status_to_str(reg->r_usb_status));*/
/* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
list for the corresponding epid? */
if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
panic("USB controller got ourun.");
}
if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
/* Before, etrax_usb_do_intr_recover was called on this epid if it was
an interrupt pipe. I don't see how re-enabling all EP descriptors
will help if there was a programming error. */
panic("USB controller got perror.");
}
/* Keep track of USB Controller, if it's running or not */
if(reg->r_usb_status & IO_STATE(R_USB_STATUS, running, yes)) {
crisv10_hcd->running = 1;
} else {
crisv10_hcd->running = 0;
}
if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
/* We should never operate in device mode. */
panic("USB controller in device mode.");
}
/* Set the flag to avoid getting "Unlink after no-IRQ? Controller is probably
using the wrong IRQ" from hcd_unlink_urb() in drivers/usb/core/hcd.c */
set_bit(HCD_FLAG_SAW_IRQ, ®->hcd->flags);
DBFEXIT;
}
/******************************************************************/
/* Host Controller interface functions */
/******************************************************************/
static inline void crisv10_ready_wait(void) {
volatile int timeout = 10000;
/* Check the busy bit of USB controller in Etrax */
while((*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy)) &&
(timeout-- > 0));
}
/* reset host controller */
static int crisv10_hcd_reset(struct usb_hcd *hcd)
{
DBFENTER;
hcd_dbg(hcd, "reset\n");
/* Reset the USB interface. */
/*
*R_USB_COMMAND =
IO_STATE(R_USB_COMMAND, port_sel, nop) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
nop();
*/
DBFEXIT;
return 0;
}
/* start host controller */
static int crisv10_hcd_start(struct usb_hcd *hcd)
{
DBFENTER;
hcd_dbg(hcd, "start\n");
crisv10_ready_wait();
/* Start processing of USB traffic. */
*R_USB_COMMAND =
IO_STATE(R_USB_COMMAND, port_sel, nop) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
nop();
hcd->state = HC_STATE_RUNNING;
DBFEXIT;
return 0;
}
/* stop host controller */
static void crisv10_hcd_stop(struct usb_hcd *hcd)
{
DBFENTER;
hcd_dbg(hcd, "stop\n");
crisv10_hcd_reset(hcd);
DBFEXIT;
}
/* return the current frame number */
static int crisv10_hcd_get_frame(struct usb_hcd *hcd)
{
DBFENTER;
DBFEXIT;
return (*R_USB_FM_NUMBER & 0x7ff);
}
#ifdef CONFIG_USB_OTG
static int crisv10_hcd_start_port_reset(struct usb_hcd *hcd, unsigned port)
{
return 0; /* no-op for now */
}
#endif /* CONFIG_USB_OTG */
/******************************************************************/
/* Root Hub functions */
/******************************************************************/
/* root hub status */
static const struct usb_hub_status rh_hub_status =
{
.wHubStatus = 0,
.wHubChange = 0,
};
/* root hub descriptor */
static const u8 rh_hub_descr[] =
{
0x09, /* bDescLength */
0x29, /* bDescriptorType */
USB_ROOT_HUB_PORTS, /* bNbrPorts */
0x00, /* wHubCharacteristics */
0x00,
0x01, /* bPwrOn2pwrGood */
0x00, /* bHubContrCurrent */
0x00, /* DeviceRemovable */
0xff /* PortPwrCtrlMask */
};
/* Actual holder of root hub status*/
struct crisv10_rh rh;
/* Initialize root hub data structures (called from dvdrv_hcd_probe()) */
int rh_init(void) {
int i;
/* Reset port status flags */
for (i = 0; i < USB_ROOT_HUB_PORTS; i++) {
rh.wPortChange[i] = 0;
rh.wPortStatusPrev[i] = 0;
}
return 0;
}
#define RH_FEAT_MASK ((1<<USB_PORT_FEAT_CONNECTION)|\
(1<<USB_PORT_FEAT_ENABLE)|\
(1<<USB_PORT_FEAT_SUSPEND)|\
(1<<USB_PORT_FEAT_RESET))
/* Handle port status change interrupt (called from bottom part interrupt) */
void rh_port_status_change(__u16 port_reg[]) {
int i;
__u16 wChange;
for(i = 0; i < USB_ROOT_HUB_PORTS; i++) {
/* Xor out changes since last read, masked for important flags */
wChange = (port_reg[i] & RH_FEAT_MASK) ^ rh.wPortStatusPrev[i];
/* Or changes together with (if any) saved changes */
rh.wPortChange[i] |= wChange;
/* Save new status */
rh.wPortStatusPrev[i] = port_reg[i];
if(wChange) {
rh_dbg("Interrupt port_status change port%d: %s Current-status:%s\n", i+1,
port_status_to_str(wChange),
port_status_to_str(port_reg[i]));
}
}
}
/* Construct port status change bitmap for the root hub */
static int rh_status_data_request(struct usb_hcd *hcd, char *buf)
{
struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
unsigned int i;
DBFENTER;
/*
* corresponds to hub status change EP (USB 2.0 spec section 11.13.4)
* return bitmap indicating ports with status change
*/
*buf = 0;
spin_lock(&crisv10_hcd->lock);
for (i = 1; i <= crisv10_hcd->num_ports; i++) {
if (rh.wPortChange[map_port(i)]) {
*buf |= (1 << i);
rh_dbg("rh_status_data_request, change on port %d: %s Current Status: %s\n", i,
port_status_to_str(rh.wPortChange[map_port(i)]),
port_status_to_str(rh.wPortStatusPrev[map_port(i)]));
}
}
spin_unlock(&crisv10_hcd->lock);
DBFEXIT;
return *buf == 0 ? 0 : 1;
}
/* Handle a control request for the root hub (called from hcd_driver) */
static int rh_control_request(struct usb_hcd *hcd,
u16 typeReq,
u16 wValue,
u16 wIndex,
char *buf,
u16 wLength) {
struct crisv10_hcd *crisv10_hcd = hcd_to_crisv10_hcd(hcd);
int retval = 0;
int len;
DBFENTER;
switch (typeReq) {
case GetHubDescriptor:
rh_dbg("GetHubDescriptor\n");
len = min_t(unsigned int, sizeof rh_hub_descr, wLength);
memcpy(buf, rh_hub_descr, len);
buf[2] = crisv10_hcd->num_ports;
break;
case GetHubStatus:
rh_dbg("GetHubStatus\n");
len = min_t(unsigned int, sizeof rh_hub_status, wLength);
memcpy(buf, &rh_hub_status, len);
break;
case GetPortStatus:
if (!wIndex || wIndex > crisv10_hcd->num_ports)
goto error;
rh_dbg("GetportStatus, port:%d change:%s status:%s\n", wIndex,
port_status_to_str(rh.wPortChange[map_port(wIndex)]),
port_status_to_str(rh.wPortStatusPrev[map_port(wIndex)]));
*(u16 *) buf = cpu_to_le16(rh.wPortStatusPrev[map_port(wIndex)]);
*(u16 *) (buf + 2) = cpu_to_le16(rh.wPortChange[map_port(wIndex)]);
break;
case SetHubFeature:
rh_dbg("SetHubFeature\n");
case ClearHubFeature:
rh_dbg("ClearHubFeature\n");
switch (wValue) {
case C_HUB_OVER_CURRENT:
case C_HUB_LOCAL_POWER:
rh_warn("Not implemented hub request:%d \n", typeReq);
/* not implemented */
break;
default:
goto error;
}
break;
case SetPortFeature:
if (!wIndex || wIndex > crisv10_hcd->num_ports)
goto error;
if(rh_set_port_feature(map_port(wIndex), wValue))
goto error;
break;
case ClearPortFeature:
if (!wIndex || wIndex > crisv10_hcd->num_ports)
goto error;
if(rh_clear_port_feature(map_port(wIndex), wValue))
goto error;
break;
default:
rh_warn("Unknown hub request: %d\n", typeReq);
error:
retval = -EPIPE;
}
DBFEXIT;
return retval;
}
int rh_set_port_feature(__u8 bPort, __u16 wFeature) {
__u8 bUsbCommand = 0;
__u8 reset_cnt;
switch(wFeature) {
case USB_PORT_FEAT_RESET:
rh_dbg("SetPortFeature: reset\n");
if (rh.wPortStatusPrev[bPort] &
IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes))
{
__u8 restart_controller = 0;
if ( (rh.wPortStatusPrev[0] &
IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
(rh.wPortStatusPrev[1] &
IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, yes)) )
{
/* Both ports is enabled. The USB controller will not change state. */
restart_controller = 0;
}
else
{
/* Only ports is enabled. The USB controller will change state and
must be restarted. */
restart_controller = 1;
}
/*
In ETRAX 100LX it's not possible to reset an enabled root hub port.
The workaround is to disable and enable the port before resetting it.
Disabling the port can, if both ports are disabled at once, cause the
USB controller to change state to HOST_MODE state.
The USB controller state transition causes a lot of unwanted
interrupts that must be avoided.
Disabling the USB controller status and port status interrupts before
disabling/resetting the port stops these interrupts.
These actions are performed:
1. Disable USB controller status and port status interrupts.
2. Disable the port
3. Wait for the port to be disabled.
4. Enable the port.
5. Wait for the port to be enabled.
6. Reset the port.
7. Wait for for the reset to end.
8. Wait for the USB controller entering started state.
9. Order the USB controller to running state.
10. Wait for the USB controller reaching running state.
11. Clear all interrupts generated during the disable/enable/reset
procedure.
12. Enable the USB controller status and port status interrupts.
*/
/* 1. Disable USB controller status and USB port status interrupts. */
*R_USB_IRQ_MASK_CLR = IO_STATE(R_USB_IRQ_MASK_CLR, ctl_status, clr);
__asm__ __volatile__ (" nop");
*R_USB_IRQ_MASK_CLR = IO_STATE(R_USB_IRQ_MASK_CLR, port_status, clr);
__asm__ __volatile__ (" nop");
{
/* Since an root hub port reset shall be 50 ms and the ETRAX 100LX
root hub port reset is 10 ms we must perform 5 port resets to
achieve a proper root hub port reset. */
for (reset_cnt = 0; reset_cnt < 5; reset_cnt ++)
{
rh_dbg("Disable Port %d\n", bPort + 1);
/* 2. Disable the port*/
if (bPort == 0)
{
*R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
}
else
{
*R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
}
/* 3. Wait for the port to be disabled. */
while ( (bPort == 0) ?
*R_USB_RH_PORT_STATUS_1 &
IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes) :
*R_USB_RH_PORT_STATUS_2 &
IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, yes) ) {}
rh_dbg("Port %d is disabled. Enable it!\n", bPort + 1);
/* 4. Enable the port. */
if (bPort == 0)
{
*R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
}
else
{
*R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
}
/* 5. Wait for the port to be enabled again. */
while (!( (bPort == 0) ?
*R_USB_RH_PORT_STATUS_1 &
IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes) :
*R_USB_RH_PORT_STATUS_2 &
IO_STATE(R_USB_RH_PORT_STATUS_2, connected, yes) ) ) {}
rh_dbg("Port %d is enabled.\n", bPort + 1);
/* 6. Reset the port */
crisv10_ready_wait();
*R_USB_COMMAND =
( (bPort == 0) ?
IO_STATE(R_USB_COMMAND, port_sel, port1):
IO_STATE(R_USB_COMMAND, port_sel, port2) ) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, busy, no) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
rh_dbg("Port %d is resetting.\n", bPort + 1);
/* 7. The USB specification says that we should wait for at least
10ms for device recover */
udelay(10500); /* 10,5ms blocking wait */
crisv10_ready_wait();
}
}
/* Check if the USB controller needs to be restarted. */
if (restart_controller)
{
/* 8. Wait for the USB controller entering started state. */
while (!(*R_USB_STATUS & IO_STATE(R_USB_STATUS, started, yes))) {}
/* 9. Order the USB controller to running state. */
crisv10_ready_wait();
*R_USB_COMMAND =
IO_STATE(R_USB_COMMAND, port_sel, nop) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, busy, no) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
/* 10. Wait for the USB controller reaching running state. */
while (!(*R_USB_STATUS & IO_STATE(R_USB_STATUS, running, yes))) {}
}
/* 11. Clear any controller or port satus interrupts before enabling
the interrupts. */
{
u16 dummy;
/* Clear the port status interrupt of the reset port. */
if (bPort == 0)
{
rh_dbg("Clearing port 1 interrupts\n");
dummy = *R_USB_RH_PORT_STATUS_1;
}
else
{
rh_dbg("Clearing port 2 interrupts\n");
dummy = *R_USB_RH_PORT_STATUS_2;
}
if (restart_controller)
{
/* The USB controller is restarted. Clear all interupts. */
rh_dbg("Clearing all interrupts\n");
dummy = *R_USB_STATUS;
dummy = *R_USB_RH_PORT_STATUS_1;
dummy = *R_USB_RH_PORT_STATUS_2;
}
}
/* 12. Enable USB controller status and USB port status interrupts. */
*R_USB_IRQ_MASK_SET = IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
__asm__ __volatile__ (" nop");
*R_USB_IRQ_MASK_SET = IO_STATE(R_USB_IRQ_MASK_SET, port_status, set);
__asm__ __volatile__ (" nop");
}
else
{
bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, reset);
/* Select which port via the port_sel field */
bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
/* Make sure the controller isn't busy. */
crisv10_ready_wait();
/* Send out the actual command to the USB controller */
*R_USB_COMMAND = bUsbCommand;
/* Wait a while for controller to first become started after port reset */
udelay(12000); /* 12ms blocking wait */
/* Make sure the controller isn't busy. */
crisv10_ready_wait();
/* If all enabled ports were disabled the host controller goes down into
started mode, so we need to bring it back into the running state.
(This is safe even if it's already in the running state.) */
*R_USB_COMMAND =
IO_STATE(R_USB_COMMAND, port_sel, nop) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
}
break;
case USB_PORT_FEAT_SUSPEND:
rh_dbg("SetPortFeature: suspend\n");
bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, suspend);
goto set;
break;
case USB_PORT_FEAT_POWER:
rh_dbg("SetPortFeature: power\n");
break;
case USB_PORT_FEAT_C_CONNECTION:
rh_dbg("SetPortFeature: c_connection\n");
break;
case USB_PORT_FEAT_C_RESET:
rh_dbg("SetPortFeature: c_reset\n");
break;
case USB_PORT_FEAT_C_OVER_CURRENT:
rh_dbg("SetPortFeature: c_over_current\n");
break;
set:
/* Select which port via the port_sel field */
bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
/* Make sure the controller isn't busy. */
crisv10_ready_wait();
/* Send out the actual command to the USB controller */
*R_USB_COMMAND = bUsbCommand;
break;
default:
rh_dbg("SetPortFeature: unknown feature\n");
return -1;
}
return 0;
}
int rh_clear_port_feature(__u8 bPort, __u16 wFeature) {
switch(wFeature) {
case USB_PORT_FEAT_ENABLE:
rh_dbg("ClearPortFeature: enable\n");
rh_disable_port(bPort);
break;
case USB_PORT_FEAT_SUSPEND:
rh_dbg("ClearPortFeature: suspend\n");
break;
case USB_PORT_FEAT_POWER:
rh_dbg("ClearPortFeature: power\n");
break;
case USB_PORT_FEAT_C_ENABLE:
rh_dbg("ClearPortFeature: c_enable\n");
goto clear;
case USB_PORT_FEAT_C_SUSPEND:
rh_dbg("ClearPortFeature: c_suspend\n");
goto clear;
case USB_PORT_FEAT_C_CONNECTION:
rh_dbg("ClearPortFeature: c_connection\n");
goto clear;
case USB_PORT_FEAT_C_OVER_CURRENT:
rh_dbg("ClearPortFeature: c_over_current\n");
goto clear;
case USB_PORT_FEAT_C_RESET:
rh_dbg("ClearPortFeature: c_reset\n");
goto clear;
clear:
rh.wPortChange[bPort] &= ~(1 << (wFeature - 16));
break;
default:
rh_dbg("ClearPortFeature: unknown feature\n");
return -1;
}
return 0;
}
#ifdef CONFIG_PM
/* Handle a suspend request for the root hub (called from hcd_driver) */
static int rh_suspend_request(struct usb_hcd *hcd)
{
return 0; /* no-op for now */
}
/* Handle a resume request for the root hub (called from hcd_driver) */
static int rh_resume_request(struct usb_hcd *hcd)
{
return 0; /* no-op for now */
}
#endif /* CONFIG_PM */
/* Wrapper function for workaround port disable registers in USB controller */
static void rh_disable_port(unsigned int port) {
volatile int timeout = 10000;
volatile char* usb_portx_disable;
switch(port) {
case 0:
usb_portx_disable = R_USB_PORT1_DISABLE;
break;
case 1:
usb_portx_disable = R_USB_PORT2_DISABLE;
break;
default:
/* Invalid port index */
return;
}
/* Set disable flag in special register */
*usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
/* Wait until not enabled anymore */
while((rh.wPortStatusPrev[port] &
IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
(timeout-- > 0));
/* clear disable flag in special register */
*usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
rh_info("Physical port %d disabled\n", port+1);
}
/******************************************************************/
/* Transfer Controller (TC) functions */
/******************************************************************/
/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it
dynamically?
To adjust it dynamically we would have to get an interrupt when we reach
the end of the rx descriptor list, or when we get close to the end, and
then allocate more descriptors. */
#define NBR_OF_RX_DESC 512
#define RX_DESC_BUF_SIZE 1024
#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
/* Local variables for Transfer Controller */
/* --------------------------------------- */
/* This is a circular (double-linked) list of the active urbs for each epid.
The head is never removed, and new urbs are linked onto the list as
urb_entry_t elements. Don't reference urb_list directly; use the wrapper
functions instead (which includes spin_locks) */
static struct list_head urb_list[NBR_OF_EPIDS];
/* Read about the need and usage of this lock in submit_ctrl_urb. */
/* Lock for URB lists for each EPID */
static spinlock_t urb_list_lock;
/* Lock for EPID array register (R_USB_EPT_x) in Etrax */
static spinlock_t etrax_epid_lock;
/* Lock for dma8 sub0 handling */
static spinlock_t etrax_dma8_sub0_lock;
/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be
cache aligned. */
static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
static volatile struct USB_IN_Desc RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
/* Pointers into RxDescList. */
static volatile struct USB_IN_Desc *myNextRxDesc;
static volatile struct USB_IN_Desc *myLastRxDesc;
/* A zout transfer makes a memory access at the address of its buf pointer,
which means that setting this buf pointer to 0 will cause an access to the
flash. In addition to this, setting sw_len to 0 results in a 16/32 bytes
(depending on DMA burst size) transfer.
Instead, we set it to 1, and point it to this buffer. */
static int zout_buffer[4] __attribute__ ((aligned (4)));
/* Cache for allocating new EP and SB descriptors. */
static struct kmem_cache *usb_desc_cache;
/* Cache for the data allocated in the isoc descr top half. */
static struct kmem_cache *isoc_compl_cache;
/* Cache for the data allocated when delayed finishing of URBs */
static struct kmem_cache *later_data_cache;
/* Counter to keep track of how many Isoc EP we have sat up. Used to enable
and disable iso_eof interrupt. We only need these interrupts when we have
Isoc data endpoints (consumes CPU cycles).
FIXME: This could be more fine granular, so this interrupt is only enabled
when we have a In Isoc URB not URB_ISO_ASAP flaged queued. */
static int isoc_epid_counter;
/* Protecting wrapper functions for R_USB_EPT_x */
/* -------------------------------------------- */
static inline void etrax_epid_set(__u8 index, __u32 data) {
unsigned long flags;
spin_lock_irqsave(&etrax_epid_lock, flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
nop();
*R_USB_EPT_DATA = data;
spin_unlock_irqrestore(&etrax_epid_lock, flags);
}
static inline void etrax_epid_clear_error(__u8 index) {
unsigned long flags;
spin_lock_irqsave(&etrax_epid_lock, flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
nop();
*R_USB_EPT_DATA &=
~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
IO_MASK(R_USB_EPT_DATA, error_count_out) |
IO_MASK(R_USB_EPT_DATA, error_code));
spin_unlock_irqrestore(&etrax_epid_lock, flags);
}
static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
__u8 toggle) {
unsigned long flags;
spin_lock_irqsave(&etrax_epid_lock, flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
nop();
if(dirout) {
*R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
*R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
} else {
*R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
*R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
}
spin_unlock_irqrestore(&etrax_epid_lock, flags);
}
static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout) {
unsigned long flags;
__u8 toggle;
spin_lock_irqsave(&etrax_epid_lock, flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
nop();
if (dirout) {
toggle = IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
} else {
toggle = IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
}
spin_unlock_irqrestore(&etrax_epid_lock, flags);
return toggle;
}
static inline __u32 etrax_epid_get(__u8 index) {
unsigned long flags;
__u32 data;
spin_lock_irqsave(&etrax_epid_lock, flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
nop();
data = *R_USB_EPT_DATA;
spin_unlock_irqrestore(&etrax_epid_lock, flags);
return data;
}
/* Main functions for Transfer Controller */
/* -------------------------------------- */
/* Init structs, memories and lists used by Transfer Controller */
int tc_init(struct usb_hcd *hcd) {
int i;
/* Clear software state info for all epids */
memset(epid_state, 0, sizeof(struct etrax_epid) * NBR_OF_EPIDS);
/* Set Invalid and Dummy as being in use and disabled */
epid_state[INVALID_EPID].inuse = 1;
epid_state[DUMMY_EPID].inuse = 1;
epid_state[INVALID_EPID].disabled = 1;
epid_state[DUMMY_EPID].disabled = 1;
/* Clear counter for how many Isoc epids we have sat up */
isoc_epid_counter = 0;
/* Initialize the urb list by initiating a head for each list.
Also reset list hodling active URB for each epid */
for (i = 0; i < NBR_OF_EPIDS; i++) {
INIT_LIST_HEAD(&urb_list[i]);
activeUrbList[i] = NULL;
}
/* Init lock for URB lists */
spin_lock_init(&urb_list_lock);
/* Init lock for Etrax R_USB_EPT register */
spin_lock_init(&etrax_epid_lock);
/* Init lock for Etrax dma8 sub0 handling */
spin_lock_init(&etrax_dma8_sub0_lock);
/* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
/* Note that we specify sizeof(struct USB_EP_Desc) as the size, but also
allocate SB descriptors from this cache. This is ok since
sizeof(struct USB_EP_Desc) == sizeof(struct USB_SB_Desc). */
usb_desc_cache = kmem_cache_create("usb_desc_cache",
sizeof(struct USB_EP_Desc), 0,
SLAB_HWCACHE_ALIGN, 0);
if(usb_desc_cache == NULL) {
return -ENOMEM;
}
/* Create slab cache for speedy allocation of memory for isoc bottom-half
interrupt handling */
isoc_compl_cache =
kmem_cache_create("isoc_compl_cache",
sizeof(struct crisv10_isoc_complete_data),
0, SLAB_HWCACHE_ALIGN, 0);
if(isoc_compl_cache == NULL) {
return -ENOMEM;
}
/* Create slab cache for speedy allocation of memory for later URB finish
struct */
later_data_cache =
kmem_cache_create("later_data_cache",
sizeof(struct urb_later_data),
0, SLAB_HWCACHE_ALIGN, 0);
if(later_data_cache == NULL) {
return -ENOMEM;
}
/* Initiate the bulk start timer. */
init_timer(&bulk_start_timer);
bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
bulk_start_timer.function = tc_bulk_start_timer_func;
add_timer(&bulk_start_timer);
/* Initiate the bulk eot timer. */
init_timer(&bulk_eot_timer);
bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
bulk_eot_timer.function = tc_bulk_eot_timer_func;
bulk_eot_timer.data = (unsigned long)hcd;
add_timer(&bulk_eot_timer);
return 0;
}
/* Uninitialize all resources used by Transfer Controller */
void tc_destroy(void) {
/* Destroy all slab cache */
kmem_cache_destroy(usb_desc_cache);
kmem_cache_destroy(isoc_compl_cache);
kmem_cache_destroy(later_data_cache);
/* Remove timers */
del_timer(&bulk_start_timer);
del_timer(&bulk_eot_timer);
}
static void restart_dma8_sub0(void) {
unsigned long flags;
spin_lock_irqsave(&etrax_dma8_sub0_lock, flags);
/* Verify that the dma is not running */
if ((*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd)) == 0) {
struct USB_EP_Desc *ep = (struct USB_EP_Desc *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
while (DUMMY_EPID == IO_EXTRACT(USB_EP_command, epid, ep->command)) {
ep = (struct USB_EP_Desc *)phys_to_virt(ep->next);
}
/* Advance the DMA to the next EP descriptor that is not a DUMMY_EPID. */
*R_DMA_CH8_SUB0_EP = virt_to_phys(ep);
/* Restart the DMA */
*R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
}
spin_unlock_irqrestore(&etrax_dma8_sub0_lock, flags);
}
/* queue an URB with the transfer controller (called from hcd_driver) */
static int tc_urb_enqueue(struct usb_hcd *hcd,
struct urb *urb,
gfp_t mem_flags) {
int epid;
int retval;
int bustime = 0;
int maxpacket;
unsigned long flags;
struct crisv10_urb_priv *urb_priv;
struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
DBFENTER;
if(!(crisv10_hcd->running)) {
/* The USB Controller is not running, probably because no device is
attached. No idea to enqueue URBs then */
tc_warn("Rejected enqueueing of URB:0x%x because no dev attached\n",
(unsigned int)urb);
return -ENOENT;
}
maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
/* Special case check for In Isoc transfers. Specification states that each
In Isoc transfer consists of one packet and therefore it should fit into
the transfer-buffer of an URB.
We do the check here to be sure (an invalid scenario can be produced with
parameters to the usbtest suite) */
if(usb_pipeisoc(urb->pipe) && usb_pipein(urb->pipe) &&
(urb->transfer_buffer_length < maxpacket)) {
tc_err("Submit In Isoc URB with buffer length:%d to pipe with maxpacketlen: %d\n", urb->transfer_buffer_length, maxpacket);
return -EMSGSIZE;
}
/* Check if there is a epid for URBs destination, if not this function
set up one. */
epid = tc_setup_epid(urb->ep, urb, mem_flags);
if (epid < 0) {
tc_err("Failed setup epid:%d for URB:0x%x\n", epid, (unsigned int)urb);
DBFEXIT;
return -ENOMEM;
}
if(urb == activeUrbList[epid]) {
tc_err("Resubmition of allready active URB:0x%x\n", (unsigned int)urb);
return -ENXIO;
}
if(urb_list_entry(urb, epid)) {
tc_err("Resubmition of allready queued URB:0x%x\n", (unsigned int)urb);
return -ENXIO;
}
/* If we actively have flaged endpoint as disabled then refuse submition */
if(epid_state[epid].disabled) {
return -ENOENT;
}
/* Allocate and init HC-private data for URB */
if(urb_priv_create(hcd, urb, epid, mem_flags) != 0) {
DBFEXIT;
return -ENOMEM;
}
urb_priv = urb->hcpriv;
/* Check if there is enough bandwidth for periodic transfer */
if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe)) {
/* only check (and later claim) if not already claimed */
if (urb_priv->bandwidth == 0) {
bustime = crisv10_usb_check_bandwidth(urb->dev, urb);
if (bustime < 0) {
tc_err("Not enough periodic bandwidth\n");
urb_priv_free(hcd, urb);
DBFEXIT;
return -ENOSPC;
}
}
}
tc_dbg("Enqueue URB:0x%x[%d] epid:%d (%s) bufflen:%d\n",
(unsigned int)urb, urb_priv->urb_num, epid,
pipe_to_str(urb->pipe), urb->transfer_buffer_length);
/* Create and link SBs required for this URB */
retval = create_sb_for_urb(urb, mem_flags);
if(retval != 0) {
tc_err("Failed to create SBs for URB:0x%x[%d]\n", (unsigned int)urb,
urb_priv->urb_num);
urb_priv_free(hcd, urb);
DBFEXIT;
return retval;
}
/* Init intr EP pool if this URB is a INTR transfer. This pool is later
used when inserting EPs in the TxIntrEPList. We do the alloc here
so we can't run out of memory later */
if(usb_pipeint(urb->pipe)) {
retval = init_intr_urb(urb, mem_flags);
if(retval != 0) {
tc_warn("Failed to init Intr URB\n");
urb_priv_free(hcd, urb);
DBFEXIT;
return retval;
}
}
/* Disable other access when inserting USB */
local_irq_save(flags);
/* Claim bandwidth, if needed */
if(bustime) {
crisv10_usb_claim_bandwidth(urb->dev,
urb,
bustime,
(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS));
}
/* Add URB to EP queue */
urb_list_add(urb, epid, mem_flags);
if(usb_pipeisoc(urb->pipe)) {
/* Special processing of Isoc URBs. */
tc_dma_process_isoc_urb(urb);
} else {
/* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
tc_dma_process_queue(epid);
}
local_irq_restore(flags);
DBFEXIT;
return 0;
}
/* remove an URB from the transfer controller queues (called from hcd_driver)*/
static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) {
struct crisv10_urb_priv *urb_priv;
unsigned long flags;
int epid;
DBFENTER;
/* Disable interrupts here since a descriptor interrupt for the isoc epid
will modify the sb list. This could possibly be done more granular, but
urb_dequeue should not be used frequently anyway.
*/
local_irq_save(flags);
urb->status = status;
urb_priv = urb->hcpriv;
if (!urb_priv) {
/* This happens if a device driver calls unlink on an urb that
was never submitted (lazy driver) or if the urb was completed
while dequeue was being called. */
tc_warn("Dequeing of not enqueued URB:0x%x\n", (unsigned int)urb);
local_irq_restore(flags);
return 0;
}
epid = urb_priv->epid;
tc_warn("Dequeing %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
(urb == activeUrbList[epid]) ? "active" : "queued",
(unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
str_type(urb->pipe), epid, urb->status,
(urb_priv->later_data) ? "later-sched" : "");
/* For Bulk, Ctrl and Intr are only one URB active at a time. So any URB
that isn't active can be dequeued by just removing it from the queue */
if(usb_pipebulk(urb->pipe) || usb_pipecontrol(urb->pipe) ||
usb_pipeint(urb->pipe)) {
/* Check if URB haven't gone further than the queue */
if(urb != activeUrbList[epid]) {
ASSERT(urb_priv->later_data == NULL);
tc_warn("Dequeing URB:0x%x[%d] (%s %s epid:%d) from queue"
" (not active)\n", (unsigned int)urb, urb_priv->urb_num,
str_dir(urb->pipe), str_type(urb->pipe), epid);
/* Finish the URB with error status from USB core */
tc_finish_urb(hcd, urb, urb->status);
local_irq_restore(flags);
return 0;
}
}
/* Set URB status to Unlink for handling when interrupt comes. */
urb_priv->urb_state = UNLINK;
/* Differentiate dequeing of Bulk and Ctrl from Isoc and Intr */
switch(usb_pipetype(urb->pipe)) {
case PIPE_BULK:
/* Check if EP still is enabled */
if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
/* The EP was enabled, disable it. */
TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
}
/* Kicking dummy list out of the party. */
TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
break;
case PIPE_CONTROL:
/* Check if EP still is enabled */
if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
/* The EP was enabled, disable it. */
TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
}
break;
case PIPE_ISOCHRONOUS:
/* Disabling, busy-wait and unlinking of Isoc SBs will be done in
finish_isoc_urb(). Because there might the case when URB is dequeued
but there are other valid URBs waiting */
/* Check if In Isoc EP still is enabled */
if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
/* The EP was enabled, disable it. */
TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
}
break;
case PIPE_INTERRUPT:
/* Special care is taken for interrupt URBs. EPs are unlinked in
tc_finish_urb */
break;
default:
break;
}
/* Asynchronous unlink, finish the URB later from scheduled or other
event (data finished, error) */
tc_finish_urb_later(hcd, urb, urb->status);
local_irq_restore(flags);
DBFEXIT;
return 0;
}
static void tc_sync_finish_epid(struct usb_hcd *hcd, int epid) {
volatile int timeout = 10000;
struct urb* urb;
struct crisv10_urb_priv* urb_priv;
unsigned long flags;
volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
int type = epid_state[epid].type;
/* Setting this flag will cause enqueue() to return -ENOENT for new
submitions on this endpoint and finish_urb() wont process queue further */
epid_state[epid].disabled = 1;
switch(type) {
case PIPE_BULK:
/* Check if EP still is enabled */
if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
/* The EP was enabled, disable it. */
TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
/* Do busy-wait until DMA not using this EP descriptor anymore */
while((*R_DMA_CH8_SUB0_EP ==
virt_to_phys(&TxBulkEPList[epid])) &&
(timeout-- > 0));
}
break;
case PIPE_CONTROL:
/* Check if EP still is enabled */
if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
/* The EP was enabled, disable it. */
TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
/* Do busy-wait until DMA not using this EP descriptor anymore */
while((*R_DMA_CH8_SUB1_EP ==
virt_to_phys(&TxCtrlEPList[epid])) &&
(timeout-- > 0));
}
break;
case PIPE_INTERRUPT:
local_irq_save(flags);
/* Disable all Intr EPs belonging to epid */
first_ep = &TxIntrEPList[0];
curr_ep = first_ep;
do {
next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
/* Disable EP */
next_ep->command &= ~IO_MASK(USB_EP_command, enable);
}
curr_ep = phys_to_virt(curr_ep->next);
} while (curr_ep != first_ep);
local_irq_restore(flags);
break;
case PIPE_ISOCHRONOUS:
/* Check if EP still is enabled */
if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
tc_warn("sync_finish: Disabling Isoc EP for epid:%d\n", epid);
/* The EP was enabled, disable it. */
TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
(timeout-- > 0));
}
break;
}
local_irq_save(flags);
/* Finish if there is active URB for this endpoint */
if(activeUrbList[epid] != NULL) {
urb = activeUrbList[epid];
urb_priv = urb->hcpriv;
ASSERT(urb_priv);
tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
(urb == activeUrbList[epid]) ? "active" : "queued",
(unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
str_type(urb->pipe), epid, urb->status,
(urb_priv->later_data) ? "later-sched" : "");
tc_finish_urb(hcd, activeUrbList[epid], -ENOENT);
ASSERT(activeUrbList[epid] == NULL);
}
/* Finish any queued URBs for this endpoint. There won't be any resubmitions
because epid_disabled causes enqueue() to fail for this endpoint */
while((urb = urb_list_first(epid)) != NULL) {
urb_priv = urb->hcpriv;
ASSERT(urb_priv);
tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
(urb == activeUrbList[epid]) ? "active" : "queued",
(unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
str_type(urb->pipe), epid, urb->status,
(urb_priv->later_data) ? "later-sched" : "");
tc_finish_urb(hcd, urb, -ENOENT);
}
epid_state[epid].disabled = 0;
local_irq_restore(flags);
}
/* free resources associated with an endpoint (called from hcd_driver) */
static void tc_endpoint_disable(struct usb_hcd *hcd,
struct usb_host_endpoint *ep) {
DBFENTER;
/* Only free epid if it has been allocated. We get two endpoint_disable
requests for ctrl endpoints so ignore the second one */
if(ep->hcpriv != NULL) {
struct crisv10_ep_priv *ep_priv = ep->hcpriv;
int epid = ep_priv->epid;
tc_warn("endpoint_disable ep:0x%x ep-priv:0x%x (%s) (epid:%d freed)\n",
(unsigned int)ep, (unsigned int)ep->hcpriv,
endpoint_to_str(&(ep->desc)), epid);
tc_sync_finish_epid(hcd, epid);
ASSERT(activeUrbList[epid] == NULL);
ASSERT(list_empty(&urb_list[epid]));
tc_free_epid(ep);
} else {
tc_dbg("endpoint_disable ep:0x%x ep-priv:0x%x (%s)\n", (unsigned int)ep,
(unsigned int)ep->hcpriv, endpoint_to_str(&(ep->desc)));
}
DBFEXIT;
}
static void tc_finish_urb_later_proc(struct work_struct* work) {
unsigned long flags;
struct urb_later_data* uld;
local_irq_save(flags);
uld = container_of(work, struct urb_later_data, dws.work);
if(uld->urb == NULL) {
late_dbg("Later finish of URB = NULL (allready finished)\n");
} else {
struct crisv10_urb_priv* urb_priv = uld->urb->hcpriv;
ASSERT(urb_priv);
if(urb_priv->urb_num == uld->urb_num) {
late_dbg("Later finish of URB:0x%x[%d]\n", (unsigned int)(uld->urb),
urb_priv->urb_num);
if(uld->status != uld->urb->status) {
errno_dbg("Later-finish URB with status:%d, later-status:%d\n",
uld->urb->status, uld->status);
}
if(uld != urb_priv->later_data) {
panic("Scheduled uld not same as URBs uld\n");
}
tc_finish_urb(uld->hcd, uld->urb, uld->status);
} else {
late_warn("Ignoring later finish of URB:0x%x[%d]"
", urb_num doesn't match current URB:0x%x[%d]",
(unsigned int)(uld->urb), uld->urb_num,
(unsigned int)(uld->urb), urb_priv->urb_num);
}
}
local_irq_restore(flags);
kmem_cache_free(later_data_cache, uld);
}
static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
int status) {
struct crisv10_urb_priv *urb_priv = urb->hcpriv;
struct urb_later_data* uld;
ASSERT(urb_priv);
if(urb_priv->later_data != NULL) {
/* Later-finish allready scheduled for this URB, just update status to
return when finishing later */
errno_dbg("Later-finish schedule change URB status:%d with new"
" status:%d\n", urb_priv->later_data->status, status);
urb_priv->later_data->status = status;
return;
}
uld = kmem_cache_alloc(later_data_cache, GFP_ATOMIC);
ASSERT(uld);
uld->hcd = hcd;
uld->urb = urb;
uld->urb_num = urb_priv->urb_num;
uld->status = status;
INIT_DELAYED_WORK(&uld->dws, tc_finish_urb_later_proc);
urb_priv->later_data = uld;
/* Schedule the finishing of the URB to happen later */
schedule_delayed_work(&uld->dws, LATER_TIMER_DELAY);
}
static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
int status);
static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status) {
struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
struct crisv10_urb_priv *urb_priv = urb->hcpriv;
int epid;
char toggle;
int urb_num;
DBFENTER;
ASSERT(urb_priv != NULL);
epid = urb_priv->epid;
urb_num = urb_priv->urb_num;
if(urb != activeUrbList[epid]) {
if(urb_list_entry(urb, epid)) {
/* Remove this URB from the list. Only happens when URB are finished
before having been processed (dequeing) */
urb_list_del(urb, epid);
} else {
tc_warn("Finishing of URB:0x%x[%d] neither active or in queue for"
" epid:%d\n", (unsigned int)urb, urb_num, epid);
}
}
/* Cancel any pending later-finish of this URB */
if(urb_priv->later_data) {
urb_priv->later_data->urb = NULL;
}
/* For an IN pipe, we always set the actual length, regardless of whether
there was an error or not (which means the device driver can use the data
if it wants to). */
if(usb_pipein(urb->pipe)) {
urb->actual_length = urb_priv->rx_offset;
} else {
/* Set actual_length for OUT urbs also; the USB mass storage driver seems
to want that. */
if (status == 0 && urb->status == -EINPROGRESS) {
urb->actual_length = urb->transfer_buffer_length;
} else {
/* We wouldn't know of any partial writes if there was an error. */
urb->actual_length = 0;
}
}
/* URB status mangling */
if(urb->status == -EINPROGRESS) {
/* The USB core hasn't changed the status, let's set our finish status */
urb->status = status;
if ((status == 0) && (urb->transfer_flags & URB_SHORT_NOT_OK) &&
usb_pipein(urb->pipe) &&
(urb->actual_length != urb->transfer_buffer_length)) {
/* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's
max length) is to be treated as an error. */
errno_dbg("Finishing URB:0x%x[%d] with SHORT_NOT_OK flag and short"
" data:%d\n", (unsigned int)urb, urb_num,
urb->actual_length);
urb->status = -EREMOTEIO;
}
if(urb_priv->urb_state == UNLINK) {
/* URB has been requested to be unlinked asynchronously */
urb->status = -ECONNRESET;
errno_dbg("Fixing unlink status of URB:0x%x[%d] to:%d\n",
(unsigned int)urb, urb_num, urb->status);
}
} else {
/* The USB Core wants to signal some error via the URB, pass it through */
}
/* use completely different finish function for Isoc URBs */
if(usb_pipeisoc(urb->pipe)) {
tc_finish_isoc_urb(hcd, urb, status);
return;
}
/* Do special unlinking of EPs for Intr traffic */
if(usb_pipeint(urb->pipe)) {
tc_dma_unlink_intr_urb(urb);
}
/* Release allocated bandwidth for periodic transfers */
if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe))
crisv10_usb_release_bandwidth(hcd,
usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS,
urb_priv->bandwidth);
/* This URB is active on EP */
if(urb == activeUrbList[epid]) {
/* We need to fiddle with the toggle bits because the hardware doesn't do
it for us. */
toggle = etrax_epid_get_toggle(epid, usb_pipeout(urb->pipe));
usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
usb_pipeout(urb->pipe), toggle);
/* Checks for Ctrl and Bulk EPs */
switch(usb_pipetype(urb->pipe)) {
case PIPE_BULK:
/* Check so Bulk EP realy is disabled before finishing active URB */
ASSERT((TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
IO_STATE(USB_EP_command, enable, no));
/* Disable sub-pointer for EP to avoid next tx_interrupt() to
process Bulk EP. */
TxBulkEPList[epid].sub = 0;
/* No need to wait for the DMA before changing the next pointer.
The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
the last one (INVALID_EPID) for actual traffic. */
TxBulkEPList[epid].next =
virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
break;
case PIPE_CONTROL:
/* Check so Ctrl EP realy is disabled before finishing active URB */
ASSERT((TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
IO_STATE(USB_EP_command, enable, no));
/* Disable sub-pointer for EP to avoid next tx_interrupt() to
process Ctrl EP. */
TxCtrlEPList[epid].sub = 0;
break;
}
}
/* Free HC-private URB data*/
urb_priv_free(hcd, urb);
if(urb->status) {
errno_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
(unsigned int)urb, urb_num, str_dir(urb->pipe),
str_type(urb->pipe), urb->actual_length, urb->status);
} else {
tc_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
(unsigned int)urb, urb_num, str_dir(urb->pipe),
str_type(urb->pipe), urb->actual_length, urb->status);
}
/* If we just finished an active URB, clear active pointer. */
if (urb == activeUrbList[epid]) {
/* Make URB not active on EP anymore */
activeUrbList[epid] = NULL;
if(urb->status == 0) {
/* URB finished sucessfully, process queue to see if there are any more
URBs waiting before we call completion function.*/
if(crisv10_hcd->running) {
/* Only process queue if USB controller is running */
tc_dma_process_queue(epid);
} else {
tc_warn("No processing of queue for epid:%d, USB Controller not"
" running\n", epid);
}
}
}
/* Hand the URB from HCD to its USB device driver, using its completion
functions */
usb_hcd_giveback_urb (hcd, urb, status);
/* Check the queue once more if the URB returned with error, because we
didn't do it before the completion function because the specification
states that the queue should not restart until all it's unlinked
URBs have been fully retired, with the completion functions run */
if(crisv10_hcd->running) {
/* Only process queue if USB controller is running */
tc_dma_process_queue(epid);
} else {
tc_warn("No processing of queue for epid:%d, USB Controller not running\n",
epid);
}
DBFEXIT;
}
static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
int status) {
struct crisv10_urb_priv *urb_priv = urb->hcpriv;
int epid, i;
volatile int timeout = 10000;
int bandwidth = 0;
ASSERT(urb_priv);
epid = urb_priv->epid;
ASSERT(usb_pipeisoc(urb->pipe));
/* Set that all isoc packets have status and length set before
completing the urb. */
for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++){
urb->iso_frame_desc[i].actual_length = 0;
urb->iso_frame_desc[i].status = -EPROTO;
}
/* Check if the URB is currently active (done or error) */
if(urb == activeUrbList[epid]) {
/* Check if there are another In Isoc URB queued for this epid */
if (!list_empty(&urb_list[epid])&& !epid_state[epid].disabled) {
/* Move it from queue to active and mark it started so Isoc transfers
won't be interrupted.
All Isoc URBs data transfers are already added to DMA lists so we
don't have to insert anything in DMA lists here. */
activeUrbList[epid] = urb_list_first(epid);
((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_state =
STARTED;
urb_list_del(activeUrbList[epid], epid);
if(urb->status) {
errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
" status:%d, new waiting URB:0x%x[%d]\n",
(unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
str_type(urb->pipe), urb_priv->isoc_packet_counter,
urb->number_of_packets, urb->status,
(unsigned int)activeUrbList[epid],
((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_num);
}
} else { /* No other URB queued for this epid */
if(urb->status) {
errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
" status:%d, no new URB waiting\n",
(unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
str_type(urb->pipe), urb_priv->isoc_packet_counter,
urb->number_of_packets, urb->status);
}
/* Check if EP is still enabled, then shut it down. */
if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
isoc_dbg("Isoc EP enabled for epid:%d, disabling it\n", epid);
/* Should only occur for In Isoc EPs where SB isn't consumed. */
ASSERT(usb_pipein(urb->pipe));
/* Disable it and wait for it to stop */
TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
/* Ah, the luxury of busy-wait. */
while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
(timeout-- > 0));
}
/* Unlink SB to say that epid is finished. */
TxIsocEPList[epid].sub = 0;
TxIsocEPList[epid].hw_len = 0;
/* No URB active for EP anymore */
activeUrbList[epid] = NULL;
}
} else { /* Finishing of not active URB (queued up with SBs thought) */
isoc_warn("finish_isoc_urb (URB:0x%x %s) (%d of %d packets) status:%d,"
" SB queued but not active\n",
(unsigned int)urb, str_dir(urb->pipe),
urb_priv->isoc_packet_counter, urb->number_of_packets,
urb->status);
if(usb_pipeout(urb->pipe)) {
/* Finishing of not yet active Out Isoc URB needs unlinking of SBs. */
struct USB_SB_Desc *iter_sb, *prev_sb, *next_sb;
iter_sb = TxIsocEPList[epid].sub ?
phys_to_virt(TxIsocEPList[epid].sub) : 0;
prev_sb = 0;
/* SB that is linked before this URBs first SB */
while (iter_sb && (iter_sb != urb_priv->first_sb)) {
prev_sb = iter_sb;
iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
}
if (iter_sb == 0) {
/* Unlink of the URB currently being transmitted. */
prev_sb = 0;
iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
}
while (iter_sb && (iter_sb != urb_priv->last_sb)) {
iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
}
if (iter_sb) {
next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
} else {
/* This should only happen if the DMA has completed
processing the SB list for this EP while interrupts
are disabled. */
isoc_dbg("Isoc urb not found, already sent?\n");
next_sb = 0;
}
if (prev_sb) {
prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
} else {
TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
}
}
}
/* Free HC-private URB data*/
bandwidth = urb_priv->bandwidth;
urb_priv_free(hcd, urb);
crisv10_usb_release_bandwidth(hcd, usb_pipeisoc(urb->pipe), bandwidth);
/* Hand the URB from HCD to its USB device driver, using its completion
functions */
usb_hcd_giveback_urb (hcd, urb, status);
}
static __u32 urb_num = 0;
/* allocate and initialize URB private data */
static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
int mem_flags) {
struct crisv10_urb_priv *urb_priv;
urb_priv = kmalloc(sizeof *urb_priv, mem_flags);
if (!urb_priv)
return -ENOMEM;
memset(urb_priv, 0, sizeof *urb_priv);
urb_priv->epid = epid;
urb_priv->urb_state = NOT_STARTED;
urb->hcpriv = urb_priv;
/* Assign URB a sequence number, and increment counter */
urb_priv->urb_num = urb_num;
urb_num++;
urb_priv->bandwidth = 0;
return 0;
}
/* free URB private data */
static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb) {
int i;
struct crisv10_urb_priv *urb_priv = urb->hcpriv;
ASSERT(urb_priv != 0);
/* Check it has any SBs linked that needs to be freed*/
if(urb_priv->first_sb != NULL) {
struct USB_SB_Desc *next_sb, *first_sb, *last_sb;
int i = 0;
first_sb = urb_priv->first_sb;
last_sb = urb_priv->last_sb;
ASSERT(last_sb);
while(first_sb != last_sb) {
next_sb = (struct USB_SB_Desc *)phys_to_virt(first_sb->next);
kmem_cache_free(usb_desc_cache, first_sb);
first_sb = next_sb;
i++;
}
kmem_cache_free(usb_desc_cache, last_sb);
i++;
}
/* Check if it has any EPs in its Intr pool that also needs to be freed */
if(urb_priv->intr_ep_pool_length > 0) {
for(i = 0; i < urb_priv->intr_ep_pool_length; i++) {
kfree(urb_priv->intr_ep_pool[i]);
}
/*
tc_dbg("Freed %d EPs from URB:0x%x EP pool\n",
urb_priv->intr_ep_pool_length, (unsigned int)urb);
*/
}
kfree(urb_priv);
urb->hcpriv = NULL;
}
static int ep_priv_create(struct usb_host_endpoint *ep, int mem_flags) {
struct crisv10_ep_priv *ep_priv;
ep_priv = kmalloc(sizeof *ep_priv, mem_flags);
if (!ep_priv)
return -ENOMEM;
memset(ep_priv, 0, sizeof *ep_priv);
ep->hcpriv = ep_priv;
return 0;
}
static void ep_priv_free(struct usb_host_endpoint *ep) {
struct crisv10_ep_priv *ep_priv = ep->hcpriv;
ASSERT(ep_priv);
kfree(ep_priv);
ep->hcpriv = NULL;
}
/*
* usb_check_bandwidth():
*
* old_alloc is from host_controller->bandwidth_allocated in microseconds;
* bustime is from calc_bus_time(), but converted to microseconds.
*
* returns <bustime in us> if successful,
* or -ENOSPC if bandwidth request fails.
*
* FIXME:
* This initial implementation does not use Endpoint.bInterval
* in managing bandwidth allocation.
* It probably needs to be expanded to use Endpoint.bInterval.
* This can be done as a later enhancement (correction).
*
* This will also probably require some kind of
* frame allocation tracking...meaning, for example,
* that if multiple drivers request interrupts every 10 USB frames,
* they don't all have to be allocated at
* frame numbers N, N+10, N+20, etc. Some of them could be at
* N+11, N+21, N+31, etc., and others at
* N+12, N+22, N+32, etc.
*
* Similarly for isochronous transfers...
*
* Individual HCDs can schedule more directly ... this logic
* is not correct for high speed transfers.
*/
static int crisv10_usb_check_bandwidth(
struct usb_device *dev,
struct urb *urb)
{
unsigned int pipe = urb->pipe;
long bustime;
int is_in = usb_pipein (pipe);
int is_iso = usb_pipeisoc (pipe);
int old_alloc = dev->bus->bandwidth_allocated;
int new_alloc;
bustime = NS_TO_US (usb_calc_bus_time (dev->speed, is_in, is_iso,
usb_maxpacket (dev, pipe, !is_in)));
if (is_iso)
bustime /= urb->number_of_packets;
new_alloc = old_alloc + (int) bustime;
if (new_alloc > FRAME_TIME_MAX_USECS_ALLOC) {
dev_dbg (&dev->dev, "usb_check_bandwidth FAILED: %d + %ld = %d usec\n",
old_alloc, bustime, new_alloc);
bustime = -ENOSPC; /* report error */
}
return bustime;
}
/**
* usb_claim_bandwidth - records bandwidth for a periodic transfer
* @dev: source/target of request
* @urb: request (urb->dev == dev)
* @bustime: bandwidth consumed, in (average) microseconds per frame
* @isoc: true iff the request is isochronous
*
* HCDs are expected not to overcommit periodic bandwidth, and to record such
* reservations whenever endpoints are added to the periodic schedule.
*
* FIXME averaging per-frame is suboptimal. Better to sum over the HCD's
* entire periodic schedule ... 32 frames for OHCI, 1024 for UHCI, settable
* for EHCI (256/512/1024 frames, default 1024) and have the bus expose how
* large its periodic schedule is.
*/
static void crisv10_usb_claim_bandwidth(
struct usb_device *dev,
struct urb *urb, int bustime, int isoc)
{
dev->bus->bandwidth_allocated += bustime;
if (isoc)
dev->bus->bandwidth_isoc_reqs++;
else
dev->bus->bandwidth_int_reqs++;
struct crisv10_urb_priv *urb_priv;
urb_priv = urb->hcpriv;
urb_priv->bandwidth = bustime;
}
/**
* usb_release_bandwidth - reverses effect of usb_claim_bandwidth()
* @hcd: host controller
* @isoc: true iff the request is isochronous
* @bandwidth: bandwidth returned
*
* This records that previously allocated bandwidth has been released.
* Bandwidth is released when endpoints are removed from the host controller's
* periodic schedule.
*/
static void crisv10_usb_release_bandwidth(
struct usb_hcd *hcd,
int isoc,
int bandwidth)
{
hcd_to_bus(hcd)->bandwidth_allocated -= bandwidth;
if (isoc)
hcd_to_bus(hcd)->bandwidth_isoc_reqs--;
else
hcd_to_bus(hcd)->bandwidth_int_reqs--;
}
/* EPID handling functions, managing EP-list in Etrax through wrappers */
/* ------------------------------------------------------------------- */
/* Sets up a new EPID for an endpoint or returns existing if found */
static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
int mem_flags) {
int epid;
char devnum, endpoint, out_traffic, slow;
int maxlen;
__u32 epid_data;
struct crisv10_ep_priv *ep_priv = ep->hcpriv;
DBFENTER;
/* Check if a valid epid already is setup for this endpoint */
if(ep_priv != NULL) {
return ep_priv->epid;
}
/* We must find and initiate a new epid for this urb. */
epid = tc_allocate_epid();
if (epid == -1) {
/* Failed to allocate a new epid. */
DBFEXIT;
return epid;
}
/* We now have a new epid to use. Claim it. */
epid_state[epid].inuse = 1;
/* Init private data for new endpoint */
if(ep_priv_create(ep, mem_flags) != 0) {
return -ENOMEM;
}
ep_priv = ep->hcpriv;
ep_priv->epid = epid;
devnum = usb_pipedevice(urb->pipe);
endpoint = usb_pipeendpoint(urb->pipe);
slow = (urb->dev->speed == USB_SPEED_LOW);
maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
/* We want both IN and OUT control traffic to be put on the same
EP/SB list. */
out_traffic = 1;
} else {
out_traffic = usb_pipeout(urb->pipe);
}
if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
epid_data = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
/* FIXME: Change any to the actual port? */
IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
etrax_epid_iso_set(epid, epid_data);
} else {
epid_data = IO_STATE(R_USB_EPT_DATA, valid, yes) |
IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
/* FIXME: Change any to the actual port? */
IO_STATE(R_USB_EPT_DATA, port, any) |
IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
IO_FIELD(R_USB_EPT_DATA, dev, devnum);
etrax_epid_set(epid, epid_data);
}
epid_state[epid].out_traffic = out_traffic;
epid_state[epid].type = usb_pipetype(urb->pipe);
tc_warn("Setting up ep:0x%x epid:%d (addr:%d endp:%d max_len:%d %s %s %s)\n",
(unsigned int)ep, epid, devnum, endpoint, maxlen,
str_type(urb->pipe), out_traffic ? "out" : "in",
slow ? "low" : "full");
/* Enable Isoc eof interrupt if we set up the first Isoc epid */
if(usb_pipeisoc(urb->pipe)) {
isoc_epid_counter++;
if(isoc_epid_counter == 1) {
isoc_warn("Enabled Isoc eof interrupt\n");
*R_USB_IRQ_MASK_SET = IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
}
}
DBFEXIT;
return epid;
}
static void tc_free_epid(struct usb_host_endpoint *ep) {
unsigned long flags;
struct crisv10_ep_priv *ep_priv = ep->hcpriv;
int epid;
volatile int timeout = 10000;
DBFENTER;
if (ep_priv == NULL) {
tc_warn("Trying to free unused epid on ep:0x%x\n", (unsigned int)ep);
DBFEXIT;
return;
}
epid = ep_priv->epid;
/* Disable Isoc eof interrupt if we free the last Isoc epid */
if(epid_isoc(epid)) {
ASSERT(isoc_epid_counter > 0);
isoc_epid_counter--;
if(isoc_epid_counter == 0) {
*R_USB_IRQ_MASK_CLR = IO_STATE(R_USB_IRQ_MASK_CLR, iso_eof, clr);
isoc_warn("Disabled Isoc eof interrupt\n");
}
}
/* Take lock manualy instead of in epid_x_x wrappers,
because we need to be polling here */
spin_lock_irqsave(&etrax_epid_lock, flags);
*R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
nop();
while((*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) &&
(timeout-- > 0));
/* This will, among other things, set the valid field to 0. */
*R_USB_EPT_DATA = 0;
spin_unlock_irqrestore(&etrax_epid_lock, flags);
/* Free resource in software state info list */
epid_state[epid].inuse = 0;
/* Free private endpoint data */
ep_priv_free(ep);
DBFEXIT;
}
static int tc_allocate_epid(void) {
int i;
DBFENTER;
for (i = 0; i < NBR_OF_EPIDS; i++) {
if (!epid_inuse(i)) {
DBFEXIT;
return i;
}
}
tc_warn("Found no free epids\n");
DBFEXIT;
return -1;
}
/* Wrappers around the list functions (include/linux/list.h). */
/* ---------------------------------------------------------- */
static inline int __urb_list_empty(int epid) {
int retval;
retval = list_empty(&urb_list[epid]);
return retval;
}
/* Returns first urb for this epid, or NULL if list is empty. */
static inline struct urb *urb_list_first(int epid) {
unsigned long flags;
struct urb *first_urb = 0;
spin_lock_irqsave(&urb_list_lock, flags);
if (!__urb_list_empty(epid)) {
/* Get the first urb (i.e. head->next). */
urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
first_urb = urb_entry->urb;
}
spin_unlock_irqrestore(&urb_list_lock, flags);
return first_urb;
}
/* Adds an urb_entry last in the list for this epid. */
static inline void urb_list_add(struct urb *urb, int epid, int mem_flags) {
unsigned long flags;
urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), mem_flags);
ASSERT(urb_entry);
urb_entry->urb = urb;
spin_lock_irqsave(&urb_list_lock, flags);
list_add_tail(&urb_entry->list, &urb_list[epid]);
spin_unlock_irqrestore(&urb_list_lock, flags);
}
/* Search through the list for an element that contains this urb. (The list
is expected to be short and the one we are about to delete will often be
the first in the list.)
Should be protected by spin_locks in calling function */
static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid) {
struct list_head *entry;
struct list_head *tmp;
urb_entry_t *urb_entry;
list_for_each_safe(entry, tmp, &urb_list[epid]) {
urb_entry = list_entry(entry, urb_entry_t, list);
ASSERT(urb_entry);
ASSERT(urb_entry->urb);
if (urb_entry->urb == urb) {
return urb_entry;
}
}
return 0;
}
/* Same function as above but for global use. Protects list by spinlock */
static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid) {
unsigned long flags;
urb_entry_t *urb_entry;
spin_lock_irqsave(&urb_list_lock, flags);
urb_entry = __urb_list_entry(urb, epid);
spin_unlock_irqrestore(&urb_list_lock, flags);
return (urb_entry);
}
/* Delete an urb from the list. */
static inline void urb_list_del(struct urb *urb, int epid) {
unsigned long flags;
urb_entry_t *urb_entry;
/* Delete entry and free. */
spin_lock_irqsave(&urb_list_lock, flags);
urb_entry = __urb_list_entry(urb, epid);
ASSERT(urb_entry);
list_del(&urb_entry->list);
spin_unlock_irqrestore(&urb_list_lock, flags);
kfree(urb_entry);
}
/* Move an urb to the end of the list. */
static inline void urb_list_move_last(struct urb *urb, int epid) {
unsigned long flags;
urb_entry_t *urb_entry;
spin_lock_irqsave(&urb_list_lock, flags);
urb_entry = __urb_list_entry(urb, epid);
ASSERT(urb_entry);
list_del(&urb_entry->list);
list_add_tail(&urb_entry->list, &urb_list[epid]);
spin_unlock_irqrestore(&urb_list_lock, flags);
}
/* Get the next urb in the list. */
static inline struct urb *urb_list_next(struct urb *urb, int epid) {
unsigned long flags;
urb_entry_t *urb_entry;
spin_lock_irqsave(&urb_list_lock, flags);
urb_entry = __urb_list_entry(urb, epid);
ASSERT(urb_entry);
if (urb_entry->list.next != &urb_list[epid]) {
struct list_head *elem = urb_entry->list.next;
urb_entry = list_entry(elem, urb_entry_t, list);
spin_unlock_irqrestore(&urb_list_lock, flags);
return urb_entry->urb;
} else {
spin_unlock_irqrestore(&urb_list_lock, flags);
return NULL;
}
}
struct USB_EP_Desc* create_ep(int epid, struct USB_SB_Desc* sb_desc,
int mem_flags) {
struct USB_EP_Desc *ep_desc;
ep_desc = (struct USB_EP_Desc *) kmem_cache_alloc(usb_desc_cache, mem_flags);
if(ep_desc == NULL)
return NULL;
memset(ep_desc, 0, sizeof(struct USB_EP_Desc));
ep_desc->hw_len = 0;
ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
IO_STATE(USB_EP_command, enable, yes));
if(sb_desc == NULL) {
ep_desc->sub = 0;
} else {
ep_desc->sub = virt_to_phys(sb_desc);
}
return ep_desc;
}
#define TT_ZOUT 0
#define TT_IN 1
#define TT_OUT 2
#define TT_SETUP 3
#define CMD_EOL IO_STATE(USB_SB_command, eol, yes)
#define CMD_INTR IO_STATE(USB_SB_command, intr, yes)
#define CMD_FULL IO_STATE(USB_SB_command, full, yes)
/* Allocation and setup of a generic SB. Used to create SETUP, OUT and ZOUT
SBs. Also used by create_sb_in() to avoid same allocation procedure at two
places */
struct USB_SB_Desc* create_sb(struct USB_SB_Desc* sb_prev, int tt, void* data,
int datalen, int mem_flags) {
struct USB_SB_Desc *sb_desc;
sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
if(sb_desc == NULL)
return NULL;
memset(sb_desc, 0, sizeof(struct USB_SB_Desc));
sb_desc->command = IO_FIELD(USB_SB_command, tt, tt) |
IO_STATE(USB_SB_command, eot, yes);
sb_desc->sw_len = datalen;
if(data != NULL) {
sb_desc->buf = virt_to_phys(data);
} else {
sb_desc->buf = 0;
}
if(sb_prev != NULL) {
sb_prev->next = virt_to_phys(sb_desc);
}
return sb_desc;
}
/* Creates a copy of an existing SB by allocation space for it and copy
settings */
struct USB_SB_Desc* create_sb_copy(struct USB_SB_Desc* sb_orig, int mem_flags) {
struct USB_SB_Desc *sb_desc;
sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
if(sb_desc == NULL)
return NULL;
memcpy(sb_desc, sb_orig, sizeof(struct USB_SB_Desc));
return sb_desc;
}
/* A specific create_sb function for creation of in SBs. This is due to
that datalen in In SBs shows how many packets we are expecting. It also
sets up the rem field to show if how many bytes we expect in last packet
if it's not a full one */
struct USB_SB_Desc* create_sb_in(struct USB_SB_Desc* sb_prev, int datalen,
int maxlen, int mem_flags) {
struct USB_SB_Desc *sb_desc;
sb_desc = create_sb(sb_prev, TT_IN, NULL,
datalen ? (datalen - 1) / maxlen + 1 : 0, mem_flags);
if(sb_desc == NULL)
return NULL;
sb_desc->command |= IO_FIELD(USB_SB_command, rem, datalen % maxlen);
return sb_desc;
}
void set_sb_cmds(struct USB_SB_Desc *sb_desc, __u16 flags) {
sb_desc->command |= flags;
}
int create_sb_for_urb(struct urb *urb, int mem_flags) {
int is_out = !usb_pipein(urb->pipe);
int type = usb_pipetype(urb->pipe);
int maxlen = usb_maxpacket(urb->dev, urb->pipe, is_out);
int buf_len = urb->transfer_buffer_length;
void *buf = buf_len > 0 ? urb->transfer_buffer : NULL;
struct USB_SB_Desc *sb_desc = NULL;
struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv != NULL);
switch(type) {
case PIPE_CONTROL:
/* Setup stage */
sb_desc = create_sb(NULL, TT_SETUP, urb->setup_packet, 8, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
set_sb_cmds(sb_desc, CMD_FULL);
/* Attach first SB to URB */
urb_priv->first_sb = sb_desc;
if (is_out) { /* Out Control URB */
/* If this Control OUT transfer has an optional data stage we add
an OUT token before the mandatory IN (status) token */
if ((buf_len > 0) && buf) {
sb_desc = create_sb(sb_desc, TT_OUT, buf, buf_len, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
set_sb_cmds(sb_desc, CMD_FULL);
}
/* Status stage */
/* The data length has to be exactly 1. This is due to a requirement
of the USB specification that a host must be prepared to receive
data in the status phase */
sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
} else { /* In control URB */
/* Data stage */
sb_desc = create_sb_in(sb_desc, buf_len, maxlen, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
/* Status stage */
/* Read comment at zout_buffer declaration for an explanation to this. */
sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
/* Set descriptor interrupt flag for in URBs so we can finish URB after
zout-packet has been sent */
set_sb_cmds(sb_desc, CMD_INTR | CMD_FULL);
}
/* Set end-of-list flag in last SB */
set_sb_cmds(sb_desc, CMD_EOL);
/* Attach last SB to URB */
urb_priv->last_sb = sb_desc;
break;
case PIPE_BULK:
if (is_out) { /* Out Bulk URB */
sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
/* The full field is set to yes, even if we don't actually check that
this is a full-length transfer (i.e., that transfer_buffer_length %
maxlen = 0).
Setting full prevents the USB controller from sending an empty packet
in that case. However, if URB_ZERO_PACKET was set we want that. */
if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
set_sb_cmds(sb_desc, CMD_FULL);
}
} else { /* In Bulk URB */
sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
}
/* Set end-of-list flag for last SB */
set_sb_cmds(sb_desc, CMD_EOL);
/* Attach SB to URB */
urb_priv->first_sb = sb_desc;
urb_priv->last_sb = sb_desc;
break;
case PIPE_INTERRUPT:
if(is_out) { /* Out Intr URB */
sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
/* The full field is set to yes, even if we don't actually check that
this is a full-length transfer (i.e., that transfer_buffer_length %
maxlen = 0).
Setting full prevents the USB controller from sending an empty packet
in that case. However, if URB_ZERO_PACKET was set we want that. */
if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
set_sb_cmds(sb_desc, CMD_FULL);
}
/* Only generate TX interrupt if it's a Out URB*/
set_sb_cmds(sb_desc, CMD_INTR);
} else { /* In Intr URB */
sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
}
/* Set end-of-list flag for last SB */
set_sb_cmds(sb_desc, CMD_EOL);
/* Attach SB to URB */
urb_priv->first_sb = sb_desc;
urb_priv->last_sb = sb_desc;
break;
case PIPE_ISOCHRONOUS:
if(is_out) { /* Out Isoc URB */
int i;
if(urb->number_of_packets == 0) {
tc_err("Can't create SBs for Isoc URB with zero packets\n");
return -EPIPE;
}
/* Create one SB descriptor for each packet and link them together. */
for(i = 0; i < urb->number_of_packets; i++) {
if (urb->iso_frame_desc[i].length > 0) {
sb_desc = create_sb(sb_desc, TT_OUT, urb->transfer_buffer +
urb->iso_frame_desc[i].offset,
urb->iso_frame_desc[i].length, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
/* Check if it's a full length packet */
if (urb->iso_frame_desc[i].length ==
usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
set_sb_cmds(sb_desc, CMD_FULL);
}
} else { /* zero length packet */
sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
set_sb_cmds(sb_desc, CMD_FULL);
}
/* Attach first SB descriptor to URB */
if (i == 0) {
urb_priv->first_sb = sb_desc;
}
}
/* Set interrupt and end-of-list flags in last SB */
set_sb_cmds(sb_desc, CMD_INTR | CMD_EOL);
/* Attach last SB descriptor to URB */
urb_priv->last_sb = sb_desc;
tc_dbg("Created %d out SBs for Isoc URB:0x%x\n",
urb->number_of_packets, (unsigned int)urb);
} else { /* In Isoc URB */
/* Actual number of packets is not relevant for periodic in traffic as
long as it is more than zero. Set to 1 always. */
sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
if(sb_desc == NULL)
return -ENOMEM;
/* Set end-of-list flags for SB */
set_sb_cmds(sb_desc, CMD_EOL);
/* Attach SB to URB */
urb_priv->first_sb = sb_desc;
urb_priv->last_sb = sb_desc;
}
break;
default:
tc_err("Unknown pipe-type\n");
return -EPIPE;
break;
}
return 0;
}
int init_intr_urb(struct urb *urb, int mem_flags) {
struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
struct USB_EP_Desc* ep_desc;
int interval;
int i;
int ep_count;
ASSERT(urb_priv != NULL);
ASSERT(usb_pipeint(urb->pipe));
/* We can't support interval longer than amount of eof descriptors in
TxIntrEPList */
if(urb->interval > MAX_INTR_INTERVAL) {
tc_err("Interrupt interval %dms too big (max: %dms)\n", urb->interval,
MAX_INTR_INTERVAL);
return -EINVAL;
}
/* We assume that the SB descriptors already have been setup */
ASSERT(urb_priv->first_sb != NULL);
/* Round of the interval to 2^n, it is obvious that this code favours
smaller numbers, but that is actually a good thing */
/* FIXME: The "rounding error" for larger intervals will be quite
large. For in traffic this shouldn't be a problem since it will only
mean that we "poll" more often. */
interval = urb->interval;
for (i = 0; interval; i++) {
interval = interval >> 1;
}
urb_priv->interval = 1 << (i - 1);
/* We can only have max interval for Out Interrupt due to that we can only
handle one linked in EP for a certain epid in the Intr descr array at the
time. The USB Controller in the Etrax 100LX continues to process Intr EPs
so we have no way of knowing which one that caused the actual transfer if
we have several linked in. */
if(usb_pipeout(urb->pipe)) {
urb_priv->interval = MAX_INTR_INTERVAL;
}
/* Calculate amount of EPs needed */
ep_count = MAX_INTR_INTERVAL / urb_priv->interval;
for(i = 0; i < ep_count; i++) {
ep_desc = create_ep(urb_priv->epid, urb_priv->first_sb, mem_flags);
if(ep_desc == NULL) {
/* Free any descriptors that we may have allocated before failure */
while(i > 0) {
i--;
kfree(urb_priv->intr_ep_pool[i]);
}
return -ENOMEM;
}
urb_priv->intr_ep_pool[i] = ep_desc;
}
urb_priv->intr_ep_pool_length = ep_count;
return 0;
}
/* DMA RX/TX functions */
/* ----------------------- */
static void tc_dma_init_rx_list(void) {
int i;
/* Setup descriptor list except last one */
for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
RxDescList[i].command = 0;
RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
RxDescList[i].hw_len = 0;
RxDescList[i].status = 0;
/* DMA IN cache bug. (struct etrax_dma_descr has the same layout as
USB_IN_Desc for the relevant fields.) */
prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
}
/* Special handling of last descriptor */
RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
RxDescList[i].next = virt_to_phys(&RxDescList[0]);
RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
RxDescList[i].hw_len = 0;
RxDescList[i].status = 0;
/* Setup list pointers that show progress in list */
myNextRxDesc = &RxDescList[0];
myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
flush_etrax_cache();
/* Point DMA to first descriptor in list and start it */
*R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
*R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
}
static void tc_dma_init_tx_bulk_list(void) {
int i;
volatile struct USB_EP_Desc *epDescr;
for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
epDescr = &(TxBulkEPList[i]);
CHECK_ALIGN(epDescr);
epDescr->hw_len = 0;
epDescr->command = IO_FIELD(USB_EP_command, epid, i);
epDescr->sub = 0;
epDescr->next = virt_to_phys(&TxBulkEPList[i + 1]);
/* Initiate two EPs, disabled and with the eol flag set. No need for any
preserved epid. */
/* The first one has the intr flag set so we get an interrupt when the DMA
channel is about to become disabled. */
CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
TxBulkDummyEPList[i][0].hw_len = 0;
TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
IO_STATE(USB_EP_command, eol, yes) |
IO_STATE(USB_EP_command, intr, yes));
TxBulkDummyEPList[i][0].sub = 0;
TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
/* The second one. */
CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
TxBulkDummyEPList[i][1].hw_len = 0;
TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
IO_STATE(USB_EP_command, eol, yes));
TxBulkDummyEPList[i][1].sub = 0;
/* The last dummy's next pointer is the same as the current EP's next pointer. */
TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
}
/* Special handling of last descr in list, make list circular */
epDescr = &TxBulkEPList[i];
CHECK_ALIGN(epDescr);
epDescr->hw_len = 0;
epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
IO_FIELD(USB_EP_command, epid, i);
epDescr->sub = 0;
epDescr->next = virt_to_phys(&TxBulkEPList[0]);
/* Init DMA sub-channel pointers to last item in each list */
*R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
/* No point in starting the bulk channel yet.
*R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
}
static void tc_dma_init_tx_ctrl_list(void) {
int i;
volatile struct USB_EP_Desc *epDescr;
for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
epDescr = &(TxCtrlEPList[i]);
CHECK_ALIGN(epDescr);
epDescr->hw_len = 0;
epDescr->command = IO_FIELD(USB_EP_command, epid, i);
epDescr->sub = 0;
epDescr->next = virt_to_phys(&TxCtrlEPList[i + 1]);
}
/* Special handling of last descr in list, make list circular */
epDescr = &TxCtrlEPList[i];
CHECK_ALIGN(epDescr);
epDescr->hw_len = 0;
epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
IO_FIELD(USB_EP_command, epid, i);
epDescr->sub = 0;
epDescr->next = virt_to_phys(&TxCtrlEPList[0]);
/* Init DMA sub-channel pointers to last item in each list */
*R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[i]);
/* No point in starting the ctrl channel yet.
*R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
}
static void tc_dma_init_tx_intr_list(void) {
int i;
TxIntrSB_zout.sw_len = 1;
TxIntrSB_zout.next = 0;
TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
IO_STATE(USB_SB_command, tt, zout) |
IO_STATE(USB_SB_command, full, yes) |
IO_STATE(USB_SB_command, eot, yes) |
IO_STATE(USB_SB_command, eol, yes));
for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
CHECK_ALIGN(&TxIntrEPList[i]);
TxIntrEPList[i].hw_len = 0;
TxIntrEPList[i].command =
(IO_STATE(USB_EP_command, eof, yes) |
IO_STATE(USB_EP_command, enable, yes) |
IO_FIELD(USB_EP_command, epid, INVALID_EPID));
TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
}
/* Special handling of last descr in list, make list circular */
CHECK_ALIGN(&TxIntrEPList[i]);
TxIntrEPList[i].hw_len = 0;
TxIntrEPList[i].command =
(IO_STATE(USB_EP_command, eof, yes) |
IO_STATE(USB_EP_command, eol, yes) |
IO_STATE(USB_EP_command, enable, yes) |
IO_FIELD(USB_EP_command, epid, INVALID_EPID));
TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
intr_dbg("Initiated Intr EP descriptor list\n");
/* Connect DMA 8 sub-channel 2 to first in list */
*R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
}
static void tc_dma_init_tx_isoc_list(void) {
int i;
DBFENTER;
/* Read comment at zout_buffer declaration for an explanation to this. */
TxIsocSB_zout.sw_len = 1;
TxIsocSB_zout.next = 0;
TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
IO_STATE(USB_SB_command, tt, zout) |
IO_STATE(USB_SB_command, full, yes) |
IO_STATE(USB_SB_command, eot, yes) |
IO_STATE(USB_SB_command, eol, yes));
/* The last isochronous EP descriptor is a dummy. */
for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
CHECK_ALIGN(&TxIsocEPList[i]);
TxIsocEPList[i].hw_len = 0;
TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
TxIsocEPList[i].sub = 0;
TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
}
CHECK_ALIGN(&TxIsocEPList[i]);
TxIsocEPList[i].hw_len = 0;
/* Must enable the last EP descr to get eof interrupt. */
TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
IO_STATE(USB_EP_command, eof, yes) |
IO_STATE(USB_EP_command, eol, yes) |
IO_FIELD(USB_EP_command, epid, INVALID_EPID));
TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
*R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
*R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
}
static int tc_dma_init(struct usb_hcd *hcd) {
tc_dma_init_rx_list();
tc_dma_init_tx_bulk_list();
tc_dma_init_tx_ctrl_list();
tc_dma_init_tx_intr_list();
tc_dma_init_tx_isoc_list();
if (cris_request_dma(USB_TX_DMA_NBR,
"ETRAX 100LX built-in USB (Tx)",
DMA_VERBOSE_ON_ERROR,
dma_usb)) {
err("Could not allocate DMA ch 8 for USB");
return -EBUSY;
}
if (cris_request_dma(USB_RX_DMA_NBR,
"ETRAX 100LX built-in USB (Rx)",
DMA_VERBOSE_ON_ERROR,
dma_usb)) {
err("Could not allocate DMA ch 9 for USB");
return -EBUSY;
}
*R_IRQ_MASK2_SET =
/* Note that these interrupts are not used. */
IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
/* Sub channel 1 (ctrl) descr. interrupts are used. */
IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
/* Sub channel 3 (isoc) descr. interrupts are used. */
IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
/* Note that the dma9_descr interrupt is not used. */
*R_IRQ_MASK2_SET =
IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
if (request_irq(ETRAX_USB_RX_IRQ, tc_dma_rx_interrupt, 0,
"ETRAX 100LX built-in USB (Rx)", hcd)) {
err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
return -EBUSY;
}
if (request_irq(ETRAX_USB_TX_IRQ, tc_dma_tx_interrupt, 0,
"ETRAX 100LX built-in USB (Tx)", hcd)) {
err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
return -EBUSY;
}
return 0;
}
static void tc_dma_destroy(void) {
free_irq(ETRAX_USB_RX_IRQ, NULL);
free_irq(ETRAX_USB_TX_IRQ, NULL);
cris_free_dma(USB_TX_DMA_NBR, "ETRAX 100LX built-in USB (Tx)");
cris_free_dma(USB_RX_DMA_NBR, "ETRAX 100LX built-in USB (Rx)");
}
static void tc_dma_link_intr_urb(struct urb *urb);
/* Handle processing of Bulk, Ctrl and Intr queues */
static void tc_dma_process_queue(int epid) {
struct urb *urb;
struct crisv10_urb_priv *urb_priv;
unsigned long flags;
char toggle;
if(epid_state[epid].disabled) {
/* Don't process any URBs on a disabled endpoint */
return;
}
/* Do not disturb us while fiddling with EPs and epids */
local_irq_save(flags);
/* For bulk, Ctrl and Intr can we only have one URB active at a time for
a specific EP. */
if(activeUrbList[epid] != NULL) {
/* An URB is already active on EP, skip checking queue */
local_irq_restore(flags);
return;
}
urb = urb_list_first(epid);
if(urb == NULL) {
/* No URB waiting in EP queue. Nothing do to */
local_irq_restore(flags);
return;
}
urb_priv = urb->hcpriv;
ASSERT(urb_priv != NULL);
ASSERT(urb_priv->urb_state == NOT_STARTED);
ASSERT(!usb_pipeisoc(urb->pipe));
/* Remove this URB from the queue and move it to active */
activeUrbList[epid] = urb;
urb_list_del(urb, epid);
urb_priv->urb_state = STARTED;
/* Reset error counters (regardless of which direction this traffic is). */
etrax_epid_clear_error(epid);
/* Special handling of Intr EP lists */
if(usb_pipeint(urb->pipe)) {
tc_dma_link_intr_urb(urb);
local_irq_restore(flags);
return;
}
/* Software must preset the toggle bits for Bulk and Ctrl */
if(usb_pipecontrol(urb->pipe)) {
/* Toggle bits are initialized only during setup transaction in a
CTRL transfer */
etrax_epid_set_toggle(epid, 0, 0);
etrax_epid_set_toggle(epid, 1, 0);
} else {
toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
usb_pipeout(urb->pipe));
etrax_epid_set_toggle(epid, usb_pipeout(urb->pipe), toggle);
}
tc_dbg("Added SBs from (URB:0x%x %s %s) to epid %d: %s\n",
(unsigned int)urb, str_dir(urb->pipe), str_type(urb->pipe), epid,
sblist_to_str(urb_priv->first_sb));
/* We start the DMA sub channel without checking if it's running or not,
because:
1) If it's already running, issuing the start command is a nop.
2) We avoid a test-and-set race condition. */
switch(usb_pipetype(urb->pipe)) {
case PIPE_BULK:
/* Assert that the EP descriptor is disabled. */
ASSERT(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
/* Set up and enable the EP descriptor. */
TxBulkEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
TxBulkEPList[epid].hw_len = 0;
TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
/* Check if the dummy list is already with us (if several urbs were queued). */
if (usb_pipein(urb->pipe) && (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0]))) {
tc_dbg("Inviting dummy list to the party for urb 0x%lx, epid %d",
(unsigned long)urb, epid);
/* We don't need to check if the DMA is at this EP or not before changing the
next pointer, since we will do it in one 32-bit write (EP descriptors are
32-bit aligned). */
TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
}
restart_dma8_sub0();
/* Update/restart the bulk start timer since we just started the channel.*/
mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
/* Update/restart the bulk eot timer since we just inserted traffic. */
mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
break;
case PIPE_CONTROL:
/* Assert that the EP descriptor is disabled. */
ASSERT(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
/* Set up and enable the EP descriptor. */
TxCtrlEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
TxCtrlEPList[epid].hw_len = 0;
TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
*R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
break;
}
local_irq_restore(flags);
}
static void tc_dma_link_intr_urb(struct urb *urb) {
struct crisv10_urb_priv *urb_priv = urb->hcpriv;
volatile struct USB_EP_Desc *tmp_ep;
struct USB_EP_Desc *ep_desc;
int i = 0, epid;
int pool_idx = 0;
ASSERT(urb_priv != NULL);
epid = urb_priv->epid;
ASSERT(urb_priv->interval > 0);
ASSERT(urb_priv->intr_ep_pool_length > 0);
tmp_ep = &TxIntrEPList[0];
/* Only insert one EP descriptor in list for Out Intr URBs.
We can only handle Out Intr with interval of 128ms because
it's not possible to insert several Out Intr EPs because they
are not consumed by the DMA. */
if(usb_pipeout(urb->pipe)) {
ep_desc = urb_priv->intr_ep_pool[0];
ASSERT(ep_desc);
ep_desc->next = tmp_ep->next;
tmp_ep->next = virt_to_phys(ep_desc);
i++;
} else {
/* Loop through Intr EP descriptor list and insert EP for URB at
specified interval */
do {
/* Each EP descriptor with eof flag sat signals a new frame */
if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
/* Insert a EP from URBs EP pool at correct interval */
if ((i % urb_priv->interval) == 0) {
ep_desc = urb_priv->intr_ep_pool[pool_idx];
ASSERT(ep_desc);
ep_desc->next = tmp_ep->next;
tmp_ep->next = virt_to_phys(ep_desc);
pool_idx++;
ASSERT(pool_idx <= urb_priv->intr_ep_pool_length);
}
i++;
}
tmp_ep = (struct USB_EP_Desc *)phys_to_virt(tmp_ep->next);
} while(tmp_ep != &TxIntrEPList[0]);
}
intr_dbg("Added SBs to intr epid %d: %s interval:%d (%d EP)\n", epid,
sblist_to_str(urb_priv->first_sb), urb_priv->interval, pool_idx);
/* We start the DMA sub channel without checking if it's running or not,
because:
1) If it's already running, issuing the start command is a nop.
2) We avoid a test-and-set race condition. */
*R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
}
static void tc_dma_process_isoc_urb(struct urb *urb) {
unsigned long flags;
struct crisv10_urb_priv *urb_priv = urb->hcpriv;
int epid;
/* Do not disturb us while fiddling with EPs and epids */
local_irq_save(flags);
ASSERT(urb_priv);
ASSERT(urb_priv->first_sb);
epid = urb_priv->epid;
if(activeUrbList[epid] == NULL) {
/* EP is idle, so make this URB active */
activeUrbList[epid] = urb;
urb_list_del(urb, epid);
ASSERT(TxIsocEPList[epid].sub == 0);
ASSERT(!(TxIsocEPList[epid].command &
IO_STATE(USB_EP_command, enable, yes)));
/* Differentiate between In and Out Isoc. Because In SBs are not consumed*/
if(usb_pipein(urb->pipe)) {
/* Each EP for In Isoc will have only one SB descriptor, setup when
submitting the first active urb. We do it here by copying from URBs
pre-allocated SB. */
memcpy((void *)&(TxIsocSBList[epid]), urb_priv->first_sb,
sizeof(TxIsocSBList[epid]));
TxIsocEPList[epid].hw_len = 0;
TxIsocEPList[epid].sub = virt_to_phys(&(TxIsocSBList[epid]));
} else {
/* For Out Isoc we attach the pre-allocated list of SBs for the URB */
TxIsocEPList[epid].hw_len = 0;
TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
isoc_dbg("Attached first URB:0x%x[%d] to epid:%d first_sb:0x%x"
" last_sb::0x%x\n",
(unsigned int)urb, urb_priv->urb_num, epid,
(unsigned int)(urb_priv->first_sb),
(unsigned int)(urb_priv->last_sb));
}
if (urb->transfer_flags & URB_ISO_ASAP) {
/* The isoc transfer should be started as soon as possible. The
start_frame field is a return value if URB_ISO_ASAP was set. Comparing
R_USB_FM_NUMBER with a USB Chief trace shows that the first isoc IN
token is sent 2 frames later. I'm not sure how this affects usage of
the start_frame field by the device driver, or how it affects things
when USB_ISO_ASAP is not set, so therefore there's no compensation for
the 2 frame "lag" here. */
urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
urb_priv->urb_state = STARTED;
isoc_dbg("URB_ISO_ASAP set, urb->start_frame set to %d\n",
urb->start_frame);
} else {
/* Not started yet. */
urb_priv->urb_state = NOT_STARTED;
isoc_warn("urb_priv->urb_state set to NOT_STARTED for URB:0x%x\n",
(unsigned int)urb);
}
} else {
/* An URB is already active on the EP. Leave URB in queue and let
finish_isoc_urb process it after current active URB */
ASSERT(TxIsocEPList[epid].sub != 0);
if(usb_pipein(urb->pipe)) {
/* Because there already is a active In URB on this epid we do nothing
and the finish_isoc_urb() function will handle switching to next URB*/
} else { /* For Out Isoc, insert new URBs traffic last in SB-list. */
struct USB_SB_Desc *temp_sb_desc;
/* Set state STARTED to all Out Isoc URBs added to SB list because we
don't know how many of them that are finished before descr interrupt*/
urb_priv->urb_state = STARTED;
/* Find end of current SB list by looking for SB with eol flag sat */
temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
IO_STATE(USB_SB_command, eol, yes)) {
ASSERT(temp_sb_desc->next);
temp_sb_desc = phys_to_virt(temp_sb_desc->next);
}
isoc_dbg("Appended URB:0x%x[%d] (first:0x%x last:0x%x) to epid:%d"
" sub:0x%x eol:0x%x\n",
(unsigned int)urb, urb_priv->urb_num,
(unsigned int)(urb_priv->first_sb),
(unsigned int)(urb_priv->last_sb), epid,
(unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
(unsigned int)temp_sb_desc);
/* Next pointer must be set before eol is removed. */
temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
/* Clear the previous end of list flag since there is a new in the
added SB descriptor list. */
temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
__u32 epid_data;
/* 8.8.5 in Designer's Reference says we should check for and correct
any errors in the EP here. That should not be necessary if
epid_attn is handled correctly, so we assume all is ok. */
epid_data = etrax_epid_iso_get(epid);
if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) !=
IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
isoc_err("Disabled Isoc EP with error:%d on epid:%d when appending"
" URB:0x%x[%d]\n",
IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data), epid,
(unsigned int)urb, urb_priv->urb_num);
}
/* The SB list was exhausted. */
if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
/* The new sublist did not get processed before the EP was
disabled. Setup the EP again. */
if(virt_to_phys(temp_sb_desc) == TxIsocEPList[epid].sub) {
isoc_dbg("EP for epid:%d stoped at SB:0x%x before newly inserted"
", restarting from this URBs SB:0x%x\n",
epid, (unsigned int)temp_sb_desc,
(unsigned int)(urb_priv->first_sb));
TxIsocEPList[epid].hw_len = 0;
TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
/* Enable the EP again so data gets processed this time */
TxIsocEPList[epid].command |=
IO_STATE(USB_EP_command, enable, yes);
} else {
/* The EP has been disabled but not at end this URB (god knows
where). This should generate an epid_attn so we should not be
here */
isoc_warn("EP was disabled on sb:0x%x before SB list for"
" URB:0x%x[%d] got processed\n",
(unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
(unsigned int)urb, urb_priv->urb_num);
}
} else {
/* This might happend if we are slow on this function and isn't
an error. */
isoc_dbg("EP was disabled and finished with SBs from appended"
" URB:0x%x[%d]\n", (unsigned int)urb, urb_priv->urb_num);
}
}
}
}
/* Start the DMA sub channel */
*R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
local_irq_restore(flags);
}
static void tc_dma_unlink_intr_urb(struct urb *urb) {
struct crisv10_urb_priv *urb_priv = urb->hcpriv;
volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
volatile struct USB_EP_Desc *unlink_ep; /* The one we should remove from
the list. */
int count = 0;
volatile int timeout = 10000;
int epid;
/* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the
List". */
ASSERT(urb_priv);
ASSERT(urb_priv->intr_ep_pool_length > 0);
epid = urb_priv->epid;
/* First disable all Intr EPs belonging to epid for this URB */
first_ep = &TxIntrEPList[0];
curr_ep = first_ep;
do {
next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
/* Disable EP */
next_ep->command &= ~IO_MASK(USB_EP_command, enable);
}
curr_ep = phys_to_virt(curr_ep->next);
} while (curr_ep != first_ep);
/* Now unlink all EPs belonging to this epid from Descr list */
first_ep = &TxIntrEPList[0];
curr_ep = first_ep;
do {
next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
/* This is the one we should unlink. */
unlink_ep = next_ep;
/* Actually unlink the EP from the DMA list. */
curr_ep->next = unlink_ep->next;
/* Wait until the DMA is no longer at this descriptor. */
while((*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep)) &&
(timeout-- > 0));
count++;
}
curr_ep = phys_to_virt(curr_ep->next);
} while (curr_ep != first_ep);
if(count != urb_priv->intr_ep_pool_length) {
intr_warn("Unlinked %d of %d Intr EPs for URB:0x%x[%d]\n", count,
urb_priv->intr_ep_pool_length, (unsigned int)urb,
urb_priv->urb_num);
} else {
intr_dbg("Unlinked %d of %d interrupt EPs for URB:0x%x\n", count,
urb_priv->intr_ep_pool_length, (unsigned int)urb);
}
}
static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
int timer) {
unsigned long flags;
int epid;
struct urb *urb;
struct crisv10_urb_priv * urb_priv;
__u32 epid_data;
/* Protect TxEPList */
local_irq_save(flags);
for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
/* A finished EP descriptor is disabled and has a valid sub pointer */
if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
(TxBulkEPList[epid].sub != 0)) {
/* Get the active URB for this epid */
urb = activeUrbList[epid];
/* Sanity checks */
ASSERT(urb);
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
/* Only handle finished out Bulk EPs here,
and let RX interrupt take care of the rest */
if(!epid_out_traffic(epid)) {
continue;
}
if(timer) {
tc_warn("Found finished %s Bulk epid:%d URB:0x%x[%d] from timeout\n",
epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
urb_priv->urb_num);
} else {
tc_dbg("Found finished %s Bulk epid:%d URB:0x%x[%d] from interrupt\n",
epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
urb_priv->urb_num);
}
if(urb_priv->urb_state == UNLINK) {
/* This Bulk URB is requested to be unlinked, that means that the EP
has been disabled and we might not have sent all data */
tc_finish_urb(hcd, urb, urb->status);
continue;
}
ASSERT(urb_priv->urb_state == STARTED);
if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
tc_err("Endpoint got disabled before reaching last sb\n");
}
epid_data = etrax_epid_get(epid);
if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
/* This means that the endpoint has no error, is disabled
and had inserted traffic, i.e. transfer successfully completed. */
tc_finish_urb(hcd, urb, 0);
} else {
/* Shouldn't happen. We expect errors to be caught by epid
attention. */
tc_err("Found disabled bulk EP desc (epid:%d error:%d)\n",
epid, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
}
} else {
tc_dbg("Ignoring In Bulk epid:%d, let RX interrupt handle it\n", epid);
}
}
local_irq_restore(flags);
}
static void check_finished_ctrl_tx_epids(struct usb_hcd *hcd) {
unsigned long flags;
int epid;
struct urb *urb;
struct crisv10_urb_priv * urb_priv;
__u32 epid_data;
/* Protect TxEPList */
local_irq_save(flags);
for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
if(epid == DUMMY_EPID)
continue;
/* A finished EP descriptor is disabled and has a valid sub pointer */
if (!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
(TxCtrlEPList[epid].sub != 0)) {
/* Get the active URB for this epid */
urb = activeUrbList[epid];
if(urb == NULL) {
tc_warn("Found finished Ctrl epid:%d with no active URB\n", epid);
continue;
}
/* Sanity checks */
ASSERT(usb_pipein(urb->pipe));
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
if (phys_to_virt(TxCtrlEPList[epid].sub) != urb_priv->last_sb) {
tc_err("Endpoint got disabled before reaching last sb\n");
}
epid_data = etrax_epid_get(epid);
if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
/* This means that the endpoint has no error, is disabled
and had inserted traffic, i.e. transfer successfully completed. */
/* Check if RX-interrupt for In Ctrl has been processed before
finishing the URB */
if(urb_priv->ctrl_rx_done) {
tc_dbg("Finishing In Ctrl URB:0x%x[%d] in tx_interrupt\n",
(unsigned int)urb, urb_priv->urb_num);
tc_finish_urb(hcd, urb, 0);
} else {
/* If we get zout descriptor interrupt before RX was done for a
In Ctrl transfer, then we flag that and it will be finished
in the RX-Interrupt */
urb_priv->ctrl_zout_done = 1;
tc_dbg("Got zout descr interrupt before RX interrupt\n");
}
} else {
/* Shouldn't happen. We expect errors to be caught by epid
attention. */
tc_err("Found disabled Ctrl EP desc (epid:%d URB:0x%x[%d]) error_code:%d\n", epid, (unsigned int)urb, urb_priv->urb_num, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
__dump_ep_desc(&(TxCtrlEPList[epid]));
__dump_ept_data(epid);
}
}
}
local_irq_restore(flags);
}
/* This function goes through all epids that are setup for Out Isoc transfers
and marks (isoc_out_done) all queued URBs that the DMA has finished
transfer for.
No URB completetion is done here to make interrupt routine return quickly.
URBs are completed later with help of complete_isoc_bottom_half() that
becomes schedules when this functions is finished. */
static void check_finished_isoc_tx_epids(void) {
unsigned long flags;
int epid;
struct urb *urb;
struct crisv10_urb_priv * urb_priv;
struct USB_SB_Desc* sb_desc;
int epid_done;
/* Protect TxIsocEPList */
local_irq_save(flags);
for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
if (TxIsocEPList[epid].sub == 0 || epid == INVALID_EPID ||
!epid_out_traffic(epid)) {
/* Nothing here to see. */
continue;
}
ASSERT(epid_inuse(epid));
ASSERT(epid_isoc(epid));
sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
/* Find the last descriptor of the currently active URB for this ep.
This is the first descriptor in the sub list marked for a descriptor
interrupt. */
while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
}
ASSERT(sb_desc);
isoc_dbg("Descr IRQ checking epid:%d sub:0x%x intr:0x%x\n",
epid, (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
(unsigned int)sb_desc);
urb = activeUrbList[epid];
if(urb == NULL) {
isoc_err("Isoc Descr irq on epid:%d with no active URB\n", epid);
continue;
}
epid_done = 0;
while(urb && !epid_done) {
/* Sanity check. */
ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
ASSERT(usb_pipeout(urb->pipe));
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
ASSERT(urb_priv->urb_state == STARTED ||
urb_priv->urb_state == UNLINK);
if (sb_desc != urb_priv->last_sb) {
/* This urb has been sent. */
urb_priv->isoc_out_done = 1;
} else { /* Found URB that has last_sb as the interrupt reason */
/* Check if EP has been disabled, meaning that all transfers are done*/
if(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
ASSERT((sb_desc->command & IO_MASK(USB_SB_command, eol)) ==
IO_STATE(USB_SB_command, eol, yes));
ASSERT(sb_desc->next == 0);
urb_priv->isoc_out_done = 1;
} else {
isoc_dbg("Skipping URB:0x%x[%d] because EP not disabled yet\n",
(unsigned int)urb, urb_priv->urb_num);
}
/* Stop looking any further in queue */
epid_done = 1;
}
if (!epid_done) {
if(urb == activeUrbList[epid]) {
urb = urb_list_first(epid);
} else {
urb = urb_list_next(urb, epid);
}
}
} /* END: while(urb && !epid_done) */
}
local_irq_restore(flags);
}
/* This is where the Out Isoc URBs are realy completed. This function is
scheduled from tc_dma_tx_interrupt() when one or more Out Isoc transfers
are done. This functions completes all URBs earlier marked with
isoc_out_done by fast interrupt routine check_finished_isoc_tx_epids() */
static void complete_isoc_bottom_half(struct work_struct* work) {
struct crisv10_isoc_complete_data *comp_data;
struct usb_iso_packet_descriptor *packet;
struct crisv10_urb_priv * urb_priv;
unsigned long flags;
struct urb* urb;
int epid_done;
int epid;
int i;
comp_data = container_of(work, struct crisv10_isoc_complete_data, usb_bh);
local_irq_save(flags);
for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
if(!epid_inuse(epid) || !epid_isoc(epid) || !epid_out_traffic(epid) || epid == DUMMY_EPID) {
/* Only check valid Out Isoc epids */
continue;
}
isoc_dbg("Isoc bottom-half checking epid:%d, sub:0x%x\n", epid,
(unsigned int)phys_to_virt(TxIsocEPList[epid].sub));
/* The descriptor interrupt handler has marked all transmitted Out Isoc
URBs with isoc_out_done. Now we traverse all epids and for all that
have out Isoc traffic we traverse its URB list and complete the
transmitted URBs. */
epid_done = 0;
while (!epid_done) {
/* Get the active urb (if any) */
urb = activeUrbList[epid];
if (urb == 0) {
isoc_dbg("No active URB on epid:%d anymore\n", epid);
epid_done = 1;
continue;
}
/* Sanity check. */
ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
ASSERT(usb_pipeout(urb->pipe));
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
if (!(urb_priv->isoc_out_done)) {
/* We have reached URB that isn't flaged done yet, stop traversing. */
isoc_dbg("Stoped traversing Out Isoc URBs on epid:%d"
" before not yet flaged URB:0x%x[%d]\n",
epid, (unsigned int)urb, urb_priv->urb_num);
epid_done = 1;
continue;
}
/* This urb has been sent. */
isoc_dbg("Found URB:0x%x[%d] that is flaged isoc_out_done\n",
(unsigned int)urb, urb_priv->urb_num);
/* Set ok on transfered packets for this URB and finish it */
for (i = 0; i < urb->number_of_packets; i++) {
packet = &urb->iso_frame_desc[i];
packet->status = 0;
packet->actual_length = packet->length;
}
urb_priv->isoc_packet_counter = urb->number_of_packets;
tc_finish_urb(comp_data->hcd, urb, 0);
} /* END: while(!epid_done) */
} /* END: for(epid...) */
local_irq_restore(flags);
kmem_cache_free(isoc_compl_cache, comp_data);
}
static void check_finished_intr_tx_epids(struct usb_hcd *hcd) {
unsigned long flags;
int epid;
struct urb *urb;
struct crisv10_urb_priv * urb_priv;
volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
/* Protect TxintrEPList */
local_irq_save(flags);
for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
if(!epid_inuse(epid) || !epid_intr(epid) || !epid_out_traffic(epid)) {
/* Nothing to see on this epid. Only check valid Out Intr epids */
continue;
}
urb = activeUrbList[epid];
if(urb == 0) {
intr_warn("Found Out Intr epid:%d with no active URB\n", epid);
continue;
}
/* Sanity check. */
ASSERT(usb_pipetype(urb->pipe) == PIPE_INTERRUPT);
ASSERT(usb_pipeout(urb->pipe));
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
/* Go through EPs between first and second sof-EP. It's here Out Intr EPs
are inserted.*/
curr_ep = &TxIntrEPList[0];
do {
next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
if(next_ep == urb_priv->intr_ep_pool[0]) {
/* We found the Out Intr EP for this epid */
/* Disable it so it doesn't get processed again */
next_ep->command &= ~IO_MASK(USB_EP_command, enable);
/* Finish the active Out Intr URB with status OK */
tc_finish_urb(hcd, urb, 0);
}
curr_ep = phys_to_virt(curr_ep->next);
} while (curr_ep != &TxIntrEPList[1]);
}
local_irq_restore(flags);
}
/* Interrupt handler for DMA8/IRQ24 with subchannels (called from hardware intr) */
static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc) {
struct usb_hcd *hcd = (struct usb_hcd*)vhc;
ASSERT(hcd);
if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
/* Clear this interrupt */
*R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
restart_dma8_sub0();
}
if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
/* Clear this interrupt */
*R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
check_finished_ctrl_tx_epids(hcd);
}
if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
/* Clear this interrupt */
*R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
check_finished_intr_tx_epids(hcd);
}
if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
struct crisv10_isoc_complete_data* comp_data;
/* Flag done Out Isoc for later completion */
check_finished_isoc_tx_epids();
/* Clear this interrupt */
*R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
/* Schedule bottom half of Out Isoc completion function. This function
finishes the URBs marked with isoc_out_done */
comp_data = (struct crisv10_isoc_complete_data*)
kmem_cache_alloc(isoc_compl_cache, GFP_ATOMIC);
ASSERT(comp_data != NULL);
comp_data ->hcd = hcd;
INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half);
schedule_work(&comp_data->usb_bh);
}
return IRQ_HANDLED;
}
/* Interrupt handler for DMA9/IRQ25 (called from hardware intr) */
static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc) {
unsigned long flags;
struct urb *urb;
struct usb_hcd *hcd = (struct usb_hcd*)vhc;
struct crisv10_urb_priv *urb_priv;
int epid = 0;
int real_error;
ASSERT(hcd);
/* Clear this interrupt. */
*R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
/* Custom clear interrupt for this interrupt */
/* The reason we cli here is that we call the driver's callback functions. */
local_irq_save(flags);
/* Note that this while loop assumes that all packets span only
one rx descriptor. */
while(myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
/* Get the active URB for this epid */
urb = activeUrbList[epid];
ASSERT(epid_inuse(epid));
if (!urb) {
dma_err("No urb for epid %d in rx interrupt\n", epid);
goto skip_out;
}
/* Check if any errors on epid */
real_error = 0;
if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
__u32 r_usb_ept_data;
if (usb_pipeisoc(urb->pipe)) {
r_usb_ept_data = etrax_epid_iso_get(epid);
if((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
(IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
(myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
/* Not an error, just a failure to receive an expected iso
in packet in this frame. This is not documented
in the designers reference. Continue processing.
*/
} else real_error = 1;
} else real_error = 1;
}
if(real_error) {
dma_err("Error in RX descr on epid:%d for URB 0x%x",
epid, (unsigned int)urb);
dump_ept_data(epid);
dump_in_desc(myNextRxDesc);
goto skip_out;
}
urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
ASSERT(urb_priv);
ASSERT(urb_priv->urb_state == STARTED ||
urb_priv->urb_state == UNLINK);
if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
(usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
(usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
/* We get nodata for empty data transactions, and the rx descriptor's
hw_len field is not valid in that case. No data to copy in other
words. */
if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
/* No data to copy */
} else {
/*
dma_dbg("Processing RX for URB:0x%x epid:%d (data:%d ofs:%d)\n",
(unsigned int)urb, epid, myNextRxDesc->hw_len,
urb_priv->rx_offset);
*/
/* Only copy data if URB isn't flaged to be unlinked*/
if(urb_priv->urb_state != UNLINK) {
/* Make sure the data fits in the buffer. */
if(urb_priv->rx_offset + myNextRxDesc->hw_len
<= urb->transfer_buffer_length) {
/* Copy the data to URBs buffer */
memcpy(urb->transfer_buffer + urb_priv->rx_offset,
phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
urb_priv->rx_offset += myNextRxDesc->hw_len;
} else {
/* Signal overflow when returning URB */
urb->status = -EOVERFLOW;
tc_finish_urb_later(hcd, urb, urb->status);
}
}
}
/* Check if it was the last packet in the transfer */
if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
/* Special handling for In Ctrl URBs. */
if(usb_pipecontrol(urb->pipe) && usb_pipein(urb->pipe) &&
!(urb_priv->ctrl_zout_done)) {
/* Flag that RX part of Ctrl transfer is done. Because zout descr
interrupt hasn't happend yet will the URB be finished in the
TX-Interrupt. */
urb_priv->ctrl_rx_done = 1;
tc_dbg("Not finishing In Ctrl URB:0x%x from rx_interrupt, waiting"
" for zout\n", (unsigned int)urb);
} else {
tc_finish_urb(hcd, urb, 0);
}
}
} else { /* ISOC RX */
/*
isoc_dbg("Processing RX for epid:%d (URB:0x%x) ISOC pipe\n",
epid, (unsigned int)urb);
*/
struct usb_iso_packet_descriptor *packet;
if (urb_priv->urb_state == UNLINK) {
isoc_warn("Ignoring Isoc Rx data for urb being unlinked.\n");
goto skip_out;
} else if (urb_priv->urb_state == NOT_STARTED) {
isoc_err("What? Got Rx data for Isoc urb that isn't started?\n");
goto skip_out;
}
packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
ASSERT(packet);
packet->status = 0;
if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
/* We get nodata for empty data transactions, and the rx descriptor's
hw_len field is not valid in that case. We copy 0 bytes however to
stay in synch. */
packet->actual_length = 0;
} else {
packet->actual_length = myNextRxDesc->hw_len;
/* Make sure the data fits in the buffer. */
ASSERT(packet->actual_length <= packet->length);
memcpy(urb->transfer_buffer + packet->offset,
phys_to_virt(myNextRxDesc->buf), packet->actual_length);
if(packet->actual_length > 0)
isoc_dbg("Copied %d bytes, packet %d for URB:0x%x[%d]\n",
packet->actual_length, urb_priv->isoc_packet_counter,
(unsigned int)urb, urb_priv->urb_num);
}
/* Increment the packet counter. */
urb_priv->isoc_packet_counter++;
/* Note that we don't care about the eot field in the rx descriptor's
status. It will always be set for isoc traffic. */
if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
/* Complete the urb with status OK. */
tc_finish_urb(hcd, urb, 0);
}
}
skip_out:
myNextRxDesc->status = 0;
myNextRxDesc->command |= IO_MASK(USB_IN_command, eol);
myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
myLastRxDesc = myNextRxDesc;
myNextRxDesc = phys_to_virt(myNextRxDesc->next);
flush_etrax_cache();
*R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, restart);
}
local_irq_restore(flags);
return IRQ_HANDLED;
}
static void tc_bulk_start_timer_func(unsigned long dummy) {
/* We might enable an EP descriptor behind the current DMA position when
it's about to decide that there are no more bulk traffic and it should
stop the bulk channel.
Therefore we periodically check if the bulk channel is stopped and there
is an enabled bulk EP descriptor, in which case we start the bulk
channel. */
if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
int epid;
timer_dbg("bulk_start_timer: Bulk DMA channel not running.\n");
for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
timer_warn("Found enabled EP for epid %d, starting bulk channel.\n",
epid);
restart_dma8_sub0();
/* Restart the bulk eot timer since we just started the bulk channel.*/
mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
/* No need to search any further. */
break;
}
}
} else {
timer_dbg("bulk_start_timer: Bulk DMA channel running.\n");
}
}
static void tc_bulk_eot_timer_func(unsigned long dummy) {
struct usb_hcd *hcd = (struct usb_hcd*)dummy;
ASSERT(hcd);
/* Because of a race condition in the top half, we might miss a bulk eot.
This timer "simulates" a bulk eot if we don't get one for a while,
hopefully correcting the situation. */
timer_dbg("bulk_eot_timer timed out.\n");
check_finished_bulk_tx_epids(hcd, 1);
}
/*************************************************************/
/*************************************************************/
/* Device driver block */
/*************************************************************/
/*************************************************************/
/* Forward declarations for device driver functions */
static int devdrv_hcd_probe(struct device *);
static int devdrv_hcd_remove(struct device *);
#ifdef CONFIG_PM
static int devdrv_hcd_suspend(struct device *, u32, u32);
static int devdrv_hcd_resume(struct device *, u32);
#endif /* CONFIG_PM */
/* the device */
static struct platform_device *devdrv_hc_platform_device;
/* device driver interface */
static struct device_driver devdrv_hc_device_driver = {
.name = (char *) hc_name,
.bus = &platform_bus_type,
.probe = devdrv_hcd_probe,
.remove = devdrv_hcd_remove,
#ifdef CONFIG_PM
.suspend = devdrv_hcd_suspend,
.resume = devdrv_hcd_resume,
#endif /* CONFIG_PM */
};
/* initialize the host controller and driver */
static int __init_or_module devdrv_hcd_probe(struct device *dev)
{
struct usb_hcd *hcd;
struct crisv10_hcd *crisv10_hcd;
int retval;
/* Check DMA burst length */
if(IO_EXTRACT(R_BUS_CONFIG, dma_burst, *R_BUS_CONFIG) !=
IO_STATE(R_BUS_CONFIG, dma_burst, burst32)) {
devdrv_err("Invalid DMA burst length in Etrax 100LX,"
" needs to be 32\n");
return -EPERM;
}
hcd = usb_create_hcd(&crisv10_hc_driver, dev, dev_name(dev));
if (!hcd)
return -ENOMEM;
crisv10_hcd = hcd_to_crisv10_hcd(hcd);
spin_lock_init(&crisv10_hcd->lock);
crisv10_hcd->num_ports = num_ports();
crisv10_hcd->running = 0;
dev_set_drvdata(dev, crisv10_hcd);
devdrv_dbg("ETRAX USB IRQs HC:%d RX:%d TX:%d\n", ETRAX_USB_HC_IRQ,
ETRAX_USB_RX_IRQ, ETRAX_USB_TX_IRQ);
/* Print out chip version read from registers */
int rev_maj = *R_USB_REVISION & IO_MASK(R_USB_REVISION, major);
int rev_min = *R_USB_REVISION & IO_MASK(R_USB_REVISION, minor);
if(rev_min == 0) {
devdrv_info("Etrax 100LX USB Revision %d v1,2\n", rev_maj);
} else {
devdrv_info("Etrax 100LX USB Revision %d v%d\n", rev_maj, rev_min);
}
devdrv_info("Bulk timer interval, start:%d eot:%d\n",
BULK_START_TIMER_INTERVAL,
BULK_EOT_TIMER_INTERVAL);
/* Init root hub data structures */
if(rh_init()) {
devdrv_err("Failed init data for Root Hub\n");
retval = -ENOMEM;
}
if(port_in_use(0)) {
if (cris_request_io_interface(if_usb_1, "ETRAX100LX USB-HCD")) {
printk(KERN_CRIT "usb-host: request IO interface usb1 failed");
retval = -EBUSY;
goto out;
}
devdrv_info("Claimed interface for USB physical port 1\n");
}
if(port_in_use(1)) {
if (cris_request_io_interface(if_usb_2, "ETRAX100LX USB-HCD")) {
/* Free first interface if second failed to be claimed */
if(port_in_use(0)) {
cris_free_io_interface(if_usb_1);
}
printk(KERN_CRIT "usb-host: request IO interface usb2 failed");
retval = -EBUSY;
goto out;
}
devdrv_info("Claimed interface for USB physical port 2\n");
}
/* Init transfer controller structs and locks */
if((retval = tc_init(hcd)) != 0) {
goto out;
}
/* Attach interrupt functions for DMA and init DMA controller */
if((retval = tc_dma_init(hcd)) != 0) {
goto out;
}
/* Attach the top IRQ handler for USB controller interrupts */
if (request_irq(ETRAX_USB_HC_IRQ, crisv10_hcd_top_irq, 0,
"ETRAX 100LX built-in USB (HC)", hcd)) {
err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
retval = -EBUSY;
goto out;
}
/* iso_eof is only enabled when isoc traffic is running. */
*R_USB_IRQ_MASK_SET =
/* IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) | */
IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
crisv10_ready_wait();
/* Reset the USB interface. */
*R_USB_COMMAND =
IO_STATE(R_USB_COMMAND, port_sel, nop) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
/* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to
0x2A30 (10800), to guarantee that control traffic gets 10% of the
bandwidth, and periodic transfer may allocate the rest (90%).
This doesn't work though.
The value 11960 is chosen to be just after the SOF token, with a couple
of bit times extra for possible bit stuffing. */
*R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
crisv10_ready_wait();
/* Configure the USB interface as a host controller. */
*R_USB_COMMAND =
IO_STATE(R_USB_COMMAND, port_sel, nop) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
/* Check so controller not busy before enabling ports */
crisv10_ready_wait();
/* Enable selected USB ports */
if(port_in_use(0)) {
*R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
} else {
*R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
}
if(port_in_use(1)) {
*R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
} else {
*R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
}
crisv10_ready_wait();
/* Start processing of USB traffic. */
*R_USB_COMMAND =
IO_STATE(R_USB_COMMAND, port_sel, nop) |
IO_STATE(R_USB_COMMAND, port_cmd, reset) |
IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
/* Do not continue probing initialization before USB interface is done */
crisv10_ready_wait();
/* Register our Host Controller to USB Core
* Finish the remaining parts of generic HCD initialization: allocate the
* buffers of consistent memory, register the bus
* and call the driver's reset() and start() routines. */
retval = usb_add_hcd(hcd, ETRAX_USB_HC_IRQ, IRQF_DISABLED);
if (retval != 0) {
devdrv_err("Failed registering HCD driver\n");
goto out;
}
return 0;
out:
devdrv_hcd_remove(dev);
return retval;
}
/* cleanup after the host controller and driver */
static int __init_or_module devdrv_hcd_remove(struct device *dev)
{
struct crisv10_hcd *crisv10_hcd = dev_get_drvdata(dev);
struct usb_hcd *hcd;
if (!crisv10_hcd)
return 0;
hcd = crisv10_hcd_to_hcd(crisv10_hcd);
/* Stop USB Controller in Etrax 100LX */
crisv10_hcd_reset(hcd);
usb_remove_hcd(hcd);
devdrv_dbg("Removed HCD from USB Core\n");
/* Free USB Controller IRQ */
free_irq(ETRAX_USB_HC_IRQ, NULL);
/* Free resources */
tc_dma_destroy();
tc_destroy();
if(port_in_use(0)) {
cris_free_io_interface(if_usb_1);
}
if(port_in_use(1)) {
cris_free_io_interface(if_usb_2);
}
devdrv_dbg("Freed all claimed resources\n");
return 0;
}
#ifdef CONFIG_PM
static int devdrv_hcd_suspend(struct usb_hcd *hcd, u32 state, u32 level)
{
return 0; /* no-op for now */
}
static int devdrv_hcd_resume(struct usb_hcd *hcd, u32 level)
{
return 0; /* no-op for now */
}
#endif /* CONFIG_PM */
/*************************************************************/
/*************************************************************/
/* Module block */
/*************************************************************/
/*************************************************************/
/* register driver */
static int __init module_hcd_init(void)
{
if (usb_disabled())
return -ENODEV;
/* Here we select enabled ports by following defines created from
menuconfig */
#ifndef CONFIG_ETRAX_USB_HOST_PORT1
ports &= ~(1<<0);
#endif
#ifndef CONFIG_ETRAX_USB_HOST_PORT2
ports &= ~(1<<1);
#endif
printk(KERN_INFO "%s version "VERSION" "COPYRIGHT"\n", product_desc);
devdrv_hc_platform_device =
platform_device_register_simple((char *) hc_name, 0, NULL, 0);
if (IS_ERR(devdrv_hc_platform_device))
return PTR_ERR(devdrv_hc_platform_device);
return driver_register(&devdrv_hc_device_driver);
/*
* Note that we do not set the DMA mask for the device,
* i.e. we pretend that we will use PIO, since no specific
* allocation routines are needed for DMA buffers. This will
* cause the HCD buffer allocation routines to fall back to
* kmalloc().
*/
}
/* unregister driver */
static void __exit module_hcd_exit(void)
{
driver_unregister(&devdrv_hc_device_driver);
}
/* Module hooks */
module_init(module_hcd_init);
module_exit(module_hcd_exit);
|