blob: 34bf929edafa837bdc8162be714259076e42cd84 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
|
// SPDX-License-Identifier: GPL-2.0-or-later
#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6318_H
#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6318_H
#define BCM6318_IRQ_TIMER0 0
#define BCM6318_IRQ_TIMER1 1
#define BCM6318_IRQ_TIMER2 2
#define BCM6318_IRQ_TIMER3 3
#define BCM6318_IRQ_USBS 4
#define BCM6318_IRQ_USB_CTL_RX_DMA 5
#define BCM6318_IRQ_USB_CTL_TX_DMA 6
#define BCM6318_IRQ_USB_BULK_RX_DMA 7
#define BCM6318_IRQ_USB_BULK_TX_DMA 8
#define BCM6318_IRQ_USB_ISO_RX_DMA 9
#define BCM6318_IRQ_USB_ISO_TX_DMA 10
#define BCM6318_IRQ_DG 11
#define BCM6318_IRQ_EPHY 12
#define BCM6318_IRQ_EPHY_EN0N 13
#define BCM6318_IRQ_EPHY_EN1N 14
#define BCM6318_IRQ_EPHY_EN2N 15
#define BCM6318_IRQ_EPHY_EN3N 16
#define BCM6318_IRQ_EPHY_EN0 17
#define BCM6318_IRQ_EPHY_EN1 18
#define BCM6318_IRQ_EPHY_EN2 19
#define BCM6318_IRQ_EPHY_EN3 20
#define BCM6318_IRQ_XDSL 21
#define BCM6318_IRQ_SDR 22
#define BCM6318_IRQ_PCIE_RC 23
#define BCM6318_IRQ_EXT0 24
#define BCM6318_IRQ_EXT1 25
#define BCM6318_IRQ_EXT2 26
#define BCM6318_IRQ_EXT3 27
#define BCM6318_IRQ_UART0 28
#define BCM6318_IRQ_HSSPI 29
#define BCM6318_IRQ_WAKE_ON_IRQ 30
#define BCM6318_IRQ_TIMER 31
#define BCM6318_IRQ_ENETSW_RX_DMA0 32
#define BCM6318_IRQ_ENETSW_RX_DMA1 33
#define BCM6318_IRQ_ENETSW_RX_DMA2 34
#define BCM6318_IRQ_ENETSW_RX_DMA3 35
#define BCM6318_IRQ_WDTIMER 37
#define BCM6318_IRQ_ENETSW 40
#define BCM6318_IRQ_OHCI 41
#define BCM6318_IRQ_EHCI 42
#define BCM6318_IRQ_ATM_DMA0 43
#define BCM6318_IRQ_ATM_DMA1 44
#define BCM6318_IRQ_ATM_DMA2 45
#define BCM6318_IRQ_ATM_DMA3 46
#define BCM6318_IRQ_ATM_DMA4 47
#define BCM6318_IRQ_ATM_DMA5 48
#define BCM6318_IRQ_ATM_DMA6 49
#define BCM6318_IRQ_ATM_DMA7 50
#define BCM6318_IRQ_ATM_DMA8 51
#define BCM6318_IRQ_ATM_DMA9 52
#define BCM6318_IRQ_ATM_DMA10 53
#define BCM6318_IRQ_ATM_DMA11 54
#define BCM6318_IRQ_ATM_DMA12 55
#define BCM6318_IRQ_ATM_DMA13 56
#define BCM6318_IRQ_ATM_DMA14 57
#define BCM6318_IRQ_ATM_DMA15 58
#define BCM6318_IRQ_ATM_DMA16 59
#define BCM6318_IRQ_ATM_DMA17 60
#define BCM6318_IRQ_ATM_DMA18 61
#define BCM6318_IRQ_ATM_DMA19 62
#define BCM6318_IRQ_SAR 63
#define BCM6318_IRQ_ADSL_ENERGY 64
#define BCM6318_IRQ_ADSL_ENERGY_N 65
#define BCM6318_IRQ_USB_ENERGY_ON 66
#define BCM6318_IRQ_USB_ENERGY_OFF 67
#define BCM6318_IRQ_PVTMON_TEMP 68
#define BCM6318_IRQ_SYSPLL_LOCK 69
#define BCM6318_IRQ_LCPLL_LOCK 70
#define BCM6318_IRQ_PMU_STABLE 71
#define BCM6318_IRQ_ENETSW_TX_DMA0 72
#define BCM6318_IRQ_ENETSW_TX_DMA1 73
#define BCM6318_IRQ_ENETSW_TX_DMA2 74
#define BCM6318_IRQ_ENETSW_TX_DMA3 75
#define BCM6318_IRQ_EPHY0_IDDQ_ENERGY 76
#define BCM6318_IRQ_EPHY1_IDDQ_ENERGY 77
#define BCM6318_IRQ_EPHY2_IDDQ_ENERGY 78
#define BCM6318_IRQ_EPHY3_IDDQ_ENERGY 79
#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6318_H */
|
