target/linux/ath79/dts/ar9342_iodata_etg3-r.dts


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "ar9344.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "iodata,etg3-r", "qca,ar9344";
	model = "I-O DATA ETG3-R";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	leds {
		compatible = "gpio-leds";

		led_power: power {
			label = "green:power";
			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		notification {
			label = "green:notification";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};
};

&ref {
	clock-frequency = <40000000>;
};

&spi {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x000000 0x040000>;
				read-only;
			};

			partition@40000 {
				label = "u-boot-env";
				reg = <0x040000 0x010000>;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x050000 0x780000>;
			};

			partition@7d0000 {
				label = "Config";
				reg = <0x07d0000 0x10000>;
				read-only;
			};

			partition@7e0000 {
				label = "Rsv";
				reg = <0x07e0000 0x10000>;
				read-only;
			};

			partition@7f0000 {
				label = "art";
				reg = <0x7f0000 0x010000>;
				read-only;
			};
		};
	};
};

&mdio0 {
	status = "okay";

	phy0: ethernet-phy@0 {
		reg = <0>;
		phy-mode = "rgmii";

		qca,ar8327-initvals = <
			0x04 0x07600000 /* PORT0 PAD MODE CTRL */
			0x50 0xffb7ffb7 /* LED_CTRL0 */
			0x54 0xffb7ffb7 /* LED_CTRL1 */
			0x58 0xffb7ffb7 /* LED_CTRL2 */
			0x5c 0x03ffff00 /* LED_CTRL3 */
			0x7c 0x0000007e /* PORT0_STATUS */
		>;
	};
};

&eth0 {
	status = "okay";

	pll-data = <0x0e000000 0x00000101 0x00001616>;

	phy-mode = "rgmii";
	phy-handle = <&phy0>;

	gmac-config {
		device = <&gmac>;

		rgmii-gmac0 = <1>;
		rxd-delay = <3>;
		rxdv-delay = <3>;
	};
};