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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7240.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mtd/partitions/uimage.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = ð1;
};
ath9k-keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&ath9k 7 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins &switch_led_disable_pins &clks_disable_pins>;
led_power: power {
label = "green:power";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "green:lan1";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "green:lan2";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
wan {
label = "green:wan";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan {
label = "green:wlan";
gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x40000>;
label = "u-boot";
read-only;
};
partition@40000 {
reg = <0x40000 0x10000>;
label = "u-boot-env";
};
partition@50000 {
compatible = "openwrt,uimage", "denx,uimage";
openwrt,ih-magic = <0x32303631>;
openwrt,ih-type = <IH_TYPE_FILESYSTEM>;
reg = <0x50000 0x3a0000>;
label = "firmware";
};
art: partition@3f0000 {
reg = <0x3f0000 0x10000>;
label = "art";
read-only;
};
};
};
};
ð0 {
nvmem-cells = <&macaddr_art_0>;
nvmem-cell-names = "mac-address";
};
ð1 {
status = "okay";
nvmem-cells = <&macaddr_art_6>;
nvmem-cell-names = "mac-address";
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,002b";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&macaddr_art_0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};
&art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
};
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