diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch b/target/linux/ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch new file mode 100644 index 0000000000..dc3dd0d1ec --- /dev/null +++ b/target/linux/ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch @@ -0,0 +1,89 @@ +From f798b7588bd7397bbab958281ca6c88d08714941 Mon Sep 17 00:00:00 2001 +From: Sergio Paracuellos <sergio.paracuellos@gmail.com> +Date: Thu, 12 Mar 2020 12:29:15 +0100 +Subject: [PATCH] MIPS: ralink: mt7621: introduce 'soc_device' initialization + +mt7621 SoC has its own 'ralink_soc_info' structure with some +information about the soc itself. Pcie controller and pcie phy +drivers for this soc which are still in staging git tree make uses +of 'soc_device_attribute' looking for revision 'E2' in order to +know if reset lines are or not inverted. This way of doing things +seems to be necessary in order to make things clean and properly. +Hence, introduce this 'soc_device' to be able to properly use those +attributes in drivers. Also set 'data' pointer points to the struct +'ralink_soc_info' to be able to export also current soc information +using this mechanism. + +Cc: Paul Burton <paul.burton@mips.com> +Cc: ralf@linux-mips.org +Cc: jhogan@kernel.org +Cc: john@phrozen.org +Cc: NeilBrown <neil@brown.name> +Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +Cc: linux-mips@vger.kernel.org + +Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> +Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> +--- + arch/mips/ralink/mt7621.c | 32 +++++++++++++++++++++++++++++++- + 1 file changed, 31 insertions(+), 1 deletion(-) + +--- a/arch/mips/ralink/mt7621.c ++++ b/arch/mips/ralink/mt7621.c +@@ -7,6 +7,8 @@ + + #include <linux/kernel.h> + #include <linux/init.h> ++#include <linux/slab.h> ++#include <linux/sys_soc.h> + #include <linux/jiffies.h> + #include <linux/clk.h> + #include <linux/clkdev.h> +@@ -294,6 +296,33 @@ static int udelay_recal(void) + } + device_initcall(udelay_recal); + ++static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev) ++{ ++ struct soc_device *soc_dev; ++ struct soc_device_attribute *soc_dev_attr; ++ ++ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); ++ if (!soc_dev_attr) ++ return; ++ ++ soc_dev_attr->soc_id = "mt7621"; ++ soc_dev_attr->family = "Ralink"; ++ ++ if (((rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK) == 1 && ++ (rev & CHIP_REV_ECO_MASK) == 1) ++ soc_dev_attr->revision = "E2"; ++ else ++ soc_dev_attr->revision = "E1"; ++ ++ soc_dev_attr->data = soc_info; ++ ++ soc_dev = soc_device_register(soc_dev_attr); ++ if (IS_ERR(soc_dev)) { ++ kfree(soc_dev_attr); ++ return; ++ } ++} ++ + void prom_soc_init(struct ralink_soc_info *soc_info) + { + void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE); +@@ -345,11 +374,12 @@ void prom_soc_init(struct ralink_soc_inf + soc_info->mem_detect = mt7621_memory_detect; + rt2880_pinmux_data = mt7621_pinmux_data; + +- + if (!register_cps_smp_ops()) + return; + if (!register_cmp_smp_ops()) + return; + if (!register_vsmp_smp_ops()) + return; ++ ++ soc_dev_init(soc_info, rev); + } |