diff options
Diffstat (limited to 'target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts')
| -rw-r--r-- | target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts | 219 |
1 files changed, 219 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts new file mode 100644 index 0000000000..99de770707 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_arcadyan_we420223-99.dts @@ -0,0 +1,219 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Arcadyan WE420223-99"; + compatible = "arcadyan,we420223-99", "mediatek,mt7621-soc"; + + aliases { + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_wps_green; + led-wifi = &led_wifi_green; + }; + + chosen { + bootargs = "console=ttyS0,57600 ubi.mtd=5 root=/dev/ubiblock0_0"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + + wps { + label = "wps"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WPS_BUTTON>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power_green: power_green { + label = "green:power"; + gpios = <&gpio 42 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_POWER; + default-state = "on"; + }; + + led_power_red: power_red { + label = "red:power"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_FAULT; + }; + + led_wifi_blue: wifi_blue { + label = "blue:wifi"; + gpios = <&gpio 41 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_WLAN; + }; + + led_wifi_green: wifi_green { + label = "green:wifi"; + gpios = <&gpio 43 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_WLAN; + }; + + led_wps_red: wps_red { + label = "red:wps"; + gpios = <&gpio 45 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_WPS; + }; + + led_wps_green: wps_green { + label = "green:wps"; + gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_WPS; + }; + + led_followme_r: followme_red { + label = "red:followme"; + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_RED>; + }; + + led_followme_g: followme_green { + label = "green:followme"; + gpios = <&gpio 48 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + + reg = <0>; + spi-max-frequency = <70000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ALL"; + reg = <0x0 0x2000000>; + read-only; + }; + + partition@1 { + label = "Bootloader"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "Config"; + reg = <0x30000 0x10000>; + }; + + factory: partition@40000 { + label = "Factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "kernel"; + reg = <0x50000 0x1f60000>; + }; + + partition@490000 { + label = "rootfs"; + reg = <0x490000 0x1b20000>; + }; + + partition@1000000 { + label = "Kernel2"; + reg = <0x1000000 0xfb0000>; + }; + + partition@1440000 { + label = "RootFS2"; + reg = <0x1440000 0xb70000>; + }; + + partition@1fb0000 { + label = "glbcfg"; + reg = <0x1fb0000 0x10000>; + read-only; + }; + + partition@1fc0000 { + label = "board_data"; + reg = <0x1fc0000 0x10000>; + read-only; + }; + + partition@1fd0000 { + label = "glbcfg2"; + reg = <0x1fd0000 0x10000>; + read-only; + }; + + partition@1fe0000 { + label = "board_data2"; + reg = <0x1fe0000 0x10000>; + read-only; + }; + }; + }; +}; + +&xhci { + status = "disabled"; +}; + +&switch0 { + ports { + port@1 { + status = "okay"; + label = "swp1"; + }; + }; +}; + +&gmac1 { + status = "okay"; + label = "swp0"; + phy-handle = <ðphy0>; +}; + +&mdio { + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0000>; + }; +}; |