diff options
Diffstat (limited to 'target/linux/octeontx/patches-5.10')
-rw-r--r-- | target/linux/octeontx/patches-5.10/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/target/linux/octeontx/patches-5.10/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch b/target/linux/octeontx/patches-5.10/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch new file mode 100644 index 0000000000..e33a28e953 --- /dev/null +++ b/target/linux/octeontx/patches-5.10/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch @@ -0,0 +1,59 @@ +From d0ff7a1bcfe886cab1a237895b08ac51ecfe10e7 Mon Sep 17 00:00:00 2001 +From: Tim Harvey <tharvey@gateworks.com> +Date: Wed, 10 Apr 2019 08:00:47 -0700 +Subject: [PATCH 04/12] PCI: add quirk for Gateworks PLX PEX860x switch with + GPIO PERST# + +Gateworks boards use PLX PEX860x switches where downstream ports +have their PERST# driven from the PEX GPIO. + +Signed-off-by: Tim Harvey <tharvey@gateworks.com> +--- + drivers/pci/quirks.c | 32 ++++++++++++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -25,6 +25,7 @@ + #include <linux/ktime.h> + #include <linux/mm.h> + #include <linux/nvme.h> ++#include <linux/of.h> + #include <linux/platform_data/x86/apple.h> + #include <linux/pm_runtime.h> + #include <linux/switchtec.h> +@@ -5625,3 +5626,34 @@ static void apex_pci_fixup_class(struct + } + DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, + PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); ++ ++#ifdef CONFIG_PCI_HOST_THUNDER_PEM ++/* ++ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High ++ * as they are used for slots1-7 PERST# ++ */ ++static void newport_pciesw_early_fixup(struct pci_dev *dev) ++{ ++ u32 dw; ++ ++ if (!of_machine_is_compatible("gw,newport")) ++ return; ++ ++ if (dev->devfn != 0) ++ return; ++ ++ dev_info(&dev->dev, "de-asserting PERST#\n"); ++ pci_read_config_dword(dev, 0x62c, &dw); ++ dw |= 0xaaa8; /* GPIO1-7 outputs */ ++ pci_write_config_dword(dev, 0x62c, dw); ++ ++ pci_read_config_dword(dev, 0x644, &dw); ++ dw |= 0xfe; /* GPIO1-7 output high */ ++ pci_write_config_dword(dev, 0x644, dw); ++ ++ msleep(100); ++} ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, newport_pciesw_early_fixup); ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, newport_pciesw_early_fixup); ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, newport_pciesw_early_fixup); ++#endif /* CONFIG_PCI_HOST_THUNDER_PEM */ |