diff options
Diffstat (limited to 'target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch')
| -rw-r--r-- | target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch b/target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch new file mode 100644 index 0000000000..aa9f879e3a --- /dev/null +++ b/target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch @@ -0,0 +1,93 @@ +From d8b94c9ff96c2024a527086d850eb0b314337ff9 Mon Sep 17 00:00:00 2001 +From: Sam Shih <sam.shih@mediatek.com> +Date: Tue, 14 Sep 2021 16:51:32 +0800 +Subject: [PATCH] pinctrl: mediatek: moore: check if pin_desc is valid before + use + +Certain SoC are missing the middle part gpios in consecutive pins, +it's better to check if mtk_pin_desc is a valid pin for the extensibility + +Signed-off-by: Sam Shih <sam.shih@mediatek.com> +Acked-by: Sean Wang <sean.wang@mediatek.com> +Link: https://lore.kernel.org/r/20210914085137.31761-5-sam.shih@mediatek.com +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +--- + drivers/pinctrl/mediatek/pinctrl-moore.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/drivers/pinctrl/mediatek/pinctrl-moore.c ++++ b/drivers/pinctrl/mediatek/pinctrl-moore.c +@@ -60,6 +60,8 @@ static int mtk_pinmux_set_mux(struct pin + int pin = grp->pins[i]; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, + pin_modes[i]); +@@ -76,6 +78,8 @@ static int mtk_pinmux_gpio_request_enabl + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, + hw->soc->gpio_m); +@@ -89,6 +93,8 @@ static int mtk_pinmux_gpio_set_direction + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + /* hardware would take 0 as input direction */ + return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); +@@ -103,6 +109,8 @@ static int mtk_pinconf_get(struct pinctr + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: +@@ -218,6 +226,8 @@ static int mtk_pinconf_set(struct pinctr + int cfg, err = 0; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + for (cfg = 0; cfg < num_configs; cfg++) { + param = pinconf_to_config_param(configs[cfg]); +@@ -435,6 +445,8 @@ static int mtk_gpio_get(struct gpio_chip + int value, err; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; ++ if (!desc->name) ++ return -ENOTSUPP; + + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); + if (err) +@@ -449,6 +461,10 @@ static void mtk_gpio_set(struct gpio_chi + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; ++ if (!desc->name) { ++ dev_err(hw->dev, "Failed to set gpio %d\n", gpio); ++ return; ++ } + + mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); + } +@@ -490,6 +506,8 @@ static int mtk_gpio_set_config(struct gp + u32 debounce; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; ++ if (!desc->name) ++ return -ENOTSUPP; + + if (!hw->eint || + pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || |