diff options
Diffstat (limited to 'target/linux/ipq806x/patches-5.15/100-v5.18-11-linux-next-dt-bindings-clock-add-ipq8064-ce5-clk-define.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-5.15/100-v5.18-11-linux-next-dt-bindings-clock-add-ipq8064-ce5-clk-define.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-5.15/100-v5.18-11-linux-next-dt-bindings-clock-add-ipq8064-ce5-clk-define.patch b/target/linux/ipq806x/patches-5.15/100-v5.18-11-linux-next-dt-bindings-clock-add-ipq8064-ce5-clk-define.patch new file mode 100644 index 0000000000..858c6f78a5 --- /dev/null +++ b/target/linux/ipq806x/patches-5.15/100-v5.18-11-linux-next-dt-bindings-clock-add-ipq8064-ce5-clk-define.patch @@ -0,0 +1,39 @@ +From b565d66403e3df303a058c0d8d00d0fc6aeb2ddc Mon Sep 17 00:00:00 2001 +From: Ansuel Smith <ansuelsmth@gmail.com> +Date: Sat, 26 Feb 2022 14:52:31 +0100 +Subject: [PATCH 11/14] dt-bindings: clock: add ipq8064 ce5 clk define + +Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver. +Define CE5_SRC is not used so it's OK to change and we align it to +the QSDK naming. + +Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> +Acked-by: Rob Herring <robh@kernel.org> +Reviewed-by: Stephen Boyd <sboyd@kernel.org> +Tested-by: Jonathan McDowell <noodles@earth.li> +Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> +Link: https://lore.kernel.org/r/20220226135235.10051-12-ansuelsmth@gmail.com +--- + include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h ++++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h +@@ -240,7 +240,7 @@ + #define PLL14 232 + #define PLL14_VOTE 233 + #define PLL18 234 +-#define CE5_SRC 235 ++#define CE5_A_CLK 235 + #define CE5_H_CLK 236 + #define CE5_CORE_CLK 237 + #define CE3_SLEEP_CLK 238 +@@ -283,5 +283,8 @@ + #define EBI2_AON_CLK 281 + #define NSSTCM_CLK_SRC 282 + #define NSSTCM_CLK 283 ++#define CE5_A_CLK_SRC 285 ++#define CE5_H_CLK_SRC 286 ++#define CE5_CORE_CLK_SRC 287 + + #endif |