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-rw-r--r--target/linux/imx6/patches-4.4/110-serial-imx-repair-and-complete-handshaking.patch78
1 files changed, 78 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-4.4/110-serial-imx-repair-and-complete-handshaking.patch b/target/linux/imx6/patches-4.4/110-serial-imx-repair-and-complete-handshaking.patch
new file mode 100644
index 0000000000..0a117f668f
--- /dev/null
+++ b/target/linux/imx6/patches-4.4/110-serial-imx-repair-and-complete-handshaking.patch
@@ -0,0 +1,78 @@
+From 90ebc4838666d148eac5bbac6f4044e5b25cd2d6 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
+Date: Sun, 18 Oct 2015 21:34:46 +0200
+Subject: [PATCH] serial: imx: repair and complete handshaking
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The .get_mctrl callback should not report the status of RTS or LOOP, so
+drop this. Instead implement reporting the state of CAR (aka DCD) and
+RI.
+
+For .set_mctrl implement setting the DTR line.
+
+Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Petr Štetiar <ynezz@true.cz>
+---
+ drivers/tty/serial/imx.c | 23 +++++++++++++++++------
+ 1 file changed, 17 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
+index 76818f5..086675e 100644
+--- a/drivers/tty/serial/imx.c
++++ b/drivers/tty/serial/imx.c
+@@ -148,8 +148,11 @@
+ #define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */
+ #define USR2_DTRF (1<<13) /* DTR edge interrupt flag */
+ #define USR2_IDLE (1<<12) /* Idle condition */
++#define USR2_RIDELT (1<<10) /* Ring Interrupt Delta */
++#define USR2_RIIN (1<<9) /* Ring Indicator Input */
+ #define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */
+ #define USR2_WAKE (1<<7) /* Wake */
++#define USR2_DCDIN (1<<5) /* Data Carrier Detect Input */
+ #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */
+ #define USR2_TXDC (1<<3) /* Transmitter complete */
+ #define USR2_BRCD (1<<2) /* Break condition */
+@@ -804,16 +807,19 @@ static unsigned int imx_tx_empty(struct uart_port *port)
+ static unsigned int imx_get_mctrl(struct uart_port *port)
+ {
+ struct imx_port *sport = (struct imx_port *)port;
+- unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
++ unsigned int tmp = TIOCM_DSR;
++ unsigned usr1 = readl(sport->port.membase + USR1);
+
+- if (readl(sport->port.membase + USR1) & USR1_RTSS)
++ if (usr1 & USR1_RTSS)
+ tmp |= TIOCM_CTS;
+
+- if (readl(sport->port.membase + UCR2) & UCR2_CTS)
+- tmp |= TIOCM_RTS;
++ /* in DCE mode DCDIN is always 0 */
++ if (!(usr1 & USR2_DCDIN))
++ tmp |= TIOCM_CAR;
+
+- if (readl(sport->port.membase + uts_reg(sport)) & UTS_LOOP)
+- tmp |= TIOCM_LOOP;
++ /* in DCE mode RIIN is always 0 */
++ if (readl(sport->port.membase + USR2) & USR2_RIIN)
++ tmp |= TIOCM_RI;
+
+ return tmp;
+ }
+@@ -831,6 +837,11 @@ static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
+ writel(temp, sport->port.membase + UCR2);
+ }
+
++ temp = readl(sport->port.membase + UCR3) & ~UCR3_DSR;
++ if (!(mctrl & TIOCM_DTR))
++ temp |= UCR3_DSR;
++ writel(temp, sport->port.membase + UCR3);
++
+ temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP;
+ if (mctrl & TIOCM_LOOP)
+ temp |= UTS_LOOP;
+--
+1.9.1
+