diff options
Diffstat (limited to 'target/linux/bcm4908/patches-5.4/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch')
| -rw-r--r-- | target/linux/bcm4908/patches-5.4/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch | 209 |
1 files changed, 0 insertions, 209 deletions
diff --git a/target/linux/bcm4908/patches-5.4/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch b/target/linux/bcm4908/patches-5.4/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch deleted file mode 100644 index 88f2c3c0cd..0000000000 --- a/target/linux/bcm4908/patches-5.4/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch +++ /dev/null @@ -1,209 +0,0 @@ -From af30f8eaa8fe4ff1987280f716309711997bd979 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 29 Dec 2021 18:16:42 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: refactor LED regs access -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -1. Define more regs. Some switches (e.g. BCM4908) have up to 6 regs. -2. Add helper for handling non-lineral port <-> reg mappings. -3. Add support for 12 B LED reg blocks on BCM4908 (different layout) - -Complete support for LEDs setup will be implemented once Linux receives -a proper design & implementation for "hardware" LEDs. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20211229171642.22942-1-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/dsa/bcm_sf2.c | 54 ++++++++++++++++++++++++---- - drivers/net/dsa/bcm_sf2.h | 10 ++++++ - drivers/net/dsa/bcm_sf2_regs.h | 65 +++++++++++++++++++++++++++++++--- - 3 files changed, 119 insertions(+), 10 deletions(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -31,6 +31,38 @@ - #include "b53/b53_priv.h" - #include "b53/b53_regs.h" - -+static u16 bcm_sf2_reg_led_base(struct bcm_sf2_priv *priv, int port) -+{ -+ switch (port) { -+ case 0: -+ return REG_LED_0_CNTRL; -+ case 1: -+ return REG_LED_1_CNTRL; -+ case 2: -+ return REG_LED_2_CNTRL; -+ } -+ -+ switch (priv->type) { -+ case BCM4908_DEVICE_ID: -+ switch (port) { -+ case 3: -+ return REG_LED_3_CNTRL; -+ case 7: -+ return REG_LED_4_CNTRL; -+ default: -+ break; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ WARN_ONCE(1, "Unsupported port %d\n", port); -+ -+ /* RO fallback reg */ -+ return REG_SWITCH_STATUS; -+} -+ - static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port) - { - switch (priv->type) { -@@ -141,9 +173,14 @@ static void bcm_sf2_gphy_enable_set(stru - - /* Use PHY-driven LED signaling */ - if (!enable) { -- reg = reg_readl(priv, REG_LED_CNTRL(0)); -- reg |= SPDLNK_SRC_SEL; -- reg_writel(priv, reg, REG_LED_CNTRL(0)); -+ u16 led_ctrl = bcm_sf2_reg_led_base(priv, 0); -+ -+ if (priv->type == BCM7278_DEVICE_ID || -+ priv->type == BCM7445_DEVICE_ID) { -+ reg = reg_led_readl(priv, led_ctrl, 0); -+ reg |= LED_CNTRL_SPDLNK_SRC_SEL; -+ reg_led_writel(priv, reg, led_ctrl, 0); -+ } - } - } - -@@ -1085,9 +1122,14 @@ static const u16 bcm_sf2_4908_reg_offset - [REG_SPHY_CNTRL] = 0x24, - [REG_CROSSBAR] = 0xc8, - [REG_RGMII_11_CNTRL] = 0x014c, -- [REG_LED_0_CNTRL] = 0x40, -- [REG_LED_1_CNTRL] = 0x4c, -- [REG_LED_2_CNTRL] = 0x58, -+ [REG_LED_0_CNTRL] = 0x40, -+ [REG_LED_1_CNTRL] = 0x4c, -+ [REG_LED_2_CNTRL] = 0x58, -+ [REG_LED_3_CNTRL] = 0x64, -+ [REG_LED_4_CNTRL] = 0x88, -+ [REG_LED_5_CNTRL] = 0xa0, -+ [REG_LED_AGGREGATE_CTRL] = 0xb8, -+ - }; - - static const struct bcm_sf2_of_data bcm_sf2_4908_data = { ---- a/drivers/net/dsa/bcm_sf2.h -+++ b/drivers/net/dsa/bcm_sf2.h -@@ -203,6 +203,16 @@ SF2_IO_MACRO(acb); - SWITCH_INTR_L2(0); - SWITCH_INTR_L2(1); - -+static inline u32 reg_led_readl(struct bcm_sf2_priv *priv, u16 off, u16 reg) -+{ -+ return readl_relaxed(priv->reg + priv->reg_offsets[off] + reg); -+} -+ -+static inline void reg_led_writel(struct bcm_sf2_priv *priv, u32 val, u16 off, u16 reg) -+{ -+ writel_relaxed(val, priv->reg + priv->reg_offsets[off] + reg); -+} -+ - /* RXNFC */ - int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port, - struct ethtool_rxnfc *nfc, u32 *rule_locs); ---- a/drivers/net/dsa/bcm_sf2_regs.h -+++ b/drivers/net/dsa/bcm_sf2_regs.h -@@ -25,6 +25,10 @@ enum bcm_sf2_reg_offs { - REG_LED_0_CNTRL, - REG_LED_1_CNTRL, - REG_LED_2_CNTRL, -+ REG_LED_3_CNTRL, -+ REG_LED_4_CNTRL, -+ REG_LED_5_CNTRL, -+ REG_LED_AGGREGATE_CTRL, - REG_SWITCH_REG_MAX, - }; - -@@ -56,6 +60,63 @@ enum bcm_sf2_reg_offs { - #define CROSSBAR_BCM4908_EXT_GPHY4 1 - #define CROSSBAR_BCM4908_EXT_RGMII 2 - -+/* Relative to REG_LED_*_CNTRL (BCM7278, BCM7445) */ -+#define LED_CNTRL_NO_LINK_ENCODE_SHIFT 0 -+#define LED_CNTRL_M10_ENCODE_SHIFT 2 -+#define LED_CNTRL_M100_ENCODE_SHIFT 4 -+#define LED_CNTRL_M1000_ENCODE_SHIFT 6 -+#define LED_CNTRL_SEL_NO_LINK_ENCODE_SHIFT 8 -+#define LED_CNTRL_SEL_10M_ENCODE_SHIFT 10 -+#define LED_CNTRL_SEL_100M_ENCODE_SHIFT 12 -+#define LED_CNTRL_SEL_1000M_ENCODE_SHIFT 14 -+#define LED_CNTRL_RX_DV_EN (1 << 16) -+#define LED_CNTRL_TX_EN_EN (1 << 17) -+#define LED_CNTRL_SPDLNK_LED0_ACT_SEL_SHIFT 18 -+#define LED_CNTRL_SPDLNK_LED1_ACT_SEL_SHIFT 20 -+#define LED_CNTRL_ACT_LED_ACT_SEL_SHIFT 22 -+#define LED_CNTRL_SPDLNK_SRC_SEL (1 << 24) -+#define LED_CNTRL_SPDLNK_LED0_ACT_POL_SEL (1 << 25) -+#define LED_CNTRL_SPDLNK_LED1_ACT_POL_SEL (1 << 26) -+#define LED_CNTRL_ACT_LED_POL_SEL (1 << 27) -+#define LED_CNTRL_MASK 0x3 -+ -+/* Register relative to REG_LED_*_CNTRL (BCM4908) */ -+#define REG_LED_CTRL 0x0 -+#define LED_CTRL_RX_ACT_EN 0x00000001 -+#define LED_CTRL_TX_ACT_EN 0x00000002 -+#define LED_CTRL_SPDLNK_LED0_ACT_SEL 0x00000004 -+#define LED_CTRL_SPDLNK_LED1_ACT_SEL 0x00000008 -+#define LED_CTRL_SPDLNK_LED2_ACT_SEL 0x00000010 -+#define LED_CTRL_ACT_LED_ACT_SEL 0x00000020 -+#define LED_CTRL_SPDLNK_LED0_ACT_POL_SEL 0x00000040 -+#define LED_CTRL_SPDLNK_LED1_ACT_POL_SEL 0x00000080 -+#define LED_CTRL_SPDLNK_LED2_ACT_POL_SEL 0x00000100 -+#define LED_CTRL_ACT_LED_POL_SEL 0x00000200 -+#define LED_CTRL_LED_SPD_OVRD 0x00001c00 -+#define LED_CTRL_LNK_STATUS_OVRD 0x00002000 -+#define LED_CTRL_SPD_OVRD_EN 0x00004000 -+#define LED_CTRL_LNK_OVRD_EN 0x00008000 -+ -+/* Register relative to REG_LED_*_CNTRL (BCM4908) */ -+#define REG_LED_LINK_SPEED_ENC_SEL 0x4 -+#define LED_LINK_SPEED_ENC_SEL_NO_LINK_SHIFT 0 -+#define LED_LINK_SPEED_ENC_SEL_10M_SHIFT 3 -+#define LED_LINK_SPEED_ENC_SEL_100M_SHIFT 6 -+#define LED_LINK_SPEED_ENC_SEL_1000M_SHIFT 9 -+#define LED_LINK_SPEED_ENC_SEL_2500M_SHIFT 12 -+#define LED_LINK_SPEED_ENC_SEL_10G_SHIFT 15 -+#define LED_LINK_SPEED_ENC_SEL_MASK 0x7 -+ -+/* Register relative to REG_LED_*_CNTRL (BCM4908) */ -+#define REG_LED_LINK_SPEED_ENC 0x8 -+#define LED_LINK_SPEED_ENC_NO_LINK_SHIFT 0 -+#define LED_LINK_SPEED_ENC_M10_SHIFT 3 -+#define LED_LINK_SPEED_ENC_M100_SHIFT 6 -+#define LED_LINK_SPEED_ENC_M1000_SHIFT 9 -+#define LED_LINK_SPEED_ENC_M2500_SHIFT 12 -+#define LED_LINK_SPEED_ENC_M10G_SHIFT 15 -+#define LED_LINK_SPEED_ENC_MASK 0x7 -+ - /* Relative to REG_RGMII_CNTRL */ - #define RGMII_MODE_EN (1 << 0) - #define ID_MODE_DIS (1 << 1) -@@ -73,10 +134,6 @@ enum bcm_sf2_reg_offs { - #define LPI_COUNT_SHIFT 9 - #define LPI_COUNT_MASK 0x3F - --#define REG_LED_CNTRL(x) (REG_LED_0_CNTRL + (x)) -- --#define SPDLNK_SRC_SEL (1 << 24) -- - /* Register set relative to 'INTRL2_0' and 'INTRL2_1' */ - #define INTRL2_CPU_STATUS 0x00 - #define INTRL2_CPU_SET 0x04 |