diff options
Diffstat (limited to 'target/linux/at91/patches-5.10/167-media-atmel-atmel-isc-add-SUB422-and-SUB420-to-regis.patch')
| -rw-r--r-- | target/linux/at91/patches-5.10/167-media-atmel-atmel-isc-add-SUB422-and-SUB420-to-regis.patch | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/167-media-atmel-atmel-isc-add-SUB422-and-SUB420-to-regis.patch b/target/linux/at91/patches-5.10/167-media-atmel-atmel-isc-add-SUB422-and-SUB420-to-regis.patch new file mode 100644 index 0000000000..d4d6f2ea45 --- /dev/null +++ b/target/linux/at91/patches-5.10/167-media-atmel-atmel-isc-add-SUB422-and-SUB420-to-regis.patch @@ -0,0 +1,91 @@ +From aebb741058a63c3493f4139d11d6f290d5691e9b Mon Sep 17 00:00:00 2001 +From: Eugen Hristev <eugen.hristev@microchip.com> +Date: Tue, 13 Apr 2021 12:57:09 +0200 +Subject: [PATCH 167/247] media: atmel: atmel-isc: add SUB422 and SUB420 to + register offsets + +The SUB submodules are a part of the atmel-isc pipeline, and stand for +Subsampling. They are used to subsample the original YUV 4:4:4 pixel ratio +aspect to either 4:2:2 or 4:2:0. +Add sub420 and sub422 to the reg offsets struct. +This will allow different products to have a different reg offset for these +particular modules. + +Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> +Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> +Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> +--- + drivers/media/platform/atmel/atmel-isc-base.c | 4 ++-- + drivers/media/platform/atmel/atmel-isc-regs.h | 4 ++++ + drivers/media/platform/atmel/atmel-isc.h | 4 ++++ + drivers/media/platform/atmel/atmel-sama5d2-isc.c | 2 ++ + 4 files changed, 12 insertions(+), 2 deletions(-) + +diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c +index b7728914fda8..b398cdfdc2c9 100644 +--- a/drivers/media/platform/atmel/atmel-isc-base.c ++++ b/drivers/media/platform/atmel/atmel-isc-base.c +@@ -2326,8 +2326,8 @@ int isc_pipeline_init(struct isc_device *isc) + REG_FIELD(ISC_GAM_CTRL, 3, 3), + REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0), + REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0), +- REG_FIELD(ISC_SUB422_CTRL, 0, 0), +- REG_FIELD(ISC_SUB420_CTRL, 0, 0), ++ REG_FIELD(ISC_SUB422_CTRL + isc->offsets.sub422, 0, 0), ++ REG_FIELD(ISC_SUB420_CTRL + isc->offsets.sub420, 0, 0), + }; + + for (i = 0; i < ISC_PIPE_LINE_NODE_NUM; i++) { +diff --git a/drivers/media/platform/atmel/atmel-isc-regs.h b/drivers/media/platform/atmel/atmel-isc-regs.h +index a5e2fe01ba9f..04839def6ef6 100644 +--- a/drivers/media/platform/atmel/atmel-isc-regs.h ++++ b/drivers/media/platform/atmel/atmel-isc-regs.h +@@ -194,9 +194,13 @@ + #define ISC_CBC_CONTRAST 0x000003c0 + #define ISC_CBC_CONTRAST_MASK GENMASK(11, 0) + ++/* Offset for SUB422 register specific to sama5d2 product */ ++#define ISC_SAMA5D2_SUB422_OFFSET 0 + /* Subsampling 4:4:4 to 4:2:2 Control Register */ + #define ISC_SUB422_CTRL 0x000003c4 + ++/* Offset for SUB420 register specific to sama5d2 product */ ++#define ISC_SAMA5D2_SUB420_OFFSET 0 + /* Subsampling 4:2:2 to 4:2:0 Control Register */ + #define ISC_SUB420_CTRL 0x000003cc + +diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h +index d8b4b1959b94..9eb85540d89d 100644 +--- a/drivers/media/platform/atmel/atmel-isc.h ++++ b/drivers/media/platform/atmel/atmel-isc.h +@@ -147,10 +147,14 @@ struct isc_ctrls { + * struct isc_reg_offsets - ISC device register offsets + * @csc: Offset for the CSC register + * @cbc: Offset for the CBC register ++ * @sub422: Offset for the SUB422 register ++ * @sub420: Offset for the SUB420 register + */ + struct isc_reg_offsets { + u32 csc; + u32 cbc; ++ u32 sub422; ++ u32 sub420; + }; + + /* +diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c +index bb9362093efe..57ea1ae50c44 100644 +--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c ++++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c +@@ -253,6 +253,8 @@ static int atmel_isc_probe(struct platform_device *pdev) + + isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; + isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; ++ isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET; ++ isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET; + + /* sama5d2-isc - 8 bits per beat */ + isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; +-- +2.32.0 + |