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| author | Eneas U de Queiroz <cotequeiroz@gmail.com> | 2022-04-20 15:26:32 -0300 |
|---|---|---|
| committer | Christian 'Ansuel' Marangi <ansuelsmth@gmail.com> | 2022-06-04 12:39:01 +0200 |
| commit | 06bb5ac1f2b62c3e10f24d7096e86f6368aaf41d (patch) | |
| tree | 4222ebe9bd7bd5dd3149b7b64c61cc40be914403 /target | |
| parent | 39b6af114747fbee06cf6fab3a76d7037b53a4cc (diff) | |
| download | upstream-06bb5ac1f2b62c3e10f24d7096e86f6368aaf41d.tar.gz upstream-06bb5ac1f2b62c3e10f24d7096e86f6368aaf41d.tar.bz2 upstream-06bb5ac1f2b62c3e10f24d7096e86f6368aaf41d.zip | |
mvebu/cortexa72: enable armv8-CE crypto algos
This enables armv8 crypto extensions version of AES, GHASH, SHA1,
SHA256, and SHA512 algorithms in the kernel.
The choice of algorithms match the 32-bit versions that are enabled in
the target config-5.10 file, but were only used by the cortexa9
subtarget.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/mvebu/cortexa72/config-5.10 | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target/linux/mvebu/cortexa72/config-5.10 b/target/linux/mvebu/cortexa72/config-5.10 index 0a0660d031..c437b8b4f7 100644 --- a/target/linux/mvebu/cortexa72/config-5.10 +++ b/target/linux/mvebu/cortexa72/config-5.10 @@ -10,6 +10,7 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_STACKWALK=y CONFIG_ARM64=y CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CRYPTO=y CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_PA_BITS=48 CONFIG_ARM64_PA_BITS_48=y @@ -33,6 +34,16 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y CONFIG_ARM_PSCI_FW=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64_CE=y CONFIG_CRYPTO_ZSTD=y CONFIG_DMA_DIRECT_REMAP=y # CONFIG_FLATMEM_MANUAL is not set |