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| author | Christian Lamparter <chunkeey@gmail.com> | 2021-05-01 11:36:10 +0200 |
|---|---|---|
| committer | Christian Lamparter <chunkeey@gmail.com> | 2021-05-01 12:25:12 +0200 |
| commit | df07bafcd2c79e67a09a724b3d88cea394df8677 (patch) | |
| tree | 810dfff1de1b3bce393aa7b82894ee899d24abf1 /target/linux | |
| parent | 95b210e513d6d369444df41b522f749f1d848048 (diff) | |
| download | upstream-df07bafcd2c79e67a09a724b3d88cea394df8677.tar.gz upstream-df07bafcd2c79e67a09a724b3d88cea394df8677.tar.bz2 upstream-df07bafcd2c79e67a09a724b3d88cea394df8677.zip | |
apm821xx: MBL: correct phy-mode delay settings
This came up in an upstream commit: "
b1dd9bf688b0 "net: phy: broadcom: Fix RGMII delays for BCM50160 and BCM50610M"
The PHY driver entry for BCM50160 and BCM50610M calls
bcm54xx_config_init() but does not call bcm54xx_config_clock_delay() in
order to configuration appropriate clock delays on the PHY, fix that."
So the "rgmii" phy-mode has always been wrong, but went unnoticed since
the broadcom phy driver didn't push the delay settings to the chip.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/apm821xx/dts/wd-mybooklive.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/linux/apm821xx/dts/wd-mybooklive.dts b/target/linux/apm821xx/dts/wd-mybooklive.dts index 3fd636cb23..dcb8078050 100644 --- a/target/linux/apm821xx/dts/wd-mybooklive.dts +++ b/target/linux/apm821xx/dts/wd-mybooklive.dts @@ -149,6 +149,7 @@ phy-map = <0x2>; phy-address = <0x1>; phy-handle = <&phy>; + phy-mode = "rgmii-id"; mdio { #address-cells = <1>; |