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| author | Mathias Kresin <dev@kresin.me> | 2019-01-27 12:23:03 +0100 |
|---|---|---|
| committer | Mathias Kresin <dev@kresin.me> | 2019-07-07 11:17:27 +0200 |
| commit | 4053dd3f829d2fc1150c79cfe6dd02b39e261251 (patch) | |
| tree | 00b16926c90fefc387a303e5e4f270a3ed8f1756 /target/linux | |
| parent | df13384c56585408699479cb3dbc501c394df31c (diff) | |
| download | upstream-4053dd3f829d2fc1150c79cfe6dd02b39e261251.tar.gz upstream-4053dd3f829d2fc1150c79cfe6dd02b39e261251.tar.bz2 upstream-4053dd3f829d2fc1150c79cfe6dd02b39e261251.zip | |
lantiq: dts: add reg if unit address is set
Add the reg property if the node has an unit address. Fixes the
following device tree compiler warning:
Warning (unit_address_vs_reg): node has a unit name, but no reg property
Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'target/linux')
5 files changed, 29 insertions, 0 deletions
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/amazonse.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/amazonse.dtsi index 8b80e6a223..1be842094b 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/amazonse.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/amazonse.dtsi @@ -14,8 +14,12 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips4Kc"; + reg = <0>; }; }; @@ -154,6 +158,7 @@ mei@e116000 { compatible = "lantiq,mei-xway"; + reg = <0xe116000 0x400>; interrupt-parent = <&icu0>; interrupts = <81>; }; @@ -182,6 +187,7 @@ ppe@e234000 { compatible = "lantiq,ppe-ase"; + reg = <0xe234000 0x40000>; interrupt-parent = <&icu0>; interrupts = <85>; }; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi index 687db7cc61..637de57662 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi @@ -14,8 +14,12 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips34K"; + reg = <0>; }; }; @@ -221,6 +225,7 @@ mei@e116000 { compatible = "lantiq,mei-xway"; + reg = <0xe116000 0x9c>; interrupt-parent = <&icu0>; interrupts = <63>; }; @@ -236,6 +241,7 @@ ppe@e234000 { compatible = "lantiq,ppe-arx100"; + reg = <0xe234000 0x3ffd>; interrupt-parent = <&icu0>; interrupts = <96>; }; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi index 4d3ebb2aa1..ca89e949d1 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi @@ -14,8 +14,12 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips24Kc"; + reg = <0>; }; }; @@ -205,6 +209,7 @@ mei@e116000 { compatible = "lantiq,mei-xway"; + reg = <0xe116000 0x400>; interrupt-parent = <&icu0>; interrupts = <63>; }; @@ -219,6 +224,7 @@ ppe@e234000 { compatible = "lantiq,ppe-danube"; + reg = <0xe234000 0x40000>; interrupt-parent = <&icu0>; interrupts = <96>; }; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/falcon.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/falcon.dtsi index 98f71819a2..ecb68e896e 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/falcon.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/falcon.dtsi @@ -4,8 +4,12 @@ compatible = "lantiq,falcon"; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips34kc"; + reg = <0>; }; }; diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/vr9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/vr9.dtsi index 7fd4643171..6764082e9b 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/vr9.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/vr9.dtsi @@ -14,8 +14,12 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips34Kc"; + reg = <0>; }; }; @@ -291,6 +295,7 @@ ppe@e234000 { compatible = "lantiq,ppe-xrx200"; + reg = <0xe234000 0x3ffd>; interrupt-parent = <&icu0>; interrupts = <96>; resets = <&reset0 3 3>, <&reset0 11 11>, <&reset0 23 23>; @@ -304,6 +309,8 @@ #size-cells = <2>; #address-cells = <3>; + reg = <0xd900000 0x1000>; + interrupt-parent = <&icu0>; interrupts = <161 144>; |