changed Makefile and profiles, added patches for kernel 2.6.24

(stable-branch of Openmoko)


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13613 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 453 insertions, 0 deletions

diff --git a/target/linux/s3c24xx/patches-2.6.24/1028-hxd8-core.patch.patch b/target/linux/s3c24xx/patches-2.6.24/1028-hxd8-core.patch.patch
new file mode 100644
index 0000000000..9e16713bc3
--- /dev/null
+++ b/target/linux/s3c24xx/patches-2.6.24/1028-hxd8-core.patch.patch
@@ -0,0 +1,453 @@
+From 23b8a1e056b74101ae9d51ccbab2d208e46c01a4 Mon Sep 17 00:00:00 2001
+From: mokopatches <mokopatches@openmoko.org>
+Date: Fri, 4 Apr 2008 11:34:06 +0100
+Subject: [PATCH] hxd8-core.patch
+ This patch adds another machine, the FIC HXD8
+
+---
+ arch/arm/mach-s3c2440/Kconfig       |    6 +
+ arch/arm/mach-s3c2440/Makefile      |    1 +
+ arch/arm/mach-s3c2440/mach-hxd8.c   |  381 +++++++++++++++++++++++++++++++++++
+ include/asm-arm/arch-s3c2440/hxd8.h |   16 ++
+ 4 files changed, 404 insertions(+), 0 deletions(-)
+ create mode 100644 arch/arm/mach-s3c2440/mach-hxd8.c
+ create mode 100644 include/asm-arm/arch-s3c2440/hxd8.h
+
+diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
+index f1915bd..6798d9c 100644
+--- a/arch/arm/mach-s3c2440/Kconfig
++++ b/arch/arm/mach-s3c2440/Kconfig
+@@ -67,6 +67,12 @@ config SMDK2440_CPU2440
+ 	default y if ARCH_S3C2440
+ 	select CPU_S3C2440
+ 
++config MACH_HXD8
++	bool "FIC HXD8"
++	select CPU_S3C2440
++	select SENSORS_PCF50606
++	help
++	   Say Y here if you are using the FIC Neo1973 GSM Phone
+ 
+ endmenu
+ 
+diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
+index c81ed62..6f590d4 100644
+--- a/arch/arm/mach-s3c2440/Makefile
++++ b/arch/arm/mach-s3c2440/Makefile
+@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_OSIRIS)	+= mach-osiris.o
+ obj-$(CONFIG_MACH_RX3715)	+= mach-rx3715.o
+ obj-$(CONFIG_ARCH_S3C2440)	+= mach-smdk2440.o
+ obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
++obj-$(CONFIG_MACH_HXD8)		+= mach-hxd8.o
+diff --git a/arch/arm/mach-s3c2440/mach-hxd8.c b/arch/arm/mach-s3c2440/mach-hxd8.c
+new file mode 100644
+index 0000000..3400ed3
+--- /dev/null
++++ b/arch/arm/mach-s3c2440/mach-hxd8.c
+@@ -0,0 +1,381 @@
++/* linux/arch/arm/mach-s3c2440/mach-hxd8.c
++ *
++ * S3C2440 Machine Support for the FIC HXD8
++ *
++ * Copyright (c) 2007 OpenMoko, Inc.
++ * Author: Harald Welte <laforge@openmoko.org>
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/timer.h>
++#include <linux/init.h>
++#include <linux/workqueue.h>
++#include <linux/serial_core.h>
++#include <linux/platform_device.h>
++#include <linux/mmc/host.h>
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/nand_ecc.h>
++#include <linux/mtd/partitions.h>
++
++#include <linux/pcf50606.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/hardware.h>
++#include <asm/hardware/iomd.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/mach-types.h>
++
++//#include <asm/debug-ll.h>
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/regs-lcd.h>
++#include <asm/arch/idle.h>
++#include <asm/arch/fb.h>
++#include <asm/arch/mci.h>
++#include <asm/arch/ts.h>
++#include <asm/arch/spi.h>
++#include <asm/arch/spi-gpio.h>
++#include <asm/arch/usb-control.h>
++
++#include <asm/arch-s3c2440/hxd8.h>
++#include <asm/arch/gta01.h>
++
++//#include "s3c2410.h"
++//#include "s3c2440.h"
++//#include "clock.h"
++#include <asm/plat-s3c/regs-serial.h>
++#include <asm/plat-s3c/nand.h>
++#include <asm/plat-s3c24xx/devs.h>
++#include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/pm.h>
++#include <asm/plat-s3c24xx/udc.h>
++
++static struct map_desc hxd8_iodesc[] __initdata = {
++	/* ISA IO Space map (memory space selected by A24) */
++
++	{
++		.virtual	= (u32)S3C24XX_VA_ISA_WORD,
++		.pfn		= __phys_to_pfn(S3C2410_CS2),
++		.length		= 0x10000,
++		.type		= MT_DEVICE,
++	}, {
++		.virtual	= (u32)S3C24XX_VA_ISA_WORD + 0x10000,
++		.pfn		= __phys_to_pfn(S3C2410_CS2 + (1<<24)),
++		.length		= SZ_4M,
++		.type		= MT_DEVICE,
++	}, {
++		.virtual	= (u32)S3C24XX_VA_ISA_BYTE,
++		.pfn		= __phys_to_pfn(S3C2410_CS2),
++		.length		= 0x10000,
++		.type		= MT_DEVICE,
++	}, {
++		.virtual	= (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
++		.pfn		= __phys_to_pfn(S3C2410_CS2 + (1<<24)),
++		.length		= SZ_4M,
++		.type		= MT_DEVICE,
++	}
++};
++
++#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
++
++static struct s3c2410_uartcfg hxd8_uartcfgs[] __initdata = {
++	[0] = {
++		.hwport	     = 0,
++		.flags	     = 0,
++		.ucon	     = 0x3c5,
++		.ulcon	     = 0x03,
++		.ufcon	     = 0x51,
++	},
++	[1] = {
++		.hwport	     = 1,
++		.flags	     = 0,
++		.ucon	     = 0x3c5,
++		.ulcon	     = 0x03,
++		.ufcon	     = 0x51,
++	},
++	[2] = {
++		.hwport	     = 2,
++		.flags	     = 0,
++		.ucon	     = 0x3c5,
++		.ulcon	     = 0x03,
++		.ufcon	     = 0x51,
++	}
++};
++
++static struct s3c2410_nand_set hxd8_nand_sets[] = {
++	[0] = {
++		.name		= "hxd8-nand",
++		.nr_chips	= 1,
++		.flags		= S3C2410_NAND_BBT,
++	},
++	[1] = {
++		.name		= "hxd8-nand-1",
++		.nr_chips	= 1,
++		.flags		= S3C2410_NAND_BBT,
++	},
++	[2] = {
++		.name		= "hxd8-nand-2",
++		.nr_chips	= 1,
++		.flags		= S3C2410_NAND_BBT,
++	},
++};
++
++/* choose a set of timings which should suit most 512Mbit
++ * chips and beyond.
++*/
++
++static struct s3c2410_platform_nand hxd8_nand_info = {
++	.tacls		= 20,
++	.twrph0		= 60,
++	.twrph1		= 20,
++	.nr_sets	= ARRAY_SIZE(hxd8_nand_sets),
++	.sets		= hxd8_nand_sets,
++};
++
++/* PMU configuration */
++
++static struct pcf50606_platform_data hxd8_pcf_pdata = {
++	.used_features	= PCF50606_FEAT_EXTON |
++			  PCF50606_FEAT_BBC |
++			  PCF50606_FEAT_WDT |
++			  PCF50606_FEAT_RTC |
++			  PCF50606_FEAT_PWM |
++			  PCF50606_FEAT_PWM_BL |
++			  PCF50606_FEAT_BATVOLT,
++	.onkey_seconds_required	= 5,
++	.init_brightness = 8,
++	.rails	= {
++		[PCF50606_REGULATOR_D1REG] = {
++			.name		= "rc_3v3",
++			.voltage	= {
++				.init	= 3300,
++				.max	= 3300,
++			},
++		},
++		[PCF50606_REGULATOR_D2REG] = {
++			.name		= "gps_3v3",
++			.voltage	= {
++				.init	= 3300,
++				.max	= 3300,
++			},
++		},
++		[PCF50606_REGULATOR_D3REG] = {
++			.name		= "io2_3v3",
++			.voltage	= {
++				.init	= 3300,
++				.max	= 3300,
++			},
++		},
++		[PCF50606_REGULATOR_DCD] = {
++			.name		= "core_1v3",
++			.voltage	= {
++				.init	= 1300,
++				.max	= 1500,
++			},
++		},
++		[PCF50606_REGULATOR_DCDE] = {
++			.name		= "io1_3v3",
++			.voltage	= {
++				.init	= 3300,
++				.max	= 3300,
++			},
++		},
++		[PCF50606_REGULATOR_DCUD] = {
++			.name		= "rf_3v3",
++			.voltage	= {
++				.init	= 3300,
++				.max	= 3300,
++			},
++		},
++		[PCF50606_REGULATOR_IOREG] = {
++			.name		= "audio_3v3",
++			.voltage	= {
++				.init	= 3300,
++				.max	= 3300,
++			},
++		},
++		[PCF50606_REGULATOR_LPREG] = {
++			.name		= "lcm_3v3",
++			.voltage	= {
++				.init	= 3300,
++				.max	= 3300,
++			},
++		},
++	},
++};
++
++static struct resource hxd8_pmu_resources[] = {
++	[0] = {
++		.flags	= IORESOURCE_IRQ,
++		.start	= HXD8_IRQ_PCF50606,
++		.end	= HXD8_IRQ_PCF50606,
++	},
++};
++
++static struct platform_device hxd8_pmu_dev = {
++	.name		= "pcf50606",
++	.num_resources	= ARRAY_SIZE(hxd8_pmu_resources),
++	.resource	= hxd8_pmu_resources,
++	.dev		= {
++		.platform_data = &hxd8_pcf_pdata,
++	},
++};
++
++/* LCD driver info */
++
++static struct s3c2410fb_display hxd8_displays[] __initdata =  {
++	{
++		.type		= S3C2410_LCDCON1_TFT,
++		.width		= 480,
++		.height		= 272,
++		.xres		= 480,
++		.yres		= 272,
++		.bpp		= 16,
++
++		.pixclock	= 40000,	/* HCLK/4 */
++		.left_margin	= 2,
++		.right_margin	= 2,
++		.hsync_len	= 41,
++		.upper_margin	= 2,
++		.lower_margin	= 2,
++		.vsync_len	= 10,
++		.lcdcon5	= S3C2410_LCDCON5_FRM565 |
++				  S3C2410_LCDCON5_INVVLINE |
++				  S3C2410_LCDCON5_INVVFRAME,
++	},
++};
++
++static struct s3c2410fb_mach_info hxd8_lcd_cfg __initdata = {
++	.displays	= hxd8_displays,
++	.num_displays	= ARRAY_SIZE(hxd8_displays),
++	.default_display = 1,
++
++	.lpcsel		= ((0xCE6) & ~7),
++};
++
++static struct platform_device hxd8_pm_gsm_dev = {
++	.name		= "neo1973-pm-gsm",
++};
++
++static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
++{
++	printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
++
++	switch (cmd) {
++	case S3C2410_UDC_P_ENABLE:
++		s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 1);
++		break;
++	case S3C2410_UDC_P_DISABLE:
++		s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 0);
++		break;
++	case S3C2410_UDC_P_RESET:
++		/* FIXME! */
++		break;
++	default:
++		break;
++	}
++}
++
++/* USB Charger */
++
++static void hxd8_udc_vbus_draw(unsigned int ma)
++{
++	if (ma >= 500) {
++		/* enable fast charge */
++		printk(KERN_DEBUG "udc: enabling fast charge\n");
++		s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 1);
++	} else {
++		/* disable fast charge */
++		printk(KERN_DEBUG "udc: disabling fast charge\n");
++		s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 0);
++	}
++}
++
++static struct s3c2410_udc_mach_info hxd8_udc_cfg = {
++	.vbus_draw	= hxd8_udc_vbus_draw,
++};
++
++/* Touch Screen */
++static struct s3c2410_ts_mach_info hxd8_ts_cfg = {
++	.delay = 10000,
++	.presc = 49,
++	.oversampling_shift = 4,
++};
++
++static struct platform_device *hxd8_devices[] __initdata = {
++	&s3c_device_usb,
++	&s3c_device_lcd,
++	&s3c_device_wdt,
++	&s3c_device_i2c,
++	&s3c_device_iis,
++	&s3c_device_sdi,
++	&s3c_device_usbgadget,
++	&s3c_device_nand,
++	&s3c_device_ts,
++};
++
++static void __init hxd8_map_io(void)
++{
++	s3c24xx_init_io(hxd8_iodesc, ARRAY_SIZE(hxd8_iodesc));
++	s3c24xx_init_clocks(16934400);
++	s3c24xx_init_uarts(hxd8_uartcfgs, ARRAY_SIZE(hxd8_uartcfgs));
++}
++
++static void __init hxd8_machine_init(void)
++{
++	hxd8_udc_cfg.udc_command = gta01_udc_command;
++	s3c_device_nand.dev.platform_data = &hxd8_nand_info;
++
++	s3c24xx_fb_set_platdata(&hxd8_lcd_cfg);
++
++	s3c24xx_udc_set_platdata(&hxd8_udc_cfg);
++	set_s3c2410ts_info(&hxd8_ts_cfg);
++
++	//platform_device_register(&gta01_button_dev);
++	platform_device_register(&hxd8_pm_gsm_dev);
++
++	platform_device_register(&hxd8_pmu_dev);
++
++	platform_add_devices(hxd8_devices, ARRAY_SIZE(hxd8_devices));
++
++	s3c2410_pm_init();
++}
++
++MACHINE_START(HXD8, "HXD8")
++	/* Maintainer: Harald Welte <laforge@openmoko.org> */
++	.phys_io	= S3C2410_PA_UART,
++	.io_pg_offst	= (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
++	.boot_params	= S3C2410_SDRAM_PA + 0x100,
++
++	.init_irq	= s3c24xx_init_irq,
++	.map_io		= hxd8_map_io,
++	.init_machine	= hxd8_machine_init,
++	.timer		= &s3c24xx_timer,
++MACHINE_END
+diff --git a/include/asm-arm/arch-s3c2440/hxd8.h b/include/asm-arm/arch-s3c2440/hxd8.h
+new file mode 100644
+index 0000000..50e9c11
+--- /dev/null
++++ b/include/asm-arm/arch-s3c2440/hxd8.h
+@@ -0,0 +1,16 @@
++#ifndef _HXD8_H
++#define _HXD8_H
++
++#include <asm/arch/regs-gpio.h>
++#include <asm/arch/irqs.h>
++
++#define HXD8v1_SYSTEM_REV	0x00000110
++
++#define HXD8_GPIO_USB_CUR_SEL	S3C2410_GPA0
++#define HXD8_GPIO_BACKLIGHT	S3C2410_GPB0
++#define HXD8_GPIO_USB_PULLUP	S3C2410_GPB9
++#define HXD8_GPIO_PCF50606	S3C2410_GPF6
++
++#define HXD8_IRQ_PCF50606	IRQ_EINT6
++
++#endif
+-- 
+1.5.6.5
+