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| author | Ian Chang <ianchang@ieiworld.com> | 2021-09-02 17:47:01 +0800 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2021-10-14 13:09:57 +0100 |
| commit | bb1eb5e8e6609d0a2f2c8d3123038bee410bdb0e (patch) | |
| tree | 3d281c7d7377cfca79278d1b874477c2cc4b5658 /target/linux/mvebu/image/cortexa72.mk | |
| parent | f1f304940b72def82dc22cebd78436505f2d6b9f (diff) | |
| download | upstream-bb1eb5e8e6609d0a2f2c8d3123038bee410bdb0e.tar.gz upstream-bb1eb5e8e6609d0a2f2c8d3123038bee410bdb0e.tar.bz2 upstream-bb1eb5e8e6609d0a2f2c8d3123038bee410bdb0e.zip | |
mvebu: backport CN9130 dts necessary files changes to 5.4
1. Add support for Marvell CN9130 SoC
2. Add support for CP115,and create an armada-cp11x.dtsi file which will be used to instantiate both CP110 and CP115
3. Add support for AP807/AP807-quad,AP807 is a major component of CN9130 SoC series
4. Drop PCIe I/O ranges from CP11x file and externalize PCIe macros from CP11x file
Signed-off-by: Ian Chang <ianchang@ieiworld.com>
(cherry picked from commit c98ddf0f019986bbb4c868bfcaf97e0d1f4ee2dc)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target/linux/mvebu/image/cortexa72.mk')
0 files changed, 0 insertions, 0 deletions