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author | John Crispin <john@phrozen.org> | 2016-05-23 11:20:20 +0200 |
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committer | John Crispin <john@phrozen.org> | 2016-05-23 11:20:20 +0200 |
commit | f5f173e2b794bd996fa6171bb6b18f13c4ed1e90 (patch) | |
tree | 749ba954d2b50e43e9cc83777a0b61dc42734a52 /target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch | |
parent | a39ac242cc3ec0c2d39342754d86ec97e9e4fb32 (diff) | |
download | upstream-f5f173e2b794bd996fa6171bb6b18f13c4ed1e90.tar.gz upstream-f5f173e2b794bd996fa6171bb6b18f13c4ed1e90.tar.bz2 upstream-f5f173e2b794bd996fa6171bb6b18f13c4ed1e90.zip |
mediatek: update patches
* fixes NAND
* adds latest ethernet patches
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch')
-rw-r--r-- | target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch b/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch index 29e0ae46f2..4057365849 100644 --- a/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch +++ b/target/linux/mediatek/patches-4.4/0008-clk-mediatek-Add-dt-bindings-for-MT2701-clocks.patch @@ -1,7 +1,7 @@ -From 2fcbc15da2f13164e0851b9c7fae290249f0b44d Mon Sep 17 00:00:00 2001 +From 190696e3995be38fa01490e4ab88ea2c859829c9 Mon Sep 17 00:00:00 2001 From: Shunli Wang <shunli.wang@mediatek.com> Date: Tue, 5 Jan 2016 14:30:19 +0800 -Subject: [PATCH 08/91] clk: mediatek: Add dt-bindings for MT2701 clocks +Subject: [PATCH 008/102] clk: mediatek: Add dt-bindings for MT2701 clocks Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. @@ -13,6 +13,9 @@ Signed-off-by: James Liao <jamesjj.liao@mediatek.com> 1 file changed, 481 insertions(+) create mode 100644 include/dt-bindings/clock/mt2701-clk.h +diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h +new file mode 100644 +index 0000000..50972d1 --- /dev/null +++ b/include/dt-bindings/clock/mt2701-clk.h @@ -0,0 +1,481 @@ @@ -497,3 +500,6 @@ Signed-off-by: James Liao <jamesjj.liao@mediatek.com> +#define CLK_BDP_NR 50 + +#endif /* _DT_BINDINGS_CLK_MT2701_H */ +-- +1.7.10.4 + |