diff options
| author | Stijn Tintel <stijn@linux-ipv6.be> | 2018-05-29 00:10:44 +0300 |
|---|---|---|
| committer | Stijn Tintel <stijn@linux-ipv6.be> | 2018-05-29 00:53:15 +0300 |
| commit | 64b53247c494898eaa78090fbc0a0727fce055d2 (patch) | |
| tree | 097f1bf24fd6593244f9de7125751d802a2ef3e2 /target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch | |
| parent | f4a639a3d7d40b4f63c431c2d554c479fbcc6b74 (diff) | |
| download | upstream-64b53247c494898eaa78090fbc0a0727fce055d2.tar.gz upstream-64b53247c494898eaa78090fbc0a0727fce055d2.tar.bz2 upstream-64b53247c494898eaa78090fbc0a0727fce055d2.zip | |
kernel: bump 4.14 to 4.14.44
Refresh patches.
Remove upstreamed patch:
generic/pending/181-net-usb-add-lte-modem-wistron-neweb-d18q1.patch
Update patches that no longer applies:
generic/hack/901-debloat_sock_diag.patch
Compile-tested on: x86/64.
Runtime-tested on: x86/64.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Diffstat (limited to 'target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch b/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch index 89cb7c8617..8a183ceb54 100644 --- a/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch +++ b/target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch @@ -13,8 +13,6 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> drivers/mmc/host/mtk-sd.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) -diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c -index 94d16a3a8d94..a2f26c9b17b4 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -372,6 +372,7 @@ struct msdc_host { @@ -25,7 +23,7 @@ index 94d16a3a8d94..a2f26c9b17b4 100644 u32 mclk; /* mmc subsystem clock frequency */ u32 src_clk_freq; /* source clock frequency */ u32 sclk; /* SD/MS bus clock frequency */ -@@ -616,6 +617,7 @@ static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks) +@@ -616,6 +617,7 @@ static void msdc_set_timeout(struct msdc static void msdc_gate_clock(struct msdc_host *host) { @@ -33,7 +31,7 @@ index 94d16a3a8d94..a2f26c9b17b4 100644 clk_disable_unprepare(host->src_clk); clk_disable_unprepare(host->h_clk); } -@@ -624,6 +626,7 @@ static void msdc_ungate_clock(struct msdc_host *host) +@@ -624,6 +626,7 @@ static void msdc_ungate_clock(struct msd { clk_prepare_enable(host->h_clk); clk_prepare_enable(host->src_clk); @@ -41,7 +39,7 @@ index 94d16a3a8d94..a2f26c9b17b4 100644 while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) cpu_relax(); } -@@ -692,6 +695,15 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) +@@ -692,6 +695,15 @@ static void msdc_set_mclk(struct msdc_ho sclk = (host->src_clk_freq >> 2) / div; } } @@ -57,7 +55,7 @@ index 94d16a3a8d94..a2f26c9b17b4 100644 if (host->dev_comp->clk_div_bits == 8) sdr_set_field(host->base + MSDC_CFG, MSDC_CFG_CKMOD | MSDC_CFG_CKDIV, -@@ -700,10 +712,14 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) +@@ -700,10 +712,14 @@ static void msdc_set_mclk(struct msdc_ho sdr_set_field(host->base + MSDC_CFG, MSDC_CFG_CKMOD_EXTRA | MSDC_CFG_CKDIV_EXTRA, (mode << 12) | div); @@ -73,7 +71,7 @@ index 94d16a3a8d94..a2f26c9b17b4 100644 host->sclk = sclk; host->mclk = hz; host->timing = timing; -@@ -1822,6 +1838,11 @@ static int msdc_drv_probe(struct platform_device *pdev) +@@ -1822,6 +1838,11 @@ static int msdc_drv_probe(struct platfor goto host_free; } @@ -85,6 +83,3 @@ index 94d16a3a8d94..a2f26c9b17b4 100644 host->irq = platform_get_irq(pdev, 0); if (host->irq < 0) { ret = -EINVAL; --- -2.11.0 - |