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authorYangbo Lu <yangbo.lu@nxp.com>2020-04-10 10:47:05 +0800
committerPetr Štetiar <ynezz@true.cz>2020-05-07 12:53:06 +0200
commitcddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch)
tree392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/701-net-0341-LF-368-net-mscc-ocelot-add-VCAP-IS2-rule-to-trap-PTP.patch
parentd1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff)
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layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/701-net-0341-LF-368-net-mscc-ocelot-add-VCAP-IS2-rule-to-trap-PTP.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/701-net-0341-LF-368-net-mscc-ocelot-add-VCAP-IS2-rule-to-trap-PTP.patch60
1 files changed, 60 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/701-net-0341-LF-368-net-mscc-ocelot-add-VCAP-IS2-rule-to-trap-PTP.patch b/target/linux/layerscape/patches-5.4/701-net-0341-LF-368-net-mscc-ocelot-add-VCAP-IS2-rule-to-trap-PTP.patch
new file mode 100644
index 0000000000..af80b9f666
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/701-net-0341-LF-368-net-mscc-ocelot-add-VCAP-IS2-rule-to-trap-PTP.patch
@@ -0,0 +1,60 @@
+From 67ca04147efac6cac3f7490c61c817a84daada57 Mon Sep 17 00:00:00 2001
+From: Yangbo Lu <yangbo.lu@nxp.com>
+Date: Thu, 28 Nov 2019 14:42:44 +0800
+Subject: [PATCH] LF-368 net: mscc: ocelot: add VCAP IS2 rule to trap PTP
+ Ethernet frames
+
+All the PTP messages over Ethernet have etype 0x88f7 on them.
+Use etype as the key to trap PTP messages.
+
+Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+---
+ drivers/net/ethernet/mscc/ocelot.c | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+--- a/drivers/net/ethernet/mscc/ocelot.c
++++ b/drivers/net/ethernet/mscc/ocelot.c
+@@ -2338,6 +2338,20 @@ void ocelot_set_cpu_port(struct ocelot *
+ }
+ EXPORT_SYMBOL(ocelot_set_cpu_port);
+
++/* Entry for PTP over Ethernet (etype 0x88f7)
++ * Action: trap to CPU port
++ */
++static struct ocelot_ace_rule ptp_rule = {
++ .prio = 1,
++ .type = OCELOT_ACE_TYPE_ETYPE,
++ .dmac_mc = OCELOT_VCAP_BIT_1,
++ .action = OCELOT_ACL_ACTION_TRAP,
++ .frame.etype.etype.value[0] = 0x88,
++ .frame.etype.etype.value[1] = 0xf7,
++ .frame.etype.etype.mask[0] = 0xff,
++ .frame.etype.etype.mask[1] = 0xff,
++};
++
+ int ocelot_init(struct ocelot *ocelot)
+ {
+ char queue_name[32];
+@@ -2475,6 +2489,13 @@ int ocelot_init(struct ocelot *ocelot)
+ "Timestamp initialization failed\n");
+ return ret;
+ }
++
++ /* Available on all ingress port except CPU port */
++ ptp_rule.ocelot = ocelot;
++ ptp_rule.ingress_port_mask =
++ GENMASK(ocelot->num_phys_ports - 1, 0);
++ ptp_rule.ingress_port_mask &= ~BIT(ocelot->cpu);
++ ocelot_ace_rule_offload_add(&ptp_rule);
+ }
+
+ return 0;
+@@ -2489,6 +2510,8 @@ void ocelot_deinit(struct ocelot *ocelot
+ cancel_delayed_work(&ocelot->stats_work);
+ destroy_workqueue(ocelot->stats_queue);
+ mutex_destroy(&ocelot->stats_lock);
++ if (ocelot->ptp)
++ ocelot_ace_rule_offload_del(&ptp_rule);
+ ocelot_ace_deinit();
+ if (ocelot->ptp_clock)
+ ptp_clock_unregister(ocelot->ptp_clock);