layerscape: add patches-5.4

Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 101 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/701-net-0315-net-fsl_ppfe-update-dts-properties-for-phy.patch b/target/linux/layerscape/patches-5.4/701-net-0315-net-fsl_ppfe-update-dts-properties-for-phy.patch
new file mode 100644
index 0000000000..6c74496ec8
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/701-net-0315-net-fsl_ppfe-update-dts-properties-for-phy.patch
@@ -0,0 +1,101 @@
+From 153d669864c9280698641a6708c5ddcffbfeda26 Mon Sep 17 00:00:00 2001
+From: Calvin Johnson <calvin.johnson@nxp.com>
+Date: Tue, 20 Nov 2018 21:51:53 +0530
+Subject: [PATCH] net: fsl_ppfe: update dts properties for phy
+
+Use commonly used phy-handle property and mdio subnode to handle
+phy properties.
+
+Deprecate bindings fsl,gemac-phy-id & fsl,pfe-phy-if-flags.
+
+Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
+---
+ .../devicetree/bindings/net/fsl_ppfe/pfe.txt       | 60 ++++++++++++++++------
+ 1 file changed, 43 insertions(+), 17 deletions(-)
+
+--- a/Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt
++++ b/Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt
+@@ -127,11 +127,12 @@ PROPERTIES
+ 		Definition: Must be present. Value should be the id of the bus
+ 		connected to gemac.
+ 
+-- fsl,gemac-phy-id
+-		Usage: required
+-		Value type: <u32>
+-		Definition: Must be present. Value should be the id of the phy
+-		connected to gemac.
++- fsl,gemac-phy-id (deprecated binding)
++               Usage: required
++               Value type: <u32>
++               Definition: This binding shouldn't be used with new platforms.
++	       Must be present. Value should be the id of the phy
++               connected to gemac.
+ 
+ - fsl,mdio-mux-val
+ 		Usage: required
+@@ -144,15 +145,20 @@ PROPERTIES
+ 		Value type: <string>
+ 		Definition: Must include "sgmii"
+ 
+-- fsl,pfe-phy-if-flags
+-		Usage: required
+-		Value type: <u32>
+-		Definition: Must be present. Value should be 0 by default.
+-		If there is not phy connected, this need to be 1.
++- fsl,pfe-phy-if-flags (deprecated binding)
++               Usage: required
++               Value type: <u32>
++               Definition: This binding shouldn't be used with new platforms.
++               Must be present. Value should be 0 by default.
++               If there is not phy connected, this need to be 1.
++
++- phy-handle
++		Usage: optional
++		Value type: <phandle>
++		Definition: phandle to the PHY device connected to this device.
+ 
+-- mdio
+-		optional subnode that specifies the mdio bus. This has reg
+-		property which is used to enable/disable the mdio bus.
++- mdio : A required subnode which specifies the mdio bus in the PFE and used as
++a container for phy nodes according to ../phy.txt.
+ 
+ EXAMPLE
+ 
+@@ -162,12 +168,32 @@ ethernet@0 {
+ 	#size-cells = <0>;
+ 	reg = <0x0>;	/* GEM_ID */
+ 	fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
+-	fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
+ 	fsl,mdio-mux-val = <0x0>;
+ 	phy-mode = "sgmii";
+-	fsl,pfe-phy-if-flags = <0x0>;
++	phy-handle = <&sgmii_phy1>;
++};
++
++
++ethernet@1 {
++	compatible = "fsl,pfe-gemac-port";
++	#address-cells = <1>;
++	#size-cells = <0>;
++	reg = <0x1>;	/* GEM_ID */
++	fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
++	fsl,mdio-mux-val = <0x0>;
++	phy-mode = "sgmii";
++	phy-handle = <&sgmii_phy2>;
++};
++
++mdio@0 {
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	sgmii_phy1: ethernet-phy@2 {
++		reg = <0x2>;
++	};
+ 
+-	mdio@0 {
+-		reg = <0x1>; /* enabled/disabled */
++	sgmii_phy2: ethernet-phy@1 {
++		reg = <0x1>;
+ 	};
+ };