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authorJohn Crispin <john@phrozen.org>2016-06-07 20:33:35 +0200
committerJohn Crispin <john@phrozen.org>2016-06-13 22:51:42 +0200
commit46cecfd6d727f398b568080655a77ea07308053b (patch)
tree09ec2303ba12556ce3276ae80534d5f9469f77c2 /target/linux/ipq806x/patches-3.18/101-ARM-qcom-add-USB-nodes-to-ipq806x-ap148.patch
parent53147c2237231842b4d185f69c2bc0d79aff8b85 (diff)
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ipg806x: set v4.4 as default
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ipq806x/patches-3.18/101-ARM-qcom-add-USB-nodes-to-ipq806x-ap148.patch')
-rw-r--r--target/linux/ipq806x/patches-3.18/101-ARM-qcom-add-USB-nodes-to-ipq806x-ap148.patch126
1 files changed, 0 insertions, 126 deletions
diff --git a/target/linux/ipq806x/patches-3.18/101-ARM-qcom-add-USB-nodes-to-ipq806x-ap148.patch b/target/linux/ipq806x/patches-3.18/101-ARM-qcom-add-USB-nodes-to-ipq806x-ap148.patch
deleted file mode 100644
index e2d03d4ffd..0000000000
--- a/target/linux/ipq806x/patches-3.18/101-ARM-qcom-add-USB-nodes-to-ipq806x-ap148.patch
+++ /dev/null
@@ -1,126 +0,0 @@
---- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-@@ -91,5 +91,29 @@
- sata@29000000 {
- status = "ok";
- };
-+
-+ phy@100f8800 { /* USB3 port 1 HS phy */
-+ status = "ok";
-+ };
-+
-+ phy@100f8830 { /* USB3 port 1 SS phy */
-+ status = "ok";
-+ };
-+
-+ phy@110f8800 { /* USB3 port 0 HS phy */
-+ status = "ok";
-+ };
-+
-+ phy@110f8830 { /* USB3 port 0 SS phy */
-+ status = "ok";
-+ };
-+
-+ usb30@0 {
-+ status = "ok";
-+ };
-+
-+ usb30@1 {
-+ status = "ok";
-+ };
- };
- };
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -296,6 +296,91 @@
- compatible = "syscon";
- reg = <0x01200600 0x100>;
- };
-+
-+ hs_phy_1: phy@100f8800 {
-+ compatible = "qcom,dwc3-hs-usb-phy";
-+ reg = <0x100f8800 0x30>;
-+ clocks = <&gcc USB30_1_UTMI_CLK>;
-+ clock-names = "ref";
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
-+ };
-+
-+ ss_phy_1: phy@100f8830 {
-+ compatible = "qcom,dwc3-ss-usb-phy";
-+ reg = <0x100f8830 0x30>;
-+ clocks = <&gcc USB30_1_MASTER_CLK>;
-+ clock-names = "ref";
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
-+ };
-+
-+ hs_phy_0: phy@110f8800 {
-+ compatible = "qcom,dwc3-hs-usb-phy";
-+ reg = <0x110f8800 0x30>;
-+ clocks = <&gcc USB30_0_UTMI_CLK>;
-+ clock-names = "ref";
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
-+ };
-+
-+ ss_phy_0: phy@110f8830 {
-+ compatible = "qcom,dwc3-ss-usb-phy";
-+ reg = <0x110f8830 0x30>;
-+ clocks = <&gcc USB30_0_MASTER_CLK>;
-+ clock-names = "ref";
-+ #phy-cells = <0>;
-+
-+ status = "disabled";
-+ };
-+
-+ usb3_0: usb30@0 {
-+ compatible = "qcom,dwc3";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ clocks = <&gcc USB30_0_MASTER_CLK>;
-+ clock-names = "core";
-+
-+ ranges;
-+
-+ status = "disabled";
-+
-+ dwc3@11000000 {
-+ compatible = "snps,dwc3";
-+ reg = <0x11000000 0xcd00>;
-+ interrupts = <0 110 0x4>;
-+ phys = <&hs_phy_0>, <&ss_phy_0>;
-+ phy-names = "usb2-phy", "usb3-phy";
-+ tx-fifo-resize;
-+ dr_mode = "host";
-+ };
-+ };
-+
-+ usb3_1: usb30@1 {
-+ compatible = "qcom,dwc3";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ clocks = <&gcc USB30_1_MASTER_CLK>;
-+ clock-names = "core";
-+
-+ ranges;
-+
-+ status = "disabled";
-+
-+ dwc3@10000000 {
-+ compatible = "snps,dwc3";
-+ reg = <0x10000000 0xcd00>;
-+ interrupts = <0 205 0x4>;
-+ phys = <&hs_phy_1>, <&ss_phy_1>;
-+ phy-names = "usb2-phy", "usb3-phy";
-+ tx-fifo-resize;
-+ dr_mode = "host";
-+ };
-+ };
-+
- };
-
- sfpb_mutex: sfpb-mutex {