preliminary 3.12 support

Signed-off-by: Imre Kaloz <kaloz@openwrt.org>

SVN-Revision: 38528

1 files changed, 91 insertions, 0 deletions

diff --git a/target/linux/generic/patches-3.12/131-improve_noncoherent_dma_checks.patch b/target/linux/generic/patches-3.12/131-improve_noncoherent_dma_checks.patch
new file mode 100644
index 0000000000..ac8361755e
--- /dev/null
+++ b/target/linux/generic/patches-3.12/131-improve_noncoherent_dma_checks.patch
@@ -0,0 +1,91 @@
+From d593f8fc627f8cdaee9c14e4d22b0770a09baaf1 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <nbd@openwrt.org>
+Date: Thu, 15 Aug 2013 10:47:47 +0200
+Subject: [PATCH] MIPS: improve checks for noncoherent DMA
+
+Only one MIPS development board actually supports enabling/disabling DMA
+coherency at runtime, so it's not a good idea to push the overhead of
+checking that configuration setting onto every other supported target as
+well.
+
+Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+---
+ arch/mips/Kconfig                                  | 6 +++++-
+ arch/mips/include/asm/dma-coherence.h              | 7 +++++++
+ arch/mips/include/asm/mach-generic/dma-coherence.h | 4 ----
+ arch/mips/mm/dma-default.c                         | 2 ++
+ 4 files changed, 14 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -299,7 +299,7 @@ config MIPS_MALTA
+ 	select CEVT_R4K
+ 	select CSRC_R4K
+ 	select CSRC_GIC
+-	select DMA_NONCOHERENT
++	select DMA_MAYBE_COHERENT
+ 	select GENERIC_ISA_DMA
+ 	select HAVE_PCSPKR_PLATFORM
+ 	select IRQ_CPU
+@@ -912,6 +912,10 @@ config FW_CFE
+ config ARCH_DMA_ADDR_T_64BIT
+ 	def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
+ 
++config DMA_MAYBE_COHERENT
++	select DMA_NONCOHERENT
++	bool
++
+ config DMA_COHERENT
+ 	bool
+ 
+--- a/arch/mips/include/asm/dma-coherence.h
++++ b/arch/mips/include/asm/dma-coherence.h
+@@ -9,7 +9,16 @@
+ #ifndef __ASM_DMA_COHERENCE_H
+ #define __ASM_DMA_COHERENCE_H
+ 
++#ifdef CONFIG_DMA_MAYBE_COHERENT
+ extern int coherentio;
+ extern int hw_coherentio;
++#else
++#ifdef CONFIG_DMA_COHERENT
++#define coherentio	1
++#else
++#define coherentio	0
++#endif
++#define hw_coherentio	0
++#endif /* CONFIG_DMA_MAYBE_COHERENT */
+ 
+ #endif
+--- a/arch/mips/include/asm/mach-generic/dma-coherence.h
++++ b/arch/mips/include/asm/mach-generic/dma-coherence.h
+@@ -49,11 +49,7 @@ static inline int plat_dma_supported(str
+ 
+ static inline int plat_device_is_coherent(struct device *dev)
+ {
+-#ifdef CONFIG_DMA_COHERENT
+-	return 1;
+-#else
+ 	return coherentio;
+-#endif
+ }
+ 
+ #ifdef CONFIG_SWIOTLB
+--- a/arch/mips/mm/dma-default.c
++++ b/arch/mips/mm/dma-default.c
+@@ -23,6 +23,7 @@
+ 
+ #include <dma-coherence.h>
+ 
++#ifdef CONFIG_DMA_MAYBE_COHERENT
+ int coherentio = 0;	/* User defined DMA coherency from command line. */
+ EXPORT_SYMBOL_GPL(coherentio);
+ int hw_coherentio = 0;	/* Actual hardware supported DMA coherency setting. */
+@@ -42,6 +43,7 @@ static int __init setnocoherentio(char *
+ 	return 0;
+ }
+ early_param("nocoherentio", setnocoherentio);
++#endif
+ 
+ static inline struct page *dma_addr_to_page(struct device *dev,
+ 	dma_addr_t dma_addr)