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authorKoen Vandeputte <koen.vandeputte@ncentric.com>2019-01-28 10:05:10 +0100
committerKoen Vandeputte <koen.vandeputte@ncentric.com>2019-01-28 18:17:32 +0100
commitc6bebe1a9496f9888e451a7f8aea6db916c0bdf2 (patch)
tree3072aa2d1d3c9af9a92eab2eefc0bafe0db754bc /target/linux/cns3xxx/patches-4.19/075-spi_support.patch
parent037800270bbb103819efce3f258bd0d7986b68a0 (diff)
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cns3xxx: add support for kernel 4.19
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Diffstat (limited to 'target/linux/cns3xxx/patches-4.19/075-spi_support.patch')
-rw-r--r--target/linux/cns3xxx/patches-4.19/075-spi_support.patch51
1 files changed, 51 insertions, 0 deletions
diff --git a/target/linux/cns3xxx/patches-4.19/075-spi_support.patch b/target/linux/cns3xxx/patches-4.19/075-spi_support.patch
new file mode 100644
index 0000000000..e4bd129340
--- /dev/null
+++ b/target/linux/cns3xxx/patches-4.19/075-spi_support.patch
@@ -0,0 +1,51 @@
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -181,6 +181,13 @@ config SPI_CLPS711X
+ This enables dedicated general purpose SPI/Microwire1-compatible
+ master mode interface (SSI1) for CLPS711X-based CPUs.
+
++config SPI_CNS3XXX
++ tristate "CNS3XXX SPI controller"
++ depends on ARCH_CNS3XXX && SPI_MASTER
++ select SPI_BITBANG
++ help
++ This enables using the CNS3XXX SPI controller in master mode.
++
+ config SPI_COLDFIRE_QSPI
+ tristate "Freescale Coldfire QSPI controller"
+ depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -28,6 +28,7 @@ obj-$(CONFIG_SPI_BITBANG) += spi-bitban
+ obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o
+ obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o
+ obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o
++obj-$(CONFIG_SPI_CNS3XXX) += spi-cns3xxx.o
+ obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o
+ obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o
+ obj-$(CONFIG_SPI_DLN2) += spi-dln2.o
+--- a/include/linux/spi/spi.h
++++ b/include/linux/spi/spi.h
+@@ -795,6 +795,10 @@ struct spi_transfer {
+ u32 speed_hz;
+
+ struct list_head transfer_list;
++
++#ifdef CONFIG_ARCH_CNS3XXX
++ unsigned last_in_message_list;
++#endif
+ };
+
+ /**
+--- a/drivers/spi/spi.c
++++ b/drivers/spi/spi.c
+@@ -1018,6 +1018,9 @@ static int spi_transfer_one_message(stru
+ list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+ trace_spi_transfer_start(msg, xfer);
+
++ xfer->last_in_message_list =
++ list_is_last(&xfer->transfer_list, &msg->transfers);
++
+ spi_statistics_add_transfer_stats(statm, xfer, ctlr);
+ spi_statistics_add_transfer_stats(stats, xfer, ctlr);
+