bcm63xx: add 3.9 support

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 36660

1 files changed, 59 insertions, 0 deletions

diff --git a/target/linux/brcm63xx/patches-3.9/318-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch b/target/linux/brcm63xx/patches-3.9/318-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch
new file mode 100644
index 0000000000..081ec18b3d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.9/318-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch
@@ -0,0 +1,59 @@
+From 398337c57ebe3c704e0df5f569e6bd860ffe8914 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 26 Apr 2013 11:21:16 +0200
+Subject: [PATCH 09/13] MIPS: BCM63XX: add cpu argument to dispatch internal
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c |   14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -19,8 +19,8 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+ 
+-static void __dispatch_internal_32(void) __maybe_unused;
+-static void __dispatch_internal_64(void) __maybe_unused;
++static void __dispatch_internal_32(int cpu) __maybe_unused;
++static void __dispatch_internal_64(int cpu) __maybe_unused;
+ static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
+ static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
+ static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
+@@ -140,7 +140,7 @@ static inline void bcm63xx_init_irq(void
+ #else /* ! BCMCPU_RUNTIME_DETECT */
+ 
+ static u32 irq_stat_addr0, irq_mask_addr0, irq_stat_addr1, irq_mask_addr1;
+-static void (*dispatch_internal)(void);
++static void (*dispatch_internal)(int cpu);
+ static int is_ext_irq_cascaded;
+ static unsigned int ext_irq_count;
+ static unsigned int ext_irq_start, ext_irq_end;
+@@ -282,14 +282,14 @@ static inline void handle_internal(int i
+  */
+ 
+ #define BUILD_IPIC_INTERNAL(width)					\
+-void __dispatch_internal_##width(void)					\
++void __dispatch_internal_##width(int cpu)				\
+ {									\
+ 	u32 pending[width / 32];					\
+ 	unsigned int src, tgt;						\
+ 	bool irqs_pending = false;					\
+ 	static int i;							\
+-	u32 irq_stat_addr = get_irq_stat_addr(0);			\
+-	u32 irq_mask_addr = get_irq_mask_addr(0);			\
++	u32 irq_stat_addr = get_irq_stat_addr(cpu);			\
++	u32 irq_mask_addr = get_irq_mask_addr(cpu);			\
+ 									\
+ 	/* read registers in reverse order */				\
+ 	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
+@@ -361,7 +361,7 @@ asmlinkage void plat_irq_dispatch(void)
+ 		if (cause & CAUSEF_IP1)
+ 			do_IRQ(1);
+ 		if (cause & CAUSEF_IP2)
+-			dispatch_internal();
++			dispatch_internal(0);
+ 		if (!is_ext_irq_cascaded) {
+ 			if (cause & CAUSEF_IP3)
+ 				do_IRQ(IRQ_EXT_0);