brcm63xx: rename target to bcm63xx

This change makes the names of Broadcom targets consistent by using
the common notation based on SoC/CPU ID (which is used internally
anyway), bcmXXXX instead of brcmXXXX.
This is even used for target TITLE in make menuconfig already,
only the short target name used brcm so far.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

1 files changed, 133 insertions, 0 deletions

diff --git a/target/linux/bcm63xx/dts/bcm3368.dtsi b/target/linux/bcm63xx/dts/bcm3368.dtsi
new file mode 100644
index 0000000000..66cb6ab8a8
--- /dev/null
+++ b/target/linux/bcm63xx/dts/bcm3368.dtsi
@@ -0,0 +1,133 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm3368";
+
+	aliases {
+		pflash = &pflash;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		spi0 = &lsspi;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	pflash: nor@1e000000 {
+		compatible = "cfi-flash";
+		reg = <0x1e000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus@fff00000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+		interrupt-parent = <&periph_intc>;
+
+		periph_intc: interrupt-controller@fff8c00c {
+			compatible = "brcm,bcm6345-l1-intc";
+			reg = <0xfff8c00c 0x8>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		ext_intc0: interrupt-controller@fff8c014 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfff8c014 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupts = <25>, <26>, <27>, <28>;
+		};
+
+		gpio1: gpio-controller@fff8c080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfff8c080 4>, <0xfff8c088 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <8>;
+		};
+
+		gpio0: gpio-controller@fff8c084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfff8c084 4>, <0xfff8c08c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		uart0: serial@fff8c100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfff8c100 0x18>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <2>;
+
+			/* clocks = <&periph_clk>; */
+			/* clock-names = "refclk"; */
+
+			status = "disabled";
+		};
+
+		uart1: serial@fff8c120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0xfff8c120 0x18>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <3>;
+
+			/* clocks = <&periph_clk>; */
+			/* clock-names = "refclk"; */
+
+			status = "disabled";
+		};
+
+		lsspi: spi@fff8c800 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "brcm,bcm6358-spi";
+			reg = <0xfff8c800 0x70c>;
+			interrupts = <1>;
+			/* clocks = <&clkctl 9>; */
+		};
+	};
+};