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| author | Zoltan Herpai <wigyori@uid0.hu> | 2016-09-21 21:13:17 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-09-21 21:13:17 +0200 |
| commit | d6b3ca24c50047af58135ad3090f7a3a25eee35d (patch) | |
| tree | 396e8a75db1ad4deccaee1f3beb9373264454e84 /target/linux/ar71xx/patches-3.18 | |
| parent | 2a97364ad496e90fbf3dc723a7db44096a9955f6 (diff) | |
| parent | 3411c9a885955875a02e764e34d5be21132a444e (diff) | |
| download | upstream-d6b3ca24c50047af58135ad3090f7a3a25eee35d.tar.gz upstream-d6b3ca24c50047af58135ad3090f7a3a25eee35d.tar.bz2 upstream-d6b3ca24c50047af58135ad3090f7a3a25eee35d.zip | |
Merge pull request #82 from ecsv/openmesh-cc
OpenMesh MR1750(v2) and OM2P-HSv3 support for Chaos Calmer
Diffstat (limited to 'target/linux/ar71xx/patches-3.18')
7 files changed, 274 insertions, 2 deletions
diff --git a/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch index 8bf7658314..0126f6a3b9 100644 --- a/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch +++ b/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch @@ -194,7 +194,7 @@ #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -@@ -529,6 +626,12 @@ +@@ -529,8 +626,22 @@ #define AR71XX_GPIO_REG_INT_ENABLE 0x24 #define AR71XX_GPIO_REG_FUNC 0x28 @@ -206,8 +206,18 @@ +#define AR934X_GPIO_REG_OUT_FUNC5 0x40 #define AR934X_GPIO_REG_FUNC 0x6c ++#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c ++#define QCA955X_GPIO_REG_OUT_FUNC1 0x30 ++#define QCA955X_GPIO_REG_OUT_FUNC2 0x34 ++#define QCA955X_GPIO_REG_OUT_FUNC3 0x38 ++#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c ++#define QCA955X_GPIO_REG_OUT_FUNC5 0x40 ++#define QCA955X_GPIO_REG_FUNC 0x6c ++ #define AR71XX_GPIO_COUNT 16 -@@ -560,4 +663,153 @@ + #define AR7240_GPIO_COUNT 18 + #define AR7241_GPIO_COUNT 20 +@@ -560,4 +671,235 @@ #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 @@ -288,6 +298,71 @@ +#define AR934X_GPIO_OUT_EXT_LNA0 46 +#define AR934X_GPIO_OUT_EXT_LNA1 47 + ++#define QCA955X_GPIO_FUNC_CLK_OBS7_EN BIT(9) ++#define QCA955X_GPIO_FUNC_CLK_OBS6_EN BIT(8) ++#define QCA955X_GPIO_FUNC_CLK_OBS5_EN BIT(7) ++#define QCA955X_GPIO_FUNC_CLK_OBS4_EN BIT(6) ++#define QCA955X_GPIO_FUNC_CLK_OBS3_EN BIT(5) ++#define QCA955X_GPIO_FUNC_CLK_OBS2_EN BIT(4) ++#define QCA955X_GPIO_FUNC_CLK_OBS1_EN BIT(3) ++#define QCA955X_GPIO_FUNC_JTAG_DISABLE BIT(1) ++ ++#define QCA955X_GPIO_OUT_GPIO 0 ++#define QCA955X_MII_EXT_MDI 1 ++#define QCA955X_SLIC_DATA_OUT 3 ++#define QCA955X_SLIC_PCM_FS 4 ++#define QCA955X_SLIC_PCM_CLK 5 ++#define QCA955X_SPI_CLK 8 ++#define QCA955X_SPI_CS_0 9 ++#define QCA955X_SPI_CS_1 10 ++#define QCA955X_SPI_CS_2 11 ++#define QCA955X_SPI_MISO 12 ++#define QCA955X_I2S_CLK 13 ++#define QCA955X_I2S_WS 14 ++#define QCA955X_I2S_SD 15 ++#define QCA955X_I2S_MCK 16 ++#define QCA955X_SPDIF_OUT 17 ++#define QCA955X_UART1_TD 18 ++#define QCA955X_UART1_RTS 19 ++#define QCA955X_UART1_RD 20 ++#define QCA955X_UART1_CTS 21 ++#define QCA955X_UART0_SOUT 22 ++#define QCA955X_SPDIF2_OUT 23 ++#define QCA955X_LED_SGMII_SPEED0 24 ++#define QCA955X_LED_SGMII_SPEED1 25 ++#define QCA955X_LED_SGMII_DUPLEX 26 ++#define QCA955X_LED_SGMII_LINK_UP 27 ++#define QCA955X_SGMII_SPEED0_INVERT 28 ++#define QCA955X_SGMII_SPEED1_INVERT 29 ++#define QCA955X_SGMII_DUPLEX_INVERT 30 ++#define QCA955X_SGMII_LINK_UP_INVERT 31 ++#define QCA955X_GE1_MII_MDO 32 ++#define QCA955X_GE1_MII_MDC 33 ++#define QCA955X_SWCOM2 38 ++#define QCA955X_SWCOM3 39 ++#define QCA955X_MAC2_GPIO 40 ++#define QCA955X_MAC3_GPIO 41 ++#define QCA955X_ATT_LED 42 ++#define QCA955X_PWR_LED 43 ++#define QCA955X_TX_FRAME 44 ++#define QCA955X_RX_CLEAR_EXTERNAL 45 ++#define QCA955X_LED_NETWORK_EN 46 ++#define QCA955X_LED_POWER_EN 47 ++#define QCA955X_WMAC_GLUE_WOW 68 ++#define QCA955X_RX_CLEAR_EXTENSION 70 ++#define QCA955X_CP_NAND_CS1 73 ++#define QCA955X_USB_SUSPEND 74 ++#define QCA955X_ETH_TX_ERR 75 ++#define QCA955X_DDR_DQ_OE 76 ++#define QCA955X_CLKREQ_N_EP 77 ++#define QCA955X_CLKREQ_N_RC 78 ++#define QCA955X_CLK_OBS0 79 ++#define QCA955X_CLK_OBS1 80 ++#define QCA955X_CLK_OBS2 81 ++#define QCA955X_CLK_OBS3 82 ++#define QCA955X_CLK_OBS4 83 ++#define QCA955X_CLK_OBS5 84 ++ +/* + * MII_CTRL block + */ @@ -358,6 +433,23 @@ +#define QCA955X_GMAC_REG_ETH_CFG 0x00 + +#define QCA955X_ETH_CFG_RGMII_EN BIT(0) ++#define QCA955X_ETH_CFG_MII_GE0 BIT(1) ++#define QCA955X_ETH_CFG_GMII_GE0 BIT(2) ++#define QCA955X_ETH_CFG_MII_GE0_MASTER BIT(3) ++#define QCA955X_ETH_CFG_MII_GE0_SLAVE BIT(4) ++#define QCA955X_ETH_CFG_GE0_ERR_EN BIT(5) +#define QCA955X_ETH_CFG_GE0_SGMII BIT(6) ++#define QCA955X_ETH_CFG_RMII_GE0 BIT(10) ++#define QCA955X_ETH_CFG_MII_CNTL_SPEED BIT(11) ++#define QCA955X_ETH_CFG_RMII_GE0_MASTER BIT(12) ++#define QCA955X_ETH_CFG_RXD_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_RXD_DELAY_SHIFT 14 ++#define QCA955X_ETH_CFG_RDV_DELAY BIT(16) ++#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 ++#define QCA955X_ETH_CFG_TXD_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_TXD_DELAY_SHIFT 18 ++#define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 + #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch new file mode 100644 index 0000000000..a36b8c319f --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -146,7 +146,8 @@ static void __iomem *ath79_gpio_get_func + if (soc_is_ar71xx() || + soc_is_ar724x() || + soc_is_ar913x() || +- soc_is_ar933x()) ++ soc_is_ar933x() || ++ soc_is_qca955x()) + reg = AR71XX_GPIO_REG_FUNC; + else if (soc_is_ar934x() || + soc_is_qca953x() || soc_is_qca956x()) +@@ -185,15 +186,27 @@ void __init ath79_gpio_output_select(uns + { + void __iomem *base = ath79_gpio_base; + unsigned long flags; +- unsigned int reg; ++ unsigned int reg, reg_base; ++ unsigned long gpio_count; + u32 t, s; + +- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x()); ++ if (soc_is_ar934x()) { ++ gpio_count = AR934X_GPIO_COUNT; ++ reg_base = AR934X_GPIO_REG_OUT_FUNC0; ++ } else if (soc_is_qca953x()) { ++ gpio_count = QCA953X_GPIO_COUNT; ++ reg_base = QCA953X_GPIO_REG_OUT_FUNC0; ++ } else if (soc_is_qca955x()) { ++ gpio_count = QCA955X_GPIO_COUNT; ++ reg_base = QCA955X_GPIO_REG_OUT_FUNC0; ++ } else { ++ BUG(); ++ } + +- if (gpio >= AR934X_GPIO_COUNT) ++ if (gpio >= gpio_count) + return; + +- reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); ++ reg = reg_base + 4 * (gpio / 4); + s = 8 * (gpio % 4); + + spin_lock_irqsave(&ath79_gpio_lock, flags); diff --git a/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-mr1750-support.patch b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-mr1750-support.patch new file mode 100644 index 0000000000..d802a12d60 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-mr1750-support.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -763,6 +763,16 @@ config ATH79_MACH_CAP4200AG + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + ++config ATH79_MACH_MR1750 ++ bool "OpenMesh MR1750 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ + config ATH79_MACH_MR900 + bool "OpenMesh MR900 board support" + select SOC_QCA955X +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -80,6 +80,7 @@ obj-$(CONFIG_ATH79_MACH_HORNET_UB) += ma + obj-$(CONFIG_ATH79_MACH_MC_MAC1200R) += mach-mc-mac1200r.o + obj-$(CONFIG_ATH79_MACH_MR12) += mach-mr12.o + obj-$(CONFIG_ATH79_MACH_MR16) += mach-mr16.o ++obj-$(CONFIG_ATH79_MACH_MR1750) += mach-mr1750.o + obj-$(CONFIG_ATH79_MACH_MR600) += mach-mr600.o + obj-$(CONFIG_ATH79_MACH_MR900) += mach-mr900.o + obj-$(CONFIG_ATH79_MACH_MYNET_N600) += mach-mynet-n600.o +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -69,6 +69,7 @@ enum ath79_mach_type { + ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ + ATH79_MACH_MR12, /* Cisco Meraki MR12 */ + ATH79_MACH_MR16, /* Cisco Meraki MR16 */ ++ ATH79_MACH_MR1750, /* OpenMesh MR1750 */ + ATH79_MACH_MR600V2, /* OpenMesh MR600v2 */ + ATH79_MACH_MR600, /* OpenMesh MR600 */ + ATH79_MACH_MR900, /* OpenMesh MR900 */ diff --git a/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch new file mode 100644 index 0000000000..4accd030be --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/815-MIPS-ath79-add-om5pac-support.patch @@ -0,0 +1,38 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -799,6 +799,15 @@ config ATH79_MACH_OM5P + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + ++config ATH79_MACH_OM5P_AC ++ bool "OpenMesh OM5P-AC board support" ++ select SOC_QCA955X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ + config ATH79_MACH_ONION_OMEGA + bool "ONION OMEGA support" + select SOC_AR933X +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -100,6 +100,7 @@ obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += m + obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o + obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o + obj-$(CONFIG_ATH79_MACH_OM5P) += mach-om5p.o ++obj-$(CONFIG_ATH79_MACH_OM5P_AC) += mach-om5pac.o + obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o + obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o + obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -95,6 +95,7 @@ enum ath79_mach_type { + ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */ + ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */ + ATH79_MACH_OM2P, /* OpenMesh OM2P */ ++ ATH79_MACH_OM5P_AC, /* OpenMesh OM5P-AC */ + ATH79_MACH_OM5P_AN, /* OpenMesh OM5P-AN */ + ATH79_MACH_OM5P, /* OpenMesh OM5P */ + ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */ diff --git a/target/linux/ar71xx/patches-3.18/816-MIPS-ath79-add-om5pacv-support.patch b/target/linux/ar71xx/patches-3.18/816-MIPS-ath79-add-om5pacv-support.patch new file mode 100644 index 0000000000..fbbf171599 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/816-MIPS-ath79-add-om5pacv-support.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -808,6 +808,16 @@ config ATH79_MACH_OM5P_AC + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + ++config ATH79_MACH_OM5P_ACv2 ++ bool "OpenMesh OM5P-ACv2 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ + config ATH79_MACH_ONION_OMEGA + bool "ONION OMEGA support" + select SOC_AR933X +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -101,6 +101,7 @@ obj-$(CONFIG_ATH79_MACH_NBG460N) += mach + obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o + obj-$(CONFIG_ATH79_MACH_OM5P) += mach-om5p.o + obj-$(CONFIG_ATH79_MACH_OM5P_AC) += mach-om5pac.o ++obj-$(CONFIG_ATH79_MACH_OM5P_ACv2) += mach-om5pacv2.o + obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o + obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o + obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -96,6 +96,7 @@ enum ath79_mach_type { + ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */ + ATH79_MACH_OM2P, /* OpenMesh OM2P */ + ATH79_MACH_OM5P_AC, /* OpenMesh OM5P-AC */ ++ ATH79_MACH_OM5P_ACv2, /* OpenMesh OM5P-ACv2 */ + ATH79_MACH_OM5P_AN, /* OpenMesh OM5P-AN */ + ATH79_MACH_OM5P, /* OpenMesh OM5P */ + ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */ diff --git a/target/linux/ar71xx/patches-3.18/817-MIPS-ath79-add-om2phsv3-support.patch b/target/linux/ar71xx/patches-3.18/817-MIPS-ath79-add-om2phsv3-support.patch new file mode 100644 index 0000000000..7305b2e928 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/817-MIPS-ath79-add-om2phsv3-support.patch @@ -0,0 +1,10 @@ +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -88,6 +88,7 @@ enum ath79_mach_type { + ATH79_MACH_NBG460N, /* Zyxel NBG460N/550N/550NH */ + ATH79_MACH_NBG6716, /* Zyxel NBG6716 */ + ATH79_MACH_OM2P_HSv2, /* OpenMesh OM2P-HSv2 */ ++ ATH79_MACH_OM2P_HSv3, /* OpenMesh OM2P-HSv3 */ + ATH79_MACH_OM2P_HS, /* OpenMesh OM2P-HS */ + ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */ + ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */ diff --git a/target/linux/ar71xx/patches-3.18/818-MIPS-ath79-add-mr1750v2-support.patch b/target/linux/ar71xx/patches-3.18/818-MIPS-ath79-add-mr1750v2-support.patch new file mode 100644 index 0000000000..de732ec5f7 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/818-MIPS-ath79-add-mr1750v2-support.patch @@ -0,0 +1,10 @@ +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -76,6 +76,7 @@ enum ath79_mach_type { + ATH79_MACH_MR12, /* Cisco Meraki MR12 */ + ATH79_MACH_MR16, /* Cisco Meraki MR16 */ + ATH79_MACH_MR1750, /* OpenMesh MR1750 */ ++ ATH79_MACH_MR1750V2, /* OpenMesh MR1750v2 */ + ATH79_MACH_MR600V2, /* OpenMesh MR600v2 */ + ATH79_MACH_MR600, /* OpenMesh MR600 */ + ATH79_MACH_MR900, /* OpenMesh MR900 */ |