diff options
| author | Piotr Dymacz <pepe2k@gmail.com> | 2016-12-02 22:42:41 +0100 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2016-12-12 09:57:40 +0100 |
| commit | c198ca682c187e61730119134e1dde75da2e7a16 (patch) | |
| tree | 79a8603079c335003ca982a2fbaaece0a113507a /target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt | |
| parent | 6ae71708c9ced26961f73286d794e1aafedd6c52 (diff) | |
| download | upstream-c198ca682c187e61730119134e1dde75da2e7a16.tar.gz upstream-c198ca682c187e61730119134e1dde75da2e7a16.tar.bz2 upstream-c198ca682c187e61730119134e1dde75da2e7a16.zip | |
ar71xx: add support for YunCore SR3200 and XD3200
YunCore SR3200 is a dual-band AC1200 router, based on Qualcomm/Atheros
QCA9563+QCA9882+QCA8337N.
YunCore XD3200 (FCC ID: 2ADUG-XD3200) is a dual-band AC1200 ceiling mount
AP with PoE support, based on Qualcomm/Atheros QCA9563+QCA9882+QCA8334.
Common specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB or RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz, with ext. PA (SKY65174-21), up to 30 dBm
- 2T2R 5 GHz, with ext. PA (SKY85405-11) and LNA (SKY85601-11), up to 30 dBm
SR3200 specification:
- 5x 10/100/1000 Mbps Ethernet
- 6x ext. RP-SMA antennas (actually, only 4 are connected with radio chips)
- 3x LED (+ 5x LED in RJ45 sockets), 1x button
- UART header on PCB
XD3200 specification:
- 2x 10/100/1000 Mbps Ethernet, with 802.3at PoE support (WAN port)
- 4x internal antennas
- 3 sets of LEDs on external PCB (+ 2x LED near RJ45 sockets), 1x button
- UART and JTAG (custom 6-pin, 2 mm pitch) headers on PCB
LED for 5 GHz WLAN is currently not supported on both devices as it is
connected directly to the QCA9882 radio chip.
Flash instruction under vendor firmware, using telnet/SSH:
1. If your firmware does not have root password, go to point 5
2. Connect PC with 192.168.1.x address to LAN or WAN port
3. Power up device, enter failsafe mode with button (no LED indicator!)
4. Change root password and reboot (mount_root, passwd ..., reboot -f)
5. Upload lede-ar71xx-...-sysupgrade.bin to /tmp using SCP
6. Connect PC with 192.168.188.x address to LAN port, SSH to 192.168.188.253
7. Invoke:
- cd /tmp
- fw_setenv bootcmd "bootm 0x9fe80000 || bootm 0x9f050000"
- mtd -e firmware -r write lede-ar71xx-...-sysupgrade.bin firmware
Flash instruction under U-Boot, using UART:
1. tftp 0x80060000 lede-ar71xx-...-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9fe80000 || bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index f1bfcb80a4..9e1b50e262 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -280,6 +280,17 @@ config ATH79_MACH_SOM9331 select ATH79_DEV_USB select ATH79_DEV_WMAC +config ATH79_MACH_SR3200 + bool "YunCore SR3200 support" + select SOC_QCA956X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_BHR_4GRV2 bool "Buffalo BHR-4GRV2 board support" select SOC_QCA955X @@ -425,6 +436,16 @@ config ATH79_MACH_WPJ558 select ATH79_DEV_USB select ATH79_DEV_WMAC +config ATH79_MACH_XD3200 + bool "YunCore XD3200 support" + select SOC_QCA956X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + config ATH79_MACH_DGL_5500_A1 bool "D-Link DGL-5500 A1 support" select SOC_QCA955X |