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| author | Gabor Juhos <juhosg@openwrt.org> | 2008-05-12 11:56:21 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2008-05-12 11:56:21 +0000 |
| commit | b1bb4991c94864405badd1b78ff408e652136ac6 (patch) | |
| tree | 91ee401478304793f2ce9216cec716c1d088ab8c /target/linux/ar7/files/arch | |
| parent | ffbd7e53b77d1cc3a0108358721768008124542e (diff) | |
| download | upstream-b1bb4991c94864405badd1b78ff408e652136ac6.tar.gz upstream-b1bb4991c94864405badd1b78ff408e652136ac6.tar.bz2 upstream-b1bb4991c94864405badd1b78ff408e652136ac6.zip | |
[ar7] use the righ value in the DSP clock calculation
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11123 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar7/files/arch')
| -rw-r--r-- | target/linux/ar7/files/arch/mips/ar7/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ar7/files/arch/mips/ar7/clock.c b/target/linux/ar7/files/arch/mips/ar7/clock.c index ff4b5816e7..25e6b7326c 100644 --- a/target/linux/ar7/files/arch/mips/ar7/clock.c +++ b/target/linux/ar7/files/arch/mips/ar7/clock.c @@ -437,7 +437,7 @@ static void __init tnetd7200_init_clocks(void) printk(KERN_INFO "Clocks: Sync 1:1 mode\n"); printk(KERN_INFO "Clocks: Setting DSP clock\n"); - calculate(dsp_base, TNETD7200_DEF_CPU_CLK, &dsp_prediv, + calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, &dsp_postdiv, &dsp_mul); ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; |