[adm5120] add initial support for hardware accelerated byte swapping

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7708 3c298f89-4303-0410-b956-a3cf2f4a3e73

5 files changed, 94 insertions, 14 deletions

diff --git a/target/linux/adm5120-2.6/config/default b/target/linux/adm5120-2.6/config/default
index 0ea8e56e8b..569f66c9b8 100644
--- a/target/linux/adm5120-2.6/config/default
+++ b/target/linux/adm5120-2.6/config/default
@@ -2,6 +2,7 @@ CONFIG_32BIT=y
 # CONFIG_64BIT is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
 CONFIG_ADM5120_GPIO=y
+CONFIG_ADM5120_HARDWARE_SWAB=y
 CONFIG_ADM5120_NR_UARTS=2
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/Kconfig b/target/linux/adm5120-2.6/files/arch/mips/adm5120/Kconfig
new file mode 100644
index 0000000000..1b73a370b4
--- /dev/null
+++ b/target/linux/adm5120-2.6/files/arch/mips/adm5120/Kconfig
@@ -0,0 +1,16 @@
+if MIPS_ADM5120
+
+menu "ADM5120 Implementation Options"
+
+config PCI_ADM5120
+	bool "Enable PCI support"
+	select PCI
+	default y
+
+config ADM5120_HARDWARE_SWAB
+	bool "Enable hardware accelerated byte-swapping"
+	default y
+
+endmenu
+
+endif
diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c b/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c
index ab96b0f6c9..fea52ffca0 100644
--- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c
+++ b/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c
@@ -18,6 +18,7 @@
 
 #include <asm/bootinfo.h>
 #include <asm/addrspace.h>
+#include <asm/byteorder.h>
 
 #include <asm/mach-adm5120/adm5120_defs.h>
 #include <asm/mach-adm5120/adm5120_switch.h>
@@ -775,7 +776,7 @@ static void __init adm5120_detect_memsize(void)
 	u32	size, maxsize;
 	volatile u8	*p,*r;
 	u8	t;
-	
+
 	memctrl = SWITCH_READ(SWITCH_REG_MEMCTRL);
 	switch (memctrl & MEMCTRL_SDRS_MASK) {
 	case MEMCTRL_SDRS_4M:
@@ -791,7 +792,7 @@ static void __init adm5120_detect_memsize(void)
 		maxsize = 64 << 20;
 		break;
 	}
-	
+
 	/* FIXME: need to disable buffers for both SDRAM bank? */
 
 	mem_dbg("checking for %ldMB chip\n",maxsize >> 20);
@@ -800,7 +801,7 @@ static void __init adm5120_detect_memsize(void)
 	p = (volatile u8 *)KSEG1ADDR(0);
 	t = *p;
 	for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
-#if 1	
+#if 1
 		r = (p+size);
 		*p = 0x55;
 		mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, *r);
@@ -818,7 +819,7 @@ static void __init adm5120_detect_memsize(void)
 		mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, p[size]);
 		if (p[size] != 0x55)
 			continue;
-			
+
 		p[0] = 0xAA;
 		mem_dbg("2nd pattern at 0x%lx is 0x%02x\n", size, p[size]);
 		if (p[size] != 0xAA)
@@ -836,13 +837,13 @@ static void __init adm5120_detect_memsize(void)
 	if (size == (32 << 20))
 		/* if bank size is 32MB, 2nd bank is not supported */
 		goto out;
-		
+
 	if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
 		/* if 2nd bank is not enabled, we are done */
 		goto out;
-		
+
 	/*
-	 * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip 
+	 * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
 	 * are missing.
 	 */
 	mem_dbg("checking second bank\n");
@@ -851,11 +852,11 @@ static void __init adm5120_detect_memsize(void)
 	*p = 0x55;
 	if (*p != 0x55)
 		goto out;
-		
+
 	*p = 0xAA;
 	if (*p != 0xAA)
 		goto out;
-		
+
 	*p = t;
 	if (maxsize != size) {
 		/* adjusting MECTRL register */
@@ -897,11 +898,31 @@ void __init adm5120_info_show(void)
 	printk("Memory size   : %ldMB\n", adm5120_memsize >> 20);
 }
 
+void __init adm5120_swab_test(void)
+{
+#if CONFIG_ADM5120_HARDWARE_SWAB
+	u32	t1,t2;
+
+	t1 = 0x1234;
+	t2 = swab16(t1);
+	printk("hardware swab16 test %s, data:0x%04X, result:0x%04X\n",
+		(t2 == 0x3412) ? "passed" :"failed", t1, t2);
+
+	t1 = 0x12345678;
+	t2 = swab32(t1);
+	printk("hardware swab32 test %s, data:0x%08X, result:0x%08X\n",
+		(t2 == 0x78563412) ? "passed" :"failed", t1, t2);
+
+#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
+}
+
 void __init adm5120_info_init(void)
 {
+
 	adm5120_detect_cpuinfo();
 	adm5120_detect_memsize();
 	adm5120_detect_board();
 
 	adm5120_info_show();
+	adm5120_swab_test();
 }
diff --git a/target/linux/adm5120-2.6/patches/001-adm5120.patch b/target/linux/adm5120-2.6/patches/001-adm5120.patch
index 8cc60678e0..c14dde345a 100644
--- a/target/linux/adm5120-2.6/patches/001-adm5120.patch
+++ b/target/linux/adm5120-2.6/patches/001-adm5120.patch
@@ -2,7 +2,7 @@ Index: linux-2.6.21.1/arch/mips/Kconfig
 ===================================================================
 --- linux-2.6.21.1.orig/arch/mips/Kconfig
 +++ linux-2.6.21.1/arch/mips/Kconfig
-@@ -16,6 +16,21 @@ choice
+@@ -16,6 +16,17 @@ choice
  	prompt "System type"
  	default SGI_IP22
  
@@ -17,13 +17,17 @@ Index: linux-2.6.21.1/arch/mips/Kconfig
 +	select SYS_SUPPORTS_32BIT_KERNEL
 +	select GENERIC_GPIO
 +
-+config PCI_ADM5120
-+	bool "Add PCI control support for ADM5120"
-+	depends on MIPS_ADM5120 && PCI
-+
  config MIPS_MTX1
  	bool "4G Systems MTX-1 board"
  	select DMA_NONCOHERENT
+@@ -766,6 +775,7 @@
+ 
+ endchoice
+ 
++source "arch/mips/adm5120/Kconfig"
+ source "arch/mips/ddb5xxx/Kconfig"
+ source "arch/mips/gt64120/ev64120/Kconfig"
+ source "arch/mips/jazz/Kconfig"
 Index: linux-2.6.21.1/arch/mips/Makefile
 ===================================================================
 --- linux-2.6.21.1.orig/arch/mips/Makefile
diff --git a/target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch b/target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch
new file mode 100644
index 0000000000..a71dba2d03
--- /dev/null
+++ b/target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch
@@ -0,0 +1,38 @@
+--- linux-2.6.19.2/include/asm-mips/byteorder.h	2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.new/include/asm-mips/byteorder.h	2007-05-16 21:14:47.000000000 +0200
+@@ -58,6 +58,35 @@
+ 
+ #endif /* CONFIG_CPU_MIPSR2 */
+ 
++#ifdef CONFIG_ADM5120_HARDWARE_SWAB
++
++static __inline__ __attribute_const__ __u16 ___adm5120__swab16(__u16 x)
++{
++	__asm__ (
++	"	sw	%2, 0xC8(%1)			\n"
++	"	lhu	%0, 0xCC(%1)			\n"
++	: "=r" (x)
++	: "r" (0xB2000000), "r" (x));
++
++	return x;
++}
++
++static __inline__ __attribute_const__ __u32 ___adm5120__swab32(__u32 x)
++{
++	__asm__ (
++	"	sw	%2, 0xC8(%1)			\n"
++	"	lw	%0, 0xCC(%1)			\n"
++	: "=r" (x)
++	: "r" (0xB2000000), "r" (x));
++
++	return x;
++}
++
++#define __arch__swab16(x)	___adm5120__swab16(x)
++#define __arch__swab32(x)	___adm5120__swab32(x)
++
++#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
++
+ #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+ #  define __BYTEORDER_HAS_U64__
+ #  define __SWAB_64_THRU_32__