ath9k: add some more ani fixes

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32159 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 114 insertions, 0 deletions

diff --git a/package/mac80211/patches/576-ath9k_ani_remove_mib_int.patch b/package/mac80211/patches/576-ath9k_ani_remove_mib_int.patch
new file mode 100644
index 0000000000..d071e0ca57
--- /dev/null
+++ b/package/mac80211/patches/576-ath9k_ani_remove_mib_int.patch
@@ -0,0 +1,114 @@
+--- a/drivers/net/wireless/ath/ath9k/ani.c
++++ b/drivers/net/wireless/ath/ath9k/ani.c
+@@ -490,46 +490,6 @@ void ath9k_hw_disable_mib_counters(struc
+ }
+ EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
+ 
+-/*
+- * Process a MIB interrupt.  We may potentially be invoked because
+- * any of the MIB counters overflow/trigger so don't assume we're
+- * here because a PHY error counter triggered.
+- */
+-void ath9k_hw_proc_mib_event(struct ath_hw *ah)
+-{
+-	u32 phyCnt1, phyCnt2;
+-
+-	/* Reset these counters regardless */
+-	REG_WRITE(ah, AR_FILT_OFDM, 0);
+-	REG_WRITE(ah, AR_FILT_CCK, 0);
+-	if (!(REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING))
+-		REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);
+-
+-	/* Clear the mib counters and save them in the stats */
+-	ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
+-
+-	if (!DO_ANI(ah)) {
+-		/*
+-		 * We must always clear the interrupt cause by
+-		 * resetting the phy error regs.
+-		 */
+-		REG_WRITE(ah, AR_PHY_ERR_1, 0);
+-		REG_WRITE(ah, AR_PHY_ERR_2, 0);
+-		return;
+-	}
+-
+-	/* NB: these are not reset-on-read */
+-	phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
+-	phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
+-	if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
+-	    ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
+-
+-		/* NB: always restart to insure the h/w counters are reset */
+-		ath9k_ani_restart(ah);
+-	}
+-}
+-EXPORT_SYMBOL(ath9k_hw_proc_mib_event);
+-
+ void ath9k_hw_ani_setup(struct ath_hw *ah)
+ {
+ 	int i;
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -1023,7 +1023,6 @@ void ar9003_hw_attach_ops(struct ath_hw 
+ void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan);
+ 
+ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning);
+-void ath9k_hw_proc_mib_event(struct ath_hw *ah);
+ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan);
+ 
+ #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -827,24 +827,6 @@ irqreturn_t ath_isr(int irq, void *dev)
+ 		ath9k_hw_set_interrupts(ah);
+ 	}
+ 
+-	if (status & ATH9K_INT_MIB) {
+-		/*
+-		 * Disable interrupts until we service the MIB
+-		 * interrupt; otherwise it will continue to
+-		 * fire.
+-		 */
+-		ath9k_hw_disable_interrupts(ah);
+-		/*
+-		 * Let the hal handle the event. We assume
+-		 * it will clear whatever condition caused
+-		 * the interrupt.
+-		 */
+-		spin_lock(&common->cc_lock);
+-		ath9k_hw_proc_mib_event(ah);
+-		spin_unlock(&common->cc_lock);
+-		ath9k_hw_enable_interrupts(ah);
+-	}
+-
+ 	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
+ 		if (status & ATH9K_INT_TIM_TIMER) {
+ 			if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
+@@ -1347,14 +1329,10 @@ static void ath9k_calculate_summary_stat
+ 	/*
+ 	 * Enable MIB interrupts when there are hardware phy counters.
+ 	 */
+-	if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
+-		if (ah->config.enable_ani)
+-			ah->imask |= ATH9K_INT_MIB;
++	if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
+ 		ah->imask |= ATH9K_INT_TSFOOR;
+-	} else {
+-		ah->imask &= ~ATH9K_INT_MIB;
++	else
+ 		ah->imask &= ~ATH9K_INT_TSFOOR;
+-	}
+ 
+ 	ath9k_hw_set_interrupts(ah);
+ 
+--- a/drivers/net/wireless/ath/ath9k/debug.c
++++ b/drivers/net/wireless/ath/ath9k/debug.c
+@@ -348,8 +348,6 @@ void ath_debug_stat_interrupt(struct ath
+ 		sc->debug.stats.istats.txok++;
+ 	if (status & ATH9K_INT_TXURN)
+ 		sc->debug.stats.istats.txurn++;
+-	if (status & ATH9K_INT_MIB)
+-		sc->debug.stats.istats.mib++;
+ 	if (status & ATH9K_INT_RXPHY)
+ 		sc->debug.stats.istats.rxphyerr++;
+ 	if (status & ATH9K_INT_RXKCM)