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| author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-06-06 19:06:29 +0200 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-06-06 19:06:29 +0200 |
| commit | 482e65a16d2c49b5547b032caa060f423a3cb4a5 (patch) | |
| tree | 659f4c32ec45b747c97927c367d8f9d9db3ae66e /package/boot/uboot-kirkwood/patches/701-phy-mv88e61xx-add-support-for-RGMII-TX-RX-delay.patch | |
| parent | 03d66d6b8fa6660a89648847a69d691a9a82d5b4 (diff) | |
| download | upstream-482e65a16d2c49b5547b032caa060f423a3cb4a5.tar.gz upstream-482e65a16d2c49b5547b032caa060f423a3cb4a5.tar.bz2 upstream-482e65a16d2c49b5547b032caa060f423a3cb4a5.zip | |
uboot-kirkwood: refresh patches
This is only cosmetic, but the next one adding a patch here would
have to do it anyway, and thus will get a smaller diff for review
now.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'package/boot/uboot-kirkwood/patches/701-phy-mv88e61xx-add-support-for-RGMII-TX-RX-delay.patch')
| -rw-r--r-- | package/boot/uboot-kirkwood/patches/701-phy-mv88e61xx-add-support-for-RGMII-TX-RX-delay.patch | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/package/boot/uboot-kirkwood/patches/701-phy-mv88e61xx-add-support-for-RGMII-TX-RX-delay.patch b/package/boot/uboot-kirkwood/patches/701-phy-mv88e61xx-add-support-for-RGMII-TX-RX-delay.patch index 6e358857b7..66550f91fa 100644 --- a/package/boot/uboot-kirkwood/patches/701-phy-mv88e61xx-add-support-for-RGMII-TX-RX-delay.patch +++ b/package/boot/uboot-kirkwood/patches/701-phy-mv88e61xx-add-support-for-RGMII-TX-RX-delay.patch @@ -17,8 +17,6 @@ Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> drivers/net/phy/mv88e61xx.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) -diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c -index 5aff7ed397..889327639d 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -94,6 +94,8 @@ @@ -30,7 +28,7 @@ index 5aff7ed397..889327639d 100644 #define PORT_REG_PHYS_CTRL_PCS_AN_EN BIT(10) #define PORT_REG_PHYS_CTRL_PCS_AN_RST BIT(9) #define PORT_REG_PHYS_CTRL_FC_VALUE BIT(7) -@@ -747,9 +749,16 @@ static int mv88e61xx_fixed_port_setup(struct phy_device *phydev, u8 port) +@@ -747,9 +749,16 @@ static int mv88e61xx_fixed_port_setup(st PORT_REG_PHYS_CTRL_SPD1000; } @@ -48,6 +46,3 @@ index 5aff7ed397..889327639d 100644 return mv88e61xx_port_write(phydev, port, PORT_REG_PHYS_CTRL, val); --- -2.20.1 - |