imx6: kernel: add GW5520 support

The GW5520 is a small form-factor single-board computer with the following
features:
 * 70x100mm form-factor
 * IMX6DL 800MHz SoC (IMX6Q optional)
 * 512MB 32bit DDR3 SDRAM (up to 2GB optional)
 * 256MB NAND FLASH (up to 2GB optional)
 * Gateworks System Controller
 * 2x front-panel Intel i210 GbE adapters with passive PoE support
 * 2x MiniPCIe sockets with USB support
 * 2x front-panel USB
 * 1x rear-panel full-size HDMI connector
 * 1x front-panel bi-color user LED
 * 1x front-panel user pushbutton
 * 1x rear-panel barrel jack for power
 * 1x Application connector with:
  * 2x TTL level UARTs
  * 10x TTL level Digital IO

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

SVN-Revision: 42148

8 files changed, 441 insertions, 2 deletions

diff --git a/target/linux/imx6/base-files/etc/uci-defaults/02_network b/target/linux/imx6/base-files/etc/uci-defaults/02_network
index 64e060a8e0..0e60e22eb7 100644
--- a/target/linux/imx6/base-files/etc/uci-defaults/02_network
+++ b/target/linux/imx6/base-files/etc/uci-defaults/02_network
@@ -20,7 +20,8 @@ case "$board" in
 	ucidef_set_interface_lan 'eth0'
 	;;
 "gw53xx" |\
-"gw54xx")
+"gw54xx" |\
+"gw552x")
 	ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
 	;;
 "wandboard")
diff --git a/target/linux/imx6/base-files/lib/imx6.sh b/target/linux/imx6/base-files/lib/imx6.sh
index 0318fb4485..360ec58795 100755
--- a/target/linux/imx6/base-files/lib/imx6.sh
+++ b/target/linux/imx6/base-files/lib/imx6.sh
@@ -34,6 +34,11 @@ imx6_board_detect() {
 		name="gw54xx"
 		;;
 
+	"Gateworks Ventana i.MX6 DualLite/Solo GW552X" |\
+	"Gateworks Ventana i.MX6 Dual/Quad GW552X")
+		name="gw552x"
+		;;
+
 	"Wandboard i.MX6 Dual Lite Board")
 		name="wandboard"
 		;;
diff --git a/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6dl-gw552x.dts b/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000000..3af6f1bdce
--- /dev/null
+++ b/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+	model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+	compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6q-gw552x.dts b/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000000..ac9d5a7ef1
--- /dev/null
+++ b/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+	model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+	compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+	status = "okay";
+};
diff --git a/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000000..dc9ca33993
--- /dev/null
+++ b/target/linux/imx6/files-3.14/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,313 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+	/* these are used by bootloader for disabling nodes */
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		led2 = &led2;
+		nand = &gpmi;
+		usb0 = &usbh1;
+	};
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0: user1 {
+			label = "user1";
+			gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
+			default-state = "on";
+			linux,default-trigger = "heartbeat";
+		};
+
+		led1: user2 {
+			label = "user2";
+			gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
+			default-state = "off";
+		};
+
+		led2: user3 {
+			label = "user3";
+			gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
+			default-state = "off";
+		};
+	};
+
+	memory {
+		reg = <0x10000000 0x20000000>;
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reg_1p0v: regulator@0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+			regulator-name = "1P0V";
+			regulator-min-microvolt = <1000000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-always-on;
+		};
+
+		reg_3p3v: regulator@2 {
+			compatible = "regulator-fixed";
+			reg = <2>;
+			regulator-name = "3P3V";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_5p0v: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "5P0V";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			regulator-always-on;
+		};
+	};
+};
+
+&gpmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpmi_nand>;
+	status = "okay";
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	eeprom1: eeprom@50 {
+		compatible = "atmel,24c02";
+		reg = <0x50>;
+		pagesize = <16>;
+	};
+
+	eeprom2: eeprom@51 {
+		compatible = "atmel,24c02";
+		reg = <0x51>;
+		pagesize = <16>;
+	};
+
+	eeprom3: eeprom@52 {
+		compatible = "atmel,24c02";
+		reg = <0x52>;
+		pagesize = <16>;
+	};
+
+	eeprom4: eeprom@53 {
+		compatible = "atmel,24c02";
+		reg = <0x53>;
+		pagesize = <16>;
+	};
+
+	gpio: pca9555@23 {
+		compatible = "nxp,pca9555";
+		reg = <0x23>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	hwmon: gsc@29 {
+		compatible = "gw,gsp";
+		reg = <0x29>;
+	};
+
+	rtc: ds1672@68 {
+		compatible = "dallas,ds1672";
+		reg = <0x68>;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+
+	pciswitch: pex8609@3f {
+		compatible = "plx,pex8609";
+		reg = <0x3f>;
+	};
+
+	pmic: ltc3676@3c {
+		compatible = "ltc,ltc3676";
+		reg = <0x3c>;
+
+		regulators {
+			sw1_reg: ltc3676__sw1 {
+				regulator-min-microvolt = <1175000>;
+				regulator-max-microvolt = <1175000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw2_reg: ltc3676__sw2 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3_reg: ltc3676__sw3 {
+				regulator-min-microvolt = <1175000>;
+				regulator-max-microvolt = <1175000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw4_reg: ltc3676__sw4 {
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo2_reg: ltc3676__ldo2 {
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo4_reg: ltc3676__ldo4 {
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+			};
+		};
+	};
+};
+
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog>;
+
+	imx6qdl-gw52xx {
+		pinctrl_hog: hoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE_RST# */
+				MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* USBHUB_RST# */
+				MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIESKT_WDIS# */
+				MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
+				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
+				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
+			 >;
+		};
+
+		pinctrl_gpmi_nand: gpminandgrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
+				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
+				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
+				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
+				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
+				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
+				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
+				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
+				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
+				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
+				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
+				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
+				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
+				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
+				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
+				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
+			>;
+		};
+
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
+				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_uart2: uart2grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
+				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
+			>;
+		};
+
+		pinctrl_uart3: uart3grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
+				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
+			>;
+		};
+
+		pinctrl_uart5: uart5grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
+			>;
+		};
+	};
+};
+
+&pcie {
+	reset-gpio = <&gpio1 29 0>;
+	status = "okay";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	status = "okay";
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	status = "okay";
+};
+
+&uart5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart5>;
+	status = "okay";
+};
+
+&usbh1 {
+	status = "okay";
+};
diff --git a/target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch b/target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch
new file mode 100644
index 0000000000..7c2d1b0936
--- /dev/null
+++ b/target/linux/imx6/patches-3.14/208-ventana-plx-allow-override-gpio-output-mask.patch
@@ -0,0 +1,58 @@
+This patch allows passing in the gpio output mask used for GPIO0-7 on the
+PLX PCIe bridge. These GPIO's are used for PERST# on the downstream ports.
+
+Allowing the kernel to override the default configuration allows for keeping
+specific devices held in reset. One important use of this is to allow
+temporarily disabling devices that may request too many resources such as
+an unprogrammed i210 device.
+
+--- a/arch/arm/mach-imx/mach-imx6q.c
++++ b/arch/arm/mach-imx/mach-imx6q.c
+@@ -84,6 +84,7 @@ static int ksz9031rn_phy_fixup(struct ph
+  * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
+  * as they are used for slots1-7 PERST#
+  */
++unsigned int ventana_plx_gpio = 0xfe;
+ static void ventana_pciesw_early_fixup(struct pci_dev *dev)
+ {
+ 	u32 dw;
+@@ -95,19 +96,25 @@ static void ventana_pciesw_early_fixup(s
+ 		return;
+ 
+ 	pci_read_config_dword(dev, 0x62c, &dw);
++	dev_info(&dev->dev, "de-asserting downstream PERST# 0x%04x\n",
++		 ventana_plx_gpio);
+ 	dw |= 0xaaa8; // GPIO1-7 outputs
+ 	pci_write_config_dword(dev, 0x62c, dw);
+-
+-	pci_read_config_dword(dev, 0x644, &dw);
+-	dw |= 0xfe;   // GPIO1-7 output high
+-	pci_write_config_dword(dev, 0x644, dw);
+-
++	pci_write_config_dword(dev, 0x644, ventana_plx_gpio);
+ 	msleep(100);
+ }
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
+ 
++static int __init setup_ventana_plx_gpio(char *str)
++{
++	get_option(&str, &ventana_plx_gpio);
++
++	return 0;
++}
++early_param("plx_gpio", setup_ventana_plx_gpio);
++
+ static int ar8031_phy_fixup(struct phy_device *dev)
+ {
+ 	u16 val;
+@@ -308,7 +315,7 @@ static void __init imx6q_init_irq(void)
+ 	irqchip_init();
+ }
+ 
+-static const char *imx6q_dt_compat[] __initconst = {
++static const char *imx6q_dt_compat[] __initdata = {
+ 	"fsl,imx6dl",
+ 	"fsl,imx6q",
+ 	NULL,
diff --git a/target/linux/imx6/patches-3.14/209-ventana-gw552x.patch b/target/linux/imx6/patches-3.14/209-ventana-gw552x.patch
new file mode 100644
index 0000000000..7c7a295cf5
--- /dev/null
+++ b/target/linux/imx6/patches-3.14/209-ventana-gw552x.patch
@@ -0,0 +1,18 @@
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -158,6 +158,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
+ 	imx6dl-gw52xx.dtb \
+ 	imx6dl-gw53xx.dtb \
+ 	imx6dl-gw54xx.dtb \
++	imx6dl-gw552x.dtb \
+ 	imx6dl-hummingboard.dtb \
+ 	imx6dl-sabreauto.dtb \
+ 	imx6dl-sabresd.dtb \
+@@ -169,6 +170,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
+ 	imx6q-gw53xx.dtb \
+ 	imx6q-gw5400-a.dtb \
+ 	imx6q-gw54xx.dtb \
++	imx6q-gw552x.dtb \
+ 	imx6q-phytec-pbab01.dtb \
+ 	imx6q-sabreauto.dtb \
+ 	imx6q-sabrelite.dtb \
diff --git a/target/linux/imx6/profiles/120-gateworks.mk b/target/linux/imx6/profiles/120-gateworks.mk
index 39c466353f..524e0c4573 100644
--- a/target/linux/imx6/profiles/120-gateworks.mk
+++ b/target/linux/imx6/profiles/120-gateworks.mk
@@ -41,10 +41,12 @@ VENTANA_DTS:= \
 	imx6dl-gw52xx \
 	imx6dl-gw53xx \
 	imx6dl-gw54xx \
+	imx6dl-gw552x \
 	imx6q-gw51xx \
 	imx6q-gw52xx \
 	imx6q-gw53xx \
 	imx6q-gw54xx \
-	imx6q-gw5400-a
+	imx6q-gw5400-a \
+	imx6q-gw552x
 
 $(eval $(call Profile,VENTANA))