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author | Gabor Juhos <juhosg@openwrt.org> | 2014-07-13 19:43:56 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2014-07-13 19:43:56 +0000 |
commit | ee3dfafaf153fece46b15400a03581f541f96500 (patch) | |
tree | 67da64f6d71f2b1864c5aa70e3365042b5fb31b6 | |
parent | a46c7d055c9fd8dfc9c2465b5611a4ff2618c625 (diff) | |
download | upstream-ee3dfafaf153fece46b15400a03581f541f96500.tar.gz upstream-ee3dfafaf153fece46b15400a03581f541f96500.tar.bz2 upstream-ee3dfafaf153fece46b15400a03581f541f96500.zip |
ar71xx: add a helper function for setting up ETH_CFG register on QCA955x
Signed-off-by: Jon Suphammer <jon@suphammer.net>
Patchwork: http://patchwork.openwrt.org/patch/5839/
[juhosg: fix coding style]
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 41623
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c | 18 | ||||
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h | 1 |
2 files changed, 19 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c index d9c40e92c4..227f16e4c2 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -769,6 +769,24 @@ void __init ath79_setup_ar934x_eth_cfg(u32 mask) iounmap(base); } +void __init ath79_setup_qca955x_eth_cfg(u32 mask) +{ + void __iomem *base; + u32 t; + + base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); + + t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); + + t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII); + + t |= mask; + + __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); + + iounmap(base); +} + static int ath79_eth_instance __initdata; void __init ath79_register_eth(unsigned int id) { diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h index ff26ec4851..e1517b7a29 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h @@ -47,5 +47,6 @@ void ath79_register_mdio(unsigned int id, u32 phy_mask); void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); void ath79_setup_ar934x_eth_cfg(u32 mask); +void ath79_setup_qca955x_eth_cfg(u32 mask); #endif /* _ATH79_DEV_ETH_H */ |