mac80211: update to wireless-testing 2011-10-05 + pending patches

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28392 3c298f89-4303-0410-b956-a3cf2f4a3e73

47 files changed, 11045 insertions, 4732 deletions

diff --git a/package/mac80211/Makefile b/package/mac80211/Makefile
index 3b438d9be4..470c722f22 100644
--- a/package/mac80211/Makefile
+++ b/package/mac80211/Makefile
@@ -10,10 +10,10 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=mac80211
 
-PKG_VERSION:=2011-09-14
+PKG_VERSION:=2011-10-05
 PKG_RELEASE:=1
 PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
-PKG_MD5SUM:=a5627e6079e8d0f0baf7045141503a3d
+PKG_MD5SUM:=328dd4c42fb5baa2d96c78009b11af7e
 
 PKG_SOURCE:=compat-wireless-$(PKG_VERSION).tar.bz2
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/compat-wireless-$(PKG_VERSION)
@@ -627,7 +627,7 @@ define KernelPackage/iwlagn
   $(call KernelPackage/mac80211/Default)
   DEPENDS:= +kmod-mac80211 @PCI_SUPPORT
   TITLE:=Intel AGN Wireless support
-  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/iwlwifi/iwlagn.$(LINUX_KMOD_SUFFIX)
+  FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/iwlwifi/iwlwifi.$(LINUX_KMOD_SUFFIX)
   AUTOLOAD:=$(call AutoLoad,60,iwlagn)
   MENU:=1
 endef
@@ -1165,7 +1165,7 @@ MAKE_OPTS:= \
 	CONFIG_LIB80211_CRYPT_WEP=$(if $(CONFIG_PACKAGE_kmod-lib80211),m) \
 	CONFIG_LIB80211_CRYPT_CCMP=$(if $(CONFIG_PACKAGE_kmod-lib80211),m) \
 	CONFIG_LIB80211_CRYPT_TKIP=$(if $(CONFIG_PACKAGE_kmod-lib80211),m) \
-	CONFIG_IWLAGN=$(if $(CONFIG_PACKAGE_kmod-iwlagn),m) \
+	CONFIG_IWLWIFI=$(if $(CONFIG_PACKAGE_kmod-iwlagn),m) \
 	CONFIG_IWLWIFI_LEGACY=$(if $(CONFIG_PACKAGE_kmod-iwl-legacy),m) \
 	CONFIG_COMPAT_IWL4965=$(if $(CONFIG_PACKAGE_kmod-iwl4965),m) \
 	CONFIG_IWL3945=$(if $(CONFIG_PACKAGE_kmod-iwl3945),m) \
diff --git a/package/mac80211/patches/001-disable_b44.patch b/package/mac80211/patches/001-disable_b44.patch
index a4008bf1ad..547a453eac 100644
--- a/package/mac80211/patches/001-disable_b44.patch
+++ b/package/mac80211/patches/001-disable_b44.patch
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -340,8 +340,8 @@ CONFIG_B43_BCMA_PIO=y
+@@ -339,8 +339,8 @@ CONFIG_B43_BCMA_PIO=y
  
  CONFIG_P54_PCI=m
  
diff --git a/package/mac80211/patches/002-disable_rfkill.patch b/package/mac80211/patches/002-disable_rfkill.patch
index 61e8b966b7..7b25a8f3be 100644
--- a/package/mac80211/patches/002-disable_rfkill.patch
+++ b/package/mac80211/patches/002-disable_rfkill.patch
@@ -9,7 +9,7 @@
  
  ifeq ($(CONFIG_MAC80211),y)
  $(error "ERROR: you have MAC80211 compiled into the kernel, CONFIG_MAC80211=y, as such you cannot replace its mac80211 driver. You need this set to CONFIG_MAC80211=m. If you are using Fedora upgrade your kernel as later version should this set as modular. For further information on Fedora see https://bugzilla.redhat.com/show_bug.cgi?id=470143. If you are using your own kernel recompile it and make mac80211 modular")
-@@ -642,10 +642,10 @@ endif #CONFIG_COMPAT_KERNEL_2_6_27
+@@ -640,10 +640,10 @@ endif #CONFIG_COMPAT_KERNEL_2_6_27
  # We need the backported rfkill module on kernel < 2.6.31.
  # In more recent kernel versions use the in kernel rfkill module.
  ifdef CONFIG_COMPAT_KERNEL_2_6_31
diff --git a/package/mac80211/patches/005-disable_ssb_build.patch b/package/mac80211/patches/005-disable_ssb_build.patch
index d5578d173f..489d731b6e 100644
--- a/package/mac80211/patches/005-disable_ssb_build.patch
+++ b/package/mac80211/patches/005-disable_ssb_build.patch
@@ -18,7 +18,7 @@
  else
  include $(KLIB_BUILD)/.config
  endif
-@@ -316,7 +315,8 @@ CONFIG_IPW2200_QOS=y
+@@ -315,7 +314,8 @@ CONFIG_IPW2200_QOS=y
  # % echo 1 > /sys/bus/pci/drivers/ipw2200/*/rtap_iface
  endif #CONFIG_WIRELESS_EXT
  
@@ -28,7 +28,7 @@
  # Sonics Silicon Backplane
  CONFIG_SSB_SPROM=y
  
-@@ -329,7 +329,7 @@ endif #CONFIG_PCMCIA
+@@ -328,7 +328,7 @@ endif #CONFIG_PCMCIA
  # CONFIG_SSB_DEBUG=y
  CONFIG_SSB_DRIVER_PCICORE=y
  CONFIG_B43_SSB=y
@@ -37,7 +37,7 @@
  
  CONFIG_BCMA=m
  CONFIG_BCMA_BLOCKIO=y
-@@ -538,7 +538,6 @@ endif #CONFIG_SPI_MASTER end of SPI driv
+@@ -537,7 +537,6 @@ endif #CONFIG_SPI_MASTER end of SPI driv
  
  ifdef CONFIG_MMC
  
diff --git a/package/mac80211/patches/006-disable_bcma_build.patch b/package/mac80211/patches/006-disable_bcma_build.patch
index 17eff65383..8a82d7ed96 100644
--- a/package/mac80211/patches/006-disable_bcma_build.patch
+++ b/package/mac80211/patches/006-disable_bcma_build.patch
@@ -10,7 +10,7 @@
  ifeq ($(CONFIG_STAGING_EXCLUDE_BUILD),)
 --- a/config.mk
 +++ b/config.mk
-@@ -331,12 +331,12 @@ CONFIG_SSB_DRIVER_PCICORE=y
+@@ -330,12 +330,12 @@ CONFIG_SSB_DRIVER_PCICORE=y
  CONFIG_B43_SSB=y
  endif #__CONFIG_SSB
  
diff --git a/package/mac80211/patches/007-remove_misc_drivers.patch b/package/mac80211/patches/007-remove_misc_drivers.patch
index 103eb7b60a..b99c561c28 100644
--- a/package/mac80211/patches/007-remove_misc_drivers.patch
+++ b/package/mac80211/patches/007-remove_misc_drivers.patch
@@ -9,7 +9,7 @@
  endif #CONFIG_STAGING
  
  # mac80211 test driver
-@@ -368,13 +368,13 @@ endif #CONFIG_CRC_ITU_T
+@@ -367,13 +367,13 @@ endif #CONFIG_CRC_ITU_T
  CONFIG_MWL8K=m
  
  # Ethernet drivers go here
@@ -28,7 +28,7 @@
  endif #CONFIG_COMPAT_KERNEL_2_6_27
  
  ifdef CONFIG_WIRELESS_EXT
-@@ -435,21 +435,21 @@ endif #CONFIG_COMPAT_KERNEL_2_6_29
+@@ -434,21 +434,21 @@ endif #CONFIG_COMPAT_KERNEL_2_6_29
  # Note: this depends on CONFIG_USB_NET_RNDIS_HOST and CONFIG_USB_NET_CDCETHER
  # it also requires new RNDIS_HOST and CDC_ETHER modules which we add
  ifdef CONFIG_COMPAT_KERNEL_2_6_29
diff --git a/package/mac80211/patches/010-no_pcmcia.patch b/package/mac80211/patches/010-no_pcmcia.patch
index d6246b782a..f6b89d86bc 100644
--- a/package/mac80211/patches/010-no_pcmcia.patch
+++ b/package/mac80211/patches/010-no_pcmcia.patch
@@ -9,7 +9,7 @@
  else
  include $(KLIB_BUILD)/.config
  endif
-@@ -248,7 +248,7 @@ CONFIG_B43=m
+@@ -247,7 +247,7 @@ CONFIG_B43=m
  CONFIG_B43_HWRNG=y
  CONFIG_B43_PCI_AUTOSELECT=y
  ifdef CONFIG_PCMCIA
diff --git a/package/mac80211/patches/011-no_sdio.patch b/package/mac80211/patches/011-no_sdio.patch
index 366488a4ad..bb6be23667 100644
--- a/package/mac80211/patches/011-no_sdio.patch
+++ b/package/mac80211/patches/011-no_sdio.patch
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -521,7 +521,7 @@ endif #CONFIG_SPI_MASTER end of SPI driv
+@@ -520,7 +520,7 @@ endif #CONFIG_SPI_MASTER end of SPI driv
  
  ifdef CONFIG_MMC
  
diff --git a/package/mac80211/patches/013-disable_b43_nphy.patch b/package/mac80211/patches/013-disable_b43_nphy.patch
index 8baaaca7c4..f9f13e21bd 100644
--- a/package/mac80211/patches/013-disable_b43_nphy.patch
+++ b/package/mac80211/patches/013-disable_b43_nphy.patch
@@ -1,11 +1,13 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -254,7 +254,7 @@ ifdef CONFIG_MAC80211_LEDS
+@@ -253,8 +253,8 @@ ifdef CONFIG_MAC80211_LEDS
  CONFIG_B43_LEDS=y
  endif #CONFIG_MAC80211_LEDS
  CONFIG_B43_PHY_LP=y
 -CONFIG_B43_PHY_N=y
+-CONFIG_B43_PHY_HT=y
 +# CONFIG_B43_PHY_N=y
- # CONFIG_B43_PHY_HT=y
++# CONFIG_B43_PHY_HT=y
  # CONFIG_B43_PHY_LCN=y
  # CONFIG_B43_FORCE_PIO=y
+ # CONFIG_B43_DEBUG=y
diff --git a/package/mac80211/patches/015-remove-rt2x00-options.patch b/package/mac80211/patches/015-remove-rt2x00-options.patch
index e449c23ef8..3bed5b2a50 100644
--- a/package/mac80211/patches/015-remove-rt2x00-options.patch
+++ b/package/mac80211/patches/015-remove-rt2x00-options.patch
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -330,7 +330,7 @@ CONFIG_RTL8180=m
+@@ -329,7 +329,7 @@ CONFIG_RTL8180=m
  
  CONFIG_ADM8211=m
  
@@ -9,7 +9,7 @@
  CONFIG_RT2400PCI=m
  CONFIG_RT2500PCI=m
  ifdef CONFIG_CRC_CCITT
-@@ -470,7 +470,7 @@ CONFIG_RT2800USB_RT35XX=y
+@@ -469,7 +469,7 @@ CONFIG_RT2800USB_RT35XX=y
  # CONFIG_RT2800USB_RT53XX=y
  CONFIG_RT2800USB_UNKNOWN=y
  endif #CONFIG_CRC_CCITT
diff --git a/package/mac80211/patches/110-disable_usb_compat.patch b/package/mac80211/patches/110-disable_usb_compat.patch
index 7678e3bbbc..dda96999a8 100644
--- a/package/mac80211/patches/110-disable_usb_compat.patch
+++ b/package/mac80211/patches/110-disable_usb_compat.patch
@@ -33,7 +33,7 @@
  #endif
 --- a/config.mk
 +++ b/config.mk
-@@ -456,7 +456,7 @@ endif #CONFIG_COMPAT_KERNEL_2_6_29
+@@ -455,7 +455,7 @@ endif #CONFIG_COMPAT_KERNEL_2_6_29
  # This activates a threading fix for usb urb.
  # this is mainline commit: b3e670443b7fb8a2d29831b62b44a039c283e351
  # This fix will be included in some stable releases.
diff --git a/package/mac80211/patches/300-pending_work.patch b/package/mac80211/patches/300-pending_work.patch
index d3bcece60d..0c0846df8e 100644
--- a/package/mac80211/patches/300-pending_work.patch
+++ b/package/mac80211/patches/300-pending_work.patch
@@ -1,2128 +1,10631 @@
---- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
-@@ -170,33 +170,104 @@ static bool ar9002_hw_get_isr(struct ath
+--- a/drivers/net/wireless/ath/ath.h
++++ b/drivers/net/wireless/ath/ath.h
+@@ -71,9 +71,7 @@ struct ath_regulatory {
+ 	char alpha2[2];
+ 	u16 country_code;
+ 	u16 max_power_level;
+-	u32 tp_scale;
+ 	u16 current_rd;
+-	u16 current_rd_ext;
+ 	int16_t power_limit;
+ 	struct reg_dmn_pair_mapping *regpair;
+ };
+--- a/drivers/net/wireless/ath/ath9k/Makefile
++++ b/drivers/net/wireless/ath/ath9k/Makefile
+@@ -21,6 +21,7 @@ ath9k_hw-y:=	\
+ 		ar5008_phy.o \
+ 		ar9002_calib.o \
+ 		ar9003_calib.o \
++		ar9003_rtt.o \
+ 		calib.o \
+ 		eeprom.o \
+ 		eeprom_def.o \
+--- a/drivers/net/wireless/ath/ath9k/ani.c
++++ b/drivers/net/wireless/ath/ath9k/ani.c
+@@ -504,9 +504,6 @@ static void ath9k_ani_reset_old(struct a
+ 		ath9k_hw_ani_control(ah, ATH9K_ANI_CCK_WEAK_SIGNAL_THR,
+ 				     ATH9K_ANI_CCK_WEAK_SIG_THR);
+ 
+-		ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) |
+-				     ATH9K_RX_FILTER_PHYERR);
+-
+ 		ath9k_ani_restart(ah);
+ 		return;
+ 	}
+@@ -527,8 +524,6 @@ static void ath9k_ani_reset_old(struct a
+ 		ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
+ 				     aniState->firstepLevel);
+ 
+-	ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) &
+-			     ~ATH9K_RX_FILTER_PHYERR);
+ 	ath9k_ani_restart(ah);
+ 
+ 	ENABLE_REGWRITE_BUFFER(ah);
+--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+@@ -763,10 +763,8 @@ static void ar5008_hw_set_channel_regs(s
+ static int ar5008_hw_process_ini(struct ath_hw *ah,
+ 				 struct ath9k_channel *chan)
+ {
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	struct ath_common *common = ath9k_hw_common(ah);
+ 	int i, regWrites = 0;
+-	struct ieee80211_channel *channel = chan->chan;
+ 	u32 modesIndex, freqIndex;
+ 
+ 	switch (chan->chanmode) {
+@@ -903,14 +901,7 @@ static int ar5008_hw_process_ini(struct 
+ 	ar5008_hw_set_channel_regs(ah, chan);
+ 	ar5008_hw_init_chain_masks(ah);
+ 	ath9k_olc_init(ah);
+-
+-	/* Set TX power */
+-	ah->eep_ops->set_txpower(ah, chan,
+-				 ath9k_regd_get_ctl(regulatory, chan),
+-				 channel->max_antenna_gain * 2,
+-				 channel->max_power * 2,
+-				 min((u32) MAX_RATE_POWER,
+-				 (u32) regulatory->power_limit), false);
++	ath9k_hw_apply_txpower(ah, chan);
+ 
+ 	/* Write analog registers */
+ 	if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
+--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+@@ -24,11 +24,11 @@ static const u32 ar9300_2p2_radio_postam
+ 	{0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
+ 	{0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
+ 	{0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
+-	{0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0001610c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ 	{0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+-	{0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0001650c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ 	{0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+-	{0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0001690c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ 	{0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+ };
+ 
+@@ -190,7 +190,7 @@ static const u32 ar9300_2p2_radio_core[]
+ 	{0x00016288, 0x05a20408},
+ 	{0x0001628c, 0x00038c07},
+ 	{0x00016290, 0x00000004},
+-	{0x00016294, 0x458aa14f},
++	{0x00016294, 0x458a214f},
+ 	{0x00016380, 0x00000000},
+ 	{0x00016384, 0x00000000},
+ 	{0x00016388, 0x00800700},
+@@ -835,107 +835,107 @@ static const u32 ar9300_2p2_baseband_cor
+ 
+ static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
+ 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
+-	{0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
+-	{0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
++	{0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++	{0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++	{0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+ 	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+ 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+ 	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ 	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+ 	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+ 	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+-	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+-	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
+-	{0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402},
+-	{0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
+-	{0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
+-	{0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
+-	{0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
+-	{0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
+-	{0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
+-	{0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
+-	{0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
+-	{0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
+-	{0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
+-	{0x0000a544, 0x52022470, 0x52022470, 0x3f001861, 0x3f001861},
+-	{0x0000a548, 0x55022490, 0x55022490, 0x43001a81, 0x43001a81},
+-	{0x0000a54c, 0x59022492, 0x59022492, 0x47001a83, 0x47001a83},
+-	{0x0000a550, 0x5d022692, 0x5d022692, 0x4a001c84, 0x4a001c84},
+-	{0x0000a554, 0x61022892, 0x61022892, 0x4e001ce3, 0x4e001ce3},
+-	{0x0000a558, 0x65024890, 0x65024890, 0x52001ce5, 0x52001ce5},
+-	{0x0000a55c, 0x69024892, 0x69024892, 0x56001ce9, 0x56001ce9},
+-	{0x0000a560, 0x6e024c92, 0x6e024c92, 0x5a001ceb, 0x5a001ceb},
+-	{0x0000a564, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+-	{0x0000a568, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+-	{0x0000a56c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+-	{0x0000a570, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+-	{0x0000a574, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+-	{0x0000a578, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
+-	{0x0000a57c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
++	{0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
++	{0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
++	{0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
++	{0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
++	{0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
++	{0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
++	{0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
++	{0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
++	{0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
++	{0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
++	{0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
++	{0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
++	{0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
++	{0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
++	{0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
++	{0x0000a54c, 0x5a08442e, 0x5a08442e, 0x47001a83, 0x47001a83},
++	{0x0000a550, 0x5e0a4431, 0x5e0a4431, 0x4a001c84, 0x4a001c84},
++	{0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
++	{0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
++	{0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
++	{0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
++	{0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++	{0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++	{0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++	{0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++	{0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++	{0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++	{0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+ 	{0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
+ 	{0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
+ 	{0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
+ 	{0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
+-	{0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
+-	{0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400},
+-	{0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402},
+-	{0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
+-	{0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603},
+-	{0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02},
+-	{0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04},
+-	{0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20},
+-	{0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20},
+-	{0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22},
+-	{0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24},
+-	{0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640},
+-	{0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660},
+-	{0x0000a5c4, 0x52822470, 0x52822470, 0x3f801861, 0x3f801861},
+-	{0x0000a5c8, 0x55822490, 0x55822490, 0x43801a81, 0x43801a81},
+-	{0x0000a5cc, 0x59822492, 0x59822492, 0x47801a83, 0x47801a83},
+-	{0x0000a5d0, 0x5d822692, 0x5d822692, 0x4a801c84, 0x4a801c84},
+-	{0x0000a5d4, 0x61822892, 0x61822892, 0x4e801ce3, 0x4e801ce3},
+-	{0x0000a5d8, 0x65824890, 0x65824890, 0x52801ce5, 0x52801ce5},
+-	{0x0000a5dc, 0x69824892, 0x69824892, 0x56801ce9, 0x56801ce9},
+-	{0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x5a801ceb, 0x5a801ceb},
+-	{0x0000a5e4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+-	{0x0000a5e8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+-	{0x0000a5ec, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+-	{0x0000a5f0, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+-	{0x0000a5f4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+-	{0x0000a5f8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
+-	{0x0000a5fc, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
++	{0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
++	{0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
++	{0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
++	{0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
++	{0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
++	{0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
++	{0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
++	{0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
++	{0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
++	{0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
++	{0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
++	{0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
++	{0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
++	{0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
++	{0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
++	{0x0000a5cc, 0x5a88442e, 0x5a88442e, 0x47801a83, 0x47801a83},
++	{0x0000a5d0, 0x5e8a4431, 0x5e8a4431, 0x4a801c84, 0x4a801c84},
++	{0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
++	{0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
++	{0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
++	{0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
++	{0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++	{0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++	{0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++	{0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++	{0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++	{0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
++	{0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
+ 	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ 	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
+-	{0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
+-	{0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
+-	{0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
+-	{0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
+-	{0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
+-	{0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+-	{0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+-	{0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+-	{0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+-	{0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+-	{0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
+-	{0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
+-	{0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
++	{0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++	{0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++	{0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++	{0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
++	{0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
++	{0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
++	{0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
++	{0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++	{0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
++	{0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++	{0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++	{0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++	{0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++	{0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++	{0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++	{0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++	{0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+ 	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
+-	{0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
+-	{0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
++	{0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++	{0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++	{0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+ 	{0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+ 	{0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+-	{0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++	{0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+ 	{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ 	{0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+-	{0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++	{0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+ 	{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ 	{0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+-	{0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
++	{0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+ 	{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+ 
+--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+@@ -17,8 +17,9 @@
+ #include "hw.h"
+ #include "hw-ops.h"
+ #include "ar9003_phy.h"
++#include "ar9003_rtt.h"
+ 
+-#define MAX_MEASUREMENT	8
++#define MAX_MEASUREMENT	MAX_IQCAL_MEASUREMENT
+ #define MAX_MAG_DELTA	11
+ #define MAX_PHS_DELTA	10
+ 
+@@ -659,10 +660,12 @@ static void ar9003_hw_detect_outlier(int
+ 
+ static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
+ 						 u8 num_chains,
+-						 struct coeff *coeff)
++						 struct coeff *coeff,
++						 bool is_reusable)
+ {
+ 	int i, im, nmeasurement;
+ 	u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
++	struct ath9k_hw_cal_data *caldata = ah->caldata;
+ 
+ 	memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
+ 	for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
+@@ -712,7 +715,13 @@ static void ar9003_hw_tx_iqcal_load_avg_
+ 				REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
+ 					AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
+ 					coeff->iqc_coeff[0]);
++
++			if (caldata)
++				caldata->tx_corr_coeff[im][i] =
++					coeff->iqc_coeff[0];
+ 		}
++		if (caldata)
++			caldata->num_measures[i] = nmeasurement;
+ 	}
+ 
+ 	REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
+@@ -720,8 +729,10 @@ static void ar9003_hw_tx_iqcal_load_avg_
+ 	REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
+ 		      AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
+ 
+-	return;
++	if (caldata)
++		caldata->done_txiqcal_once = is_reusable;
+ 
++	return;
+ }
+ 
+ static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
+@@ -748,7 +759,7 @@ static bool ar9003_hw_tx_iq_cal_run(stru
  	return true;
  }
  
--static void ar9002_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen,
--				  bool is_firstseg, bool is_lastseg,
--				  const void *ds0, dma_addr_t buf_addr,
--				  unsigned int qcu)
-+static void
-+ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
+-static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah)
++static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, bool is_reusable)
  {
- 	struct ar5416_desc *ads = AR5416DESC(ds);
-+	u32 ctl1, ctl6;
- 
--	ads->ds_data = buf_addr;
--
--	if (is_firstseg) {
--		ads->ds_ctl1 |= seglen | (is_lastseg ? 0 : AR_TxMore);
--	} else if (is_lastseg) {
--		ads->ds_ctl0 = 0;
--		ads->ds_ctl1 = seglen;
--		ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
--		ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
--	} else {
--		ads->ds_ctl0 = 0;
--		ads->ds_ctl1 = seglen | AR_TxMore;
--		ads->ds_ctl2 = 0;
--		ads->ds_ctl3 = 0;
--	}
- 	ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
- 	ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
- 	ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
- 	ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
- 	ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
-+
-+	ACCESS_ONCE(ads->ds_link) = i->link;
-+	ACCESS_ONCE(ads->ds_data) = i->buf_addr[0];
-+
-+	ctl1 = i->buf_len[0] | (i->is_last ? 0 : AR_TxMore);
-+	ctl6 = SM(i->keytype, AR_EncrType);
-+
-+	if (AR_SREV_9285(ah)) {
-+		ads->ds_ctl8 = 0;
-+		ads->ds_ctl9 = 0;
-+		ads->ds_ctl10 = 0;
-+		ads->ds_ctl11 = 0;
+ 	struct ath_common *common = ath9k_hw_common(ah);
+ 	const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
+@@ -837,7 +848,8 @@ static void ar9003_hw_tx_iq_cal_post_pro
+ 				coeff.phs_coeff[i][im] -= 128;
+ 		}
+ 	}
+-	ar9003_hw_tx_iqcal_load_avg_2_passes(ah, num_chains, &coeff);
++	ar9003_hw_tx_iqcal_load_avg_2_passes(ah, num_chains,
++					     &coeff, is_reusable);
+ 
+ 	return;
+ 
+@@ -845,11 +857,128 @@ tx_iqcal_fail:
+ 	ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
+ 	return;
+ }
++
++static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)
++{
++	struct ath9k_hw_cal_data *caldata = ah->caldata;
++	u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
++	int i, im;
++
++	memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
++	for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
++		tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] =
++					AR_PHY_TX_IQCAL_CORR_COEFF_B0(i);
++		if (!AR_SREV_9485(ah)) {
++			tx_corr_coeff[i * 2][1] =
++			tx_corr_coeff[(i * 2) + 1][1] =
++					AR_PHY_TX_IQCAL_CORR_COEFF_B1(i);
++
++			tx_corr_coeff[i * 2][2] =
++			tx_corr_coeff[(i * 2) + 1][2] =
++					AR_PHY_TX_IQCAL_CORR_COEFF_B2(i);
++		}
 +	}
 +
-+	if ((i->is_first || i->is_last) &&
-+	    i->aggr != AGGR_BUF_MIDDLE && i->aggr != AGGR_BUF_LAST) {
-+		ACCESS_ONCE(ads->ds_ctl2) = set11nTries(i->rates, 0)
-+			| set11nTries(i->rates, 1)
-+			| set11nTries(i->rates, 2)
-+			| set11nTries(i->rates, 3)
-+			| (i->dur_update ? AR_DurUpdateEna : 0)
-+			| SM(0, AR_BurstDur);
-+
-+		ACCESS_ONCE(ads->ds_ctl3) = set11nRate(i->rates, 0)
-+			| set11nRate(i->rates, 1)
-+			| set11nRate(i->rates, 2)
-+			| set11nRate(i->rates, 3);
-+	} else {
-+		ACCESS_ONCE(ads->ds_ctl2) = 0;
-+		ACCESS_ONCE(ads->ds_ctl3) = 0;
++	for (i = 0; i < AR9300_MAX_CHAINS; i++) {
++		if (!(ah->txchainmask & (1 << i)))
++			continue;
++
++		for (im = 0; im < caldata->num_measures[i]; im++) {
++			if ((im % 2) == 0)
++				REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
++				     AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE,
++				     caldata->tx_corr_coeff[im][i]);
++			else
++				REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
++				     AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
++				     caldata->tx_corr_coeff[im][i]);
++		}
 +	}
 +
-+	if (!i->is_first) {
-+		ACCESS_ONCE(ads->ds_ctl0) = 0;
-+		ACCESS_ONCE(ads->ds_ctl1) = ctl1;
-+		ACCESS_ONCE(ads->ds_ctl6) = ctl6;
-+		return;
++	REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
++		      AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
++	REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
++		      AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
++}
++
++static bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan)
++{
++	struct ath9k_rtt_hist *hist = &ah->caldata->rtt_hist;
++	u32 *table;
++	int i;
++	bool restore;
++
++	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT))
++		return false;
++
++	ar9003_hw_rtt_enable(ah);
++	ar9003_hw_rtt_set_mask(ah, 0x10);
++	for (i = 0; i < AR9300_MAX_CHAINS; i++) {
++		if (!(ah->rxchainmask & (1 << i)))
++			continue;
++		table = &hist->table[i][hist->num_readings][0];
++		ar9003_hw_rtt_load_hist(ah, i, table);
 +	}
++	restore = ar9003_hw_rtt_force_restore(ah);
++	ar9003_hw_rtt_disable(ah);
 +
-+	ctl1 |= (i->keyix != ATH9K_TXKEYIX_INVALID ? SM(i->keyix, AR_DestIdx) : 0)
-+		| SM(i->type, AR_FrameType)
-+		| (i->flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
-+		| (i->flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
-+		| (i->flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
++	return restore;
++}
 +
-+	switch (i->aggr) {
-+	case AGGR_BUF_FIRST:
-+		ctl6 |= SM(i->aggr_len, AR_AggrLen);
-+		/* fall through */
-+	case AGGR_BUF_MIDDLE:
-+		ctl1 |= AR_IsAggr | AR_MoreAggr;
-+		ctl6 |= SM(i->ndelim, AR_PadDelim);
-+		break;
-+	case AGGR_BUF_LAST:
-+		ctl1 |= AR_IsAggr;
-+		break;
-+	case AGGR_BUF_NONE:
-+		break;
+ static bool ar9003_hw_init_cal(struct ath_hw *ah,
+ 			       struct ath9k_channel *chan)
+ {
+ 	struct ath_common *common = ath9k_hw_common(ah);
+-	bool txiqcal_done = false;
++	struct ath9k_hw_cal_data *caldata = ah->caldata;
++	bool txiqcal_done = false, txclcal_done = false;
++	bool is_reusable = true, status = true;
++	bool run_rtt_cal = false, run_agc_cal;
++	bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
++	u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
++					  AR_PHY_AGC_CONTROL_FLTR_CAL   |
++					  AR_PHY_AGC_CONTROL_PKDET_CAL;
++	int i, j;
++	u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
++					  AR_PHY_CL_TAB_1,
++					  AR_PHY_CL_TAB_2 };
++
++	if (rtt) {
++		if (!ar9003_hw_rtt_restore(ah, chan))
++			run_rtt_cal = true;
++
++		ath_dbg(common, ATH_DBG_CALIBRATE, "RTT restore %s\n",
++			run_rtt_cal ? "failed" : "succeed");
 +	}
++	run_agc_cal = run_rtt_cal;
 +
-+	ACCESS_ONCE(ads->ds_ctl0) = (i->pkt_len & AR_FrameLen)
-+		| (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
-+		| SM(i->txpower, AR_XmitPower)
-+		| (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
-+		| (i->flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
-+		| (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
-+		| (i->flags & ATH9K_TXDESC_CLRDMASK ? AR_ClrDestMask : 0)
-+		| (i->flags & ATH9K_TXDESC_RTSENA ? AR_RTSEnable :
-+		   (i->flags & ATH9K_TXDESC_CTSENA ? AR_CTSEnable : 0));
++	if (run_rtt_cal) {
++		ar9003_hw_rtt_enable(ah);
++		ar9003_hw_rtt_set_mask(ah, 0x00);
++		ar9003_hw_rtt_clear_hist(ah);
++	}
 +
-+	ACCESS_ONCE(ads->ds_ctl1) = ctl1;
-+	ACCESS_ONCE(ads->ds_ctl6) = ctl6;
++	if (rtt && !run_rtt_cal) {
++		agc_ctrl = REG_READ(ah, AR_PHY_AGC_CONTROL);
++		agc_supp_cals &= agc_ctrl;
++		agc_ctrl &= ~(AR_PHY_AGC_CONTROL_OFFSET_CAL |
++			     AR_PHY_AGC_CONTROL_FLTR_CAL |
++			     AR_PHY_AGC_CONTROL_PKDET_CAL);
++		REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
++	}
 +
-+	if (i->aggr == AGGR_BUF_MIDDLE || i->aggr == AGGR_BUF_LAST)
-+		return;
++	if (ah->enabled_cals & TX_CL_CAL) {
++		if (caldata && caldata->done_txclcal_once)
++			REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL,
++				    AR_PHY_CL_CAL_ENABLE);
++		else {
++			REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL,
++				    AR_PHY_CL_CAL_ENABLE);
++			run_agc_cal = true;
++		}
++	}
++
++	if (!(ah->enabled_cals & TX_IQ_CAL))
++		goto skip_tx_iqcal;
+ 
+ 	/* Do Tx IQ Calibration */
+ 	REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
+@@ -860,30 +989,96 @@ static bool ar9003_hw_init_cal(struct at
+ 	 * For AR9485 or later chips, TxIQ cal runs as part of
+ 	 * AGC calibration
+ 	 */
+-	if (AR_SREV_9485_OR_LATER(ah))
+-		txiqcal_done = true;
+-	else {
+-		txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
+-		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+-		udelay(5);
+-		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
+-	}
+-
+-	/* Calibrate the AGC */
+-	REG_WRITE(ah, AR_PHY_AGC_CONTROL,
+-		  REG_READ(ah, AR_PHY_AGC_CONTROL) |
+-		  AR_PHY_AGC_CONTROL_CAL);
+-
+-	/* Poll for offset calibration complete */
+-	if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
+-			   0, AH_WAIT_TIMEOUT)) {
++	if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
++		if (caldata && !caldata->done_txiqcal_once)
++			REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
++				    AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
++		else
++			REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
++				    AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
++		txiqcal_done = run_agc_cal = true;
++		goto skip_tx_iqcal;
++	} else if (caldata && !caldata->done_txiqcal_once)
++		run_agc_cal = true;
 +
-+	ACCESS_ONCE(ads->ds_ctl4) = set11nPktDurRTSCTS(i->rates, 0)
-+		| set11nPktDurRTSCTS(i->rates, 1);
++	txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
++	REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
++	udelay(5);
++	REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
 +
-+	ACCESS_ONCE(ads->ds_ctl5) = set11nPktDurRTSCTS(i->rates, 2)
-+		| set11nPktDurRTSCTS(i->rates, 3);
++skip_tx_iqcal:
++	if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
++		/* Calibrate the AGC */
++		REG_WRITE(ah, AR_PHY_AGC_CONTROL,
++			  REG_READ(ah, AR_PHY_AGC_CONTROL) |
++			  AR_PHY_AGC_CONTROL_CAL);
 +
-+	ACCESS_ONCE(ads->ds_ctl7) = set11nRateFlags(i->rates, 0)
-+		| set11nRateFlags(i->rates, 1)
-+		| set11nRateFlags(i->rates, 2)
-+		| set11nRateFlags(i->rates, 3)
-+		| SM(i->rtscts_rate, AR_RTSCTSRate);
- }
++		/* Poll for offset calibration complete */
++		status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
++				       AR_PHY_AGC_CONTROL_CAL,
++				       0, AH_WAIT_TIMEOUT);
++	}
++	if (rtt && !run_rtt_cal) {
++		agc_ctrl |= agc_supp_cals;
++		REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
++	}
++
++	if (!status) {
++		if (run_rtt_cal)
++			ar9003_hw_rtt_disable(ah);
++
+ 		ath_dbg(common, ATH_DBG_CALIBRATE,
+-			"offset calibration failed to complete in 1ms; noisy environment?\n");
++			"offset calibration failed to complete in 1ms;"
++			"noisy environment?\n");
+ 		return false;
+ 	}
  
- static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
-@@ -271,145 +342,6 @@ static int ar9002_hw_proc_txdesc(struct 
- 	return 0;
+ 	if (txiqcal_done)
+-		ar9003_hw_tx_iq_cal_post_proc(ah);
++		ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
++	else if (caldata && caldata->done_txiqcal_once)
++		ar9003_hw_tx_iq_cal_reload(ah);
++
++#define CL_TAB_ENTRY(reg_base)	(reg_base + (4 * j))
++	if (caldata && (ah->enabled_cals & TX_CL_CAL)) {
++		txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
++					   AR_PHY_AGC_CONTROL_CLC_SUCCESS);
++		if (caldata->done_txclcal_once) {
++			for (i = 0; i < AR9300_MAX_CHAINS; i++) {
++				if (!(ah->txchainmask & (1 << i)))
++					continue;
++				for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
++					REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
++						  caldata->tx_clcal[i][j]);
++			}
++		} else if (is_reusable && txclcal_done) {
++			for (i = 0; i < AR9300_MAX_CHAINS; i++) {
++				if (!(ah->txchainmask & (1 << i)))
++					continue;
++				for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
++					caldata->tx_clcal[i][j] =
++						REG_READ(ah,
++						  CL_TAB_ENTRY(cl_idx[i]));
++			}
++			caldata->done_txclcal_once = true;
++		}
++	}
++#undef CL_TAB_ENTRY
++
++	if (run_rtt_cal) {
++		struct ath9k_rtt_hist *hist = &ah->caldata->rtt_hist;
++		if (is_reusable && (hist->num_readings < RTT_HIST_MAX)) {
++			u32 *table;
++
++			for (i = 0; i < AR9300_MAX_CHAINS; i++) {
++				if (!(ah->rxchainmask & (1 << i)))
++					continue;
++				table = &hist->table[i][hist->num_readings][0];
++				ar9003_hw_rtt_fill_hist(ah, i, table);
++			}
++		}
++
++		ar9003_hw_rtt_disable(ah);
++	}
+ 
+ 	ath9k_hw_loadnf(ah, chan);
+ 	ath9k_hw_start_nfcal(ah, true);
+@@ -912,8 +1107,8 @@ static bool ar9003_hw_init_cal(struct at
+ 	if (ah->cal_list_curr)
+ 		ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
+ 
+-	if (ah->caldata)
+-		ah->caldata->CalValid = 0;
++	if (caldata)
++		caldata->CalValid = 0;
+ 
+ 	return true;
  }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -2995,8 +2995,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
+ 		return get_unaligned_be16(eep->macAddr + 4);
+ 	case EEP_REG_0:
+ 		return le16_to_cpu(pBase->regDmn[0]);
+-	case EEP_REG_1:
+-		return le16_to_cpu(pBase->regDmn[1]);
+ 	case EEP_OP_CAP:
+ 		return pBase->deviceCap;
+ 	case EEP_OP_MODE:
+@@ -3021,6 +3019,10 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
+ 		return (pBase->miscConfiguration >> 0x3) & 0x1;
+ 	case EEP_ANT_DIV_CTL1:
+ 		return eep->base_ext1.ant_div_control;
++	case EEP_ANTENNA_GAIN_5G:
++		return eep->modalHeader5G.antennaGain;
++	case EEP_ANTENNA_GAIN_2G:
++		return eep->modalHeader2G.antennaGain;
+ 	default:
+ 		return 0;
+ 	}
+@@ -3554,7 +3556,7 @@ static void ar9003_hw_xpa_bias_level_app
+ 
+ 	if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
+ 		REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
+-	else if (AR_SREV_9480(ah))
++	else if (AR_SREV_9462(ah))
+ 		REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
+ 	else {
+ 		REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
+@@ -3633,20 +3635,20 @@ static void ar9003_hw_ant_ctrl_apply(str
+ 
+ 	u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
+ 
+-	if (AR_SREV_9480(ah)) {
+-		if (AR_SREV_9480_10(ah)) {
++	if (AR_SREV_9462(ah)) {
++		if (AR_SREV_9462_10(ah)) {
+ 			value &= ~AR_SWITCH_TABLE_COM_SPDT;
+ 			value |= 0x00100000;
+ 		}
+ 		REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
+-				AR_SWITCH_TABLE_COM_AR9480_ALL, value);
++				AR_SWITCH_TABLE_COM_AR9462_ALL, value);
+ 	} else
+ 		REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
+ 			      AR_SWITCH_TABLE_COM_ALL, value);
  
--static void ar9002_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
--				    u32 pktLen, enum ath9k_pkt_type type,
--				    u32 txPower, u8 keyIx,
--				    enum ath9k_key_type keyType, u32 flags)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
--
--	if (txPower > 63)
--		txPower = 63;
--
--	ads->ds_ctl0 = (pktLen & AR_FrameLen)
--		| (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
--		| SM(txPower, AR_XmitPower)
--		| (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
--		| (flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
--		| (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0);
--
--	ads->ds_ctl1 =
--		(keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
--		| SM(type, AR_FrameType)
--		| (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
--		| (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
--		| (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
--
--	ads->ds_ctl6 = SM(keyType, AR_EncrType);
--
--	if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
--		ads->ds_ctl8 = 0;
--		ads->ds_ctl9 = 0;
--		ads->ds_ctl10 = 0;
--		ads->ds_ctl11 = 0;
--	}
--}
+ 
+ 	/*
+-	 *   AR9480 defines new switch table for BT/WLAN,
++	 *   AR9462 defines new switch table for BT/WLAN,
+ 	 *       here's new field name in XXX.ref for both 2G and 5G.
+ 	 *   Register: [GLB_CONTROL] GLB_CONTROL (@0x20044)
+ 	 *   15:12   R/W     SWITCH_TABLE_COM_SPDT_WLAN_RX
+@@ -3658,7 +3660,7 @@ static void ar9003_hw_ant_ctrl_apply(str
+ 	 *   7:4 R/W  SWITCH_TABLE_COM_SPDT_WLAN_IDLE
+ 	 * SWITCH_TABLE_COM_SPDT_WLAN_IDLE
+ 	 */
+-	if (AR_SREV_9480_20_OR_LATER(ah)) {
++	if (AR_SREV_9462_20_OR_LATER(ah)) {
+ 		value = ar9003_switch_com_spdt_get(ah, is2ghz);
+ 		REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL,
+ 				AR_SWITCH_TABLE_COM_SPDT_ALL, value);
+@@ -3907,7 +3909,7 @@ static void ar9003_hw_internal_regulator
+ 			REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set);
+ 			if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
+ 				return;
+-		} else if (AR_SREV_9480(ah)) {
++		} else if (AR_SREV_9462(ah)) {
+ 			reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
+ 			REG_WRITE(ah, AR_PHY_PMU1, reg_val);
+ 		} else {
+@@ -3938,7 +3940,7 @@ static void ar9003_hw_internal_regulator
+ 			while (!REG_READ_FIELD(ah, AR_PHY_PMU2,
+ 						AR_PHY_PMU2_PGM))
+ 				udelay(10);
+-		} else if (AR_SREV_9480(ah))
++		} else if (AR_SREV_9462(ah))
+ 			REG_RMW_FIELD(ah, AR_PHY_PMU1, AR_PHY_PMU1_PWD, 0x1);
+ 		else {
+ 			reg_val = REG_READ(ah, AR_RTC_SLEEP_CLK) |
+@@ -4525,7 +4527,7 @@ static int ar9003_hw_power_control_overr
+ 
+ 	REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
+ 
+-	if (AR_SREV_9480_20(ah))
++	if (AR_SREV_9462_20(ah))
+ 		REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
+ 			      AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
+ 
+@@ -4764,20 +4766,14 @@ static u16 ar9003_hw_get_max_edge_power(
+ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
+ 					       struct ath9k_channel *chan,
+ 					       u8 *pPwrArray, u16 cfgCtl,
+-					       u8 twiceAntennaReduction,
+-					       u8 twiceMaxRegulatoryPower,
++					       u8 antenna_reduction,
+ 					       u16 powerLimit)
+ {
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	struct ath_common *common = ath9k_hw_common(ah);
+ 	struct ar9300_eeprom *pEepData = &ah->eeprom.ar9300_eep;
+ 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
+-	static const u16 tpScaleReductionTable[5] = {
+-		0, 3, 6, 9, MAX_RATE_POWER
+-	};
+ 	int i;
+-	int16_t  twiceLargestAntenna;
+-	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
++	u16 scaledPower = 0, minCtlPower;
+ 	static const u16 ctlModesFor11a[] = {
+ 		CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
+ 	};
+@@ -4795,28 +4791,7 @@ static void ar9003_hw_set_power_per_rate
+ 	bool is2ghz = IS_CHAN_2GHZ(chan);
+ 
+ 	ath9k_hw_get_channel_centers(ah, chan, &centers);
+-
+-	/* Compute TxPower reduction due to Antenna Gain */
+-	if (is2ghz)
+-		twiceLargestAntenna = pEepData->modalHeader2G.antennaGain;
+-	else
+-		twiceLargestAntenna = pEepData->modalHeader5G.antennaGain;
 -
--static void ar9002_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
+-	twiceLargestAntenna = (int16_t)min((twiceAntennaReduction) -
+-				twiceLargestAntenna, 0);
 -
--	if (val)
--		ads->ds_ctl0 |= AR_ClrDestMask;
--	else
--		ads->ds_ctl0 &= ~AR_ClrDestMask;
--}
--
--static void ar9002_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
--					  void *lastds,
--					  u32 durUpdateEn, u32 rtsctsRate,
--					  u32 rtsctsDuration,
--					  struct ath9k_11n_rate_series series[],
--					  u32 nseries, u32 flags)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
--	struct ar5416_desc *last_ads = AR5416DESC(lastds);
--	u32 ds_ctl0;
--
--	if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
--		ds_ctl0 = ads->ds_ctl0;
--
--		if (flags & ATH9K_TXDESC_RTSENA) {
--			ds_ctl0 &= ~AR_CTSEnable;
--			ds_ctl0 |= AR_RTSEnable;
--		} else {
--			ds_ctl0 &= ~AR_RTSEnable;
--			ds_ctl0 |= AR_CTSEnable;
--		}
+-	/*
+-	 * scaledPower is the minimum of the user input power level
+-	 * and the regulatory allowed power level
+-	 */
+-	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
 -
--		ads->ds_ctl0 = ds_ctl0;
--	} else {
--		ads->ds_ctl0 =
--			(ads->ds_ctl0 & ~(AR_RTSEnable | AR_CTSEnable));
+-	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
+-		maxRegAllowedPower -=
+-			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
 -	}
 -
--	ads->ds_ctl2 = set11nTries(series, 0)
--		| set11nTries(series, 1)
--		| set11nTries(series, 2)
--		| set11nTries(series, 3)
--		| (durUpdateEn ? AR_DurUpdateEna : 0)
--		| SM(0, AR_BurstDur);
--
--	ads->ds_ctl3 = set11nRate(series, 0)
--		| set11nRate(series, 1)
--		| set11nRate(series, 2)
--		| set11nRate(series, 3);
--
--	ads->ds_ctl4 = set11nPktDurRTSCTS(series, 0)
--		| set11nPktDurRTSCTS(series, 1);
--
--	ads->ds_ctl5 = set11nPktDurRTSCTS(series, 2)
--		| set11nPktDurRTSCTS(series, 3);
--
--	ads->ds_ctl7 = set11nRateFlags(series, 0)
--		| set11nRateFlags(series, 1)
--		| set11nRateFlags(series, 2)
--		| set11nRateFlags(series, 3)
--		| SM(rtsctsRate, AR_RTSCTSRate);
--	last_ads->ds_ctl2 = ads->ds_ctl2;
--	last_ads->ds_ctl3 = ads->ds_ctl3;
--}
--
--static void ar9002_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
--					u32 aggrLen)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
--
--	ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
--	ads->ds_ctl6 &= ~AR_AggrLen;
--	ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen);
--}
--
--static void ar9002_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
--					 u32 numDelims)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
--	unsigned int ctl6;
--
--	ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
--
--	ctl6 = ads->ds_ctl6;
--	ctl6 &= ~AR_PadDelim;
--	ctl6 |= SM(numDelims, AR_PadDelim);
--	ads->ds_ctl6 = ctl6;
--}
--
--static void ar9002_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
--
--	ads->ds_ctl1 |= AR_IsAggr;
--	ads->ds_ctl1 &= ~AR_MoreAggr;
--	ads->ds_ctl6 &= ~AR_PadDelim;
--}
--
--static void ar9002_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
--
--	ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
--}
--
- void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
- 			  u32 size, u32 flags)
+-	scaledPower = min(powerLimit, maxRegAllowedPower);
++	scaledPower = powerLimit - antenna_reduction;
+ 
+ 	/*
+ 	 * Reduce scaled Power by number of chains active to get
+@@ -5003,7 +4978,6 @@ static inline u8 mcsidx_to_tgtpwridx(uns
+ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
+ 					struct ath9k_channel *chan, u16 cfgCtl,
+ 					u8 twiceAntennaReduction,
+-					u8 twiceMaxRegulatoryPower,
+ 					u8 powerLimit, bool test)
+ {
+ 	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+@@ -5056,7 +5030,6 @@ static void ath9k_hw_ar9300_set_txpower(
+ 	ar9003_hw_set_power_per_rate_table(ah, chan,
+ 					   targetPowerValT2, cfgCtl,
+ 					   twiceAntennaReduction,
+-					   twiceMaxRegulatoryPower,
+ 					   powerLimit);
+ 
+ 	if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD)) {
+--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+@@ -22,8 +22,8 @@
+ #include "ar9330_1p1_initvals.h"
+ #include "ar9330_1p2_initvals.h"
+ #include "ar9580_1p0_initvals.h"
+-#include "ar9480_1p0_initvals.h"
+-#include "ar9480_2p0_initvals.h"
++#include "ar9462_1p0_initvals.h"
++#include "ar9462_2p0_initvals.h"
+ 
+ /* General hardware code for the AR9003 hadware family */
+ 
+@@ -35,13 +35,13 @@
+ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
  {
-@@ -433,13 +365,6 @@ void ar9002_hw_attach_mac_ops(struct ath
- 	ops->rx_enable = ar9002_hw_rx_enable;
- 	ops->set_desc_link = ar9002_hw_set_desc_link;
- 	ops->get_isr = ar9002_hw_get_isr;
--	ops->fill_txdesc = ar9002_hw_fill_txdesc;
-+	ops->set_txdesc = ar9002_set_txdesc;
- 	ops->proc_txdesc = ar9002_hw_proc_txdesc;
--	ops->set11n_txdesc = ar9002_hw_set11n_txdesc;
--	ops->set11n_ratescenario = ar9002_hw_set11n_ratescenario;
--	ops->set11n_aggr_first = ar9002_hw_set11n_aggr_first;
--	ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle;
--	ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last;
--	ops->clr11n_aggr = ar9002_hw_clr11n_aggr;
--	ops->set_clrdmask = ar9002_hw_set_clrdmask;
+ #define PCIE_PLL_ON_CREQ_DIS_L1_2P0 \
+-		ar9480_pciephy_pll_on_clkreq_disable_L1_2p0
++		ar9462_pciephy_pll_on_clkreq_disable_L1_2p0
+ 
+-#define AR9480_BB_CTX_COEFJ(x)	\
+-		ar9480_##x##_baseband_core_txfir_coeff_japan_2484
++#define AR9462_BB_CTX_COEFJ(x)	\
++		ar9462_##x##_baseband_core_txfir_coeff_japan_2484
+ 
+-#define AR9480_BBC_TXIFR_COEFFJ \
+-		ar9480_2p0_baseband_core_txfir_coeff_japan_2484
++#define AR9462_BBC_TXIFR_COEFFJ \
++		ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+ 	if (AR_SREV_9330_11(ah)) {
+ 		/* mac */
+ 		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+@@ -264,107 +264,107 @@ static void ar9003_hw_init_mode_regs(str
+ 				ar9485_1_1_pcie_phy_clkreq_disable_L1,
+ 				ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
+ 				2);
+-	} else if (AR_SREV_9480_10(ah)) {
++	} else if (AR_SREV_9462_10(ah)) {
+ 		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+-		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_1p0_mac_core,
+-				ARRAY_SIZE(ar9480_1p0_mac_core), 2);
++		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_1p0_mac_core,
++				ARRAY_SIZE(ar9462_1p0_mac_core), 2);
+ 		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+-				ar9480_1p0_mac_postamble,
+-				ARRAY_SIZE(ar9480_1p0_mac_postamble),
++				ar9462_1p0_mac_postamble,
++				ARRAY_SIZE(ar9462_1p0_mac_postamble),
+ 				5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ 		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+-				ar9480_1p0_baseband_core,
+-				ARRAY_SIZE(ar9480_1p0_baseband_core),
++				ar9462_1p0_baseband_core,
++				ARRAY_SIZE(ar9462_1p0_baseband_core),
+ 				2);
+ 		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+-				ar9480_1p0_baseband_postamble,
+-				ARRAY_SIZE(ar9480_1p0_baseband_postamble), 5);
++				ar9462_1p0_baseband_postamble,
++				ARRAY_SIZE(ar9462_1p0_baseband_postamble), 5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ 		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+-				ar9480_1p0_radio_core,
+-				ARRAY_SIZE(ar9480_1p0_radio_core), 2);
++				ar9462_1p0_radio_core,
++				ARRAY_SIZE(ar9462_1p0_radio_core), 2);
+ 		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+-				ar9480_1p0_radio_postamble,
+-				ARRAY_SIZE(ar9480_1p0_radio_postamble), 5);
++				ar9462_1p0_radio_postamble,
++				ARRAY_SIZE(ar9462_1p0_radio_postamble), 5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+-				ar9480_1p0_soc_preamble,
+-				ARRAY_SIZE(ar9480_1p0_soc_preamble), 2);
++				ar9462_1p0_soc_preamble,
++				ARRAY_SIZE(ar9462_1p0_soc_preamble), 2);
+ 		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
+ 		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+-				ar9480_1p0_soc_postamble,
+-				ARRAY_SIZE(ar9480_1p0_soc_postamble), 5);
++				ar9462_1p0_soc_postamble,
++				ARRAY_SIZE(ar9462_1p0_soc_postamble), 5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-				ar9480_common_rx_gain_table_1p0,
+-				ARRAY_SIZE(ar9480_common_rx_gain_table_1p0), 2);
++				ar9462_common_rx_gain_table_1p0,
++				ARRAY_SIZE(ar9462_common_rx_gain_table_1p0), 2);
+ 
+ 		/* Awake -> Sleep Setting */
+ 		INIT_INI_ARRAY(&ah->iniPcieSerdes,
+-			ar9480_pcie_phy_clkreq_disable_L1_1p0,
+-			ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0),
++			ar9462_pcie_phy_clkreq_disable_L1_1p0,
++			ARRAY_SIZE(ar9462_pcie_phy_clkreq_disable_L1_1p0),
+ 			2);
+ 
+ 		/* Sleep -> Awake Setting */
+ 		INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+-			ar9480_pcie_phy_clkreq_disable_L1_1p0,
+-			ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0),
++			ar9462_pcie_phy_clkreq_disable_L1_1p0,
++			ARRAY_SIZE(ar9462_pcie_phy_clkreq_disable_L1_1p0),
+ 			2);
+ 
+ 		INIT_INI_ARRAY(&ah->iniModesAdditional,
+-				ar9480_modes_fast_clock_1p0,
+-				ARRAY_SIZE(ar9480_modes_fast_clock_1p0), 3);
++				ar9462_modes_fast_clock_1p0,
++				ARRAY_SIZE(ar9462_modes_fast_clock_1p0), 3);
+ 		INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+-				AR9480_BB_CTX_COEFJ(1p0),
+-				ARRAY_SIZE(AR9480_BB_CTX_COEFJ(1p0)), 2);
++				AR9462_BB_CTX_COEFJ(1p0),
++				ARRAY_SIZE(AR9462_BB_CTX_COEFJ(1p0)), 2);
+ 
+-	} else if (AR_SREV_9480_20(ah)) {
++	} else if (AR_SREV_9462_20(ah)) {
+ 
+ 		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+-		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_2p0_mac_core,
+-				ARRAY_SIZE(ar9480_2p0_mac_core), 2);
++		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core,
++				ARRAY_SIZE(ar9462_2p0_mac_core), 2);
+ 		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+-				ar9480_2p0_mac_postamble,
+-				ARRAY_SIZE(ar9480_2p0_mac_postamble), 5);
++				ar9462_2p0_mac_postamble,
++				ARRAY_SIZE(ar9462_2p0_mac_postamble), 5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ 		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+-				ar9480_2p0_baseband_core,
+-				ARRAY_SIZE(ar9480_2p0_baseband_core), 2);
++				ar9462_2p0_baseband_core,
++				ARRAY_SIZE(ar9462_2p0_baseband_core), 2);
+ 		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+-				ar9480_2p0_baseband_postamble,
+-				ARRAY_SIZE(ar9480_2p0_baseband_postamble), 5);
++				ar9462_2p0_baseband_postamble,
++				ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ 		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+-				ar9480_2p0_radio_core,
+-				ARRAY_SIZE(ar9480_2p0_radio_core), 2);
++				ar9462_2p0_radio_core,
++				ARRAY_SIZE(ar9462_2p0_radio_core), 2);
+ 		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+-				ar9480_2p0_radio_postamble,
+-				ARRAY_SIZE(ar9480_2p0_radio_postamble), 5);
++				ar9462_2p0_radio_postamble,
++				ARRAY_SIZE(ar9462_2p0_radio_postamble), 5);
+ 		INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant,
+-				ar9480_2p0_radio_postamble_sys2ant,
+-				ARRAY_SIZE(ar9480_2p0_radio_postamble_sys2ant),
++				ar9462_2p0_radio_postamble_sys2ant,
++				ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant),
+ 				5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+-				ar9480_2p0_soc_preamble,
+-				ARRAY_SIZE(ar9480_2p0_soc_preamble), 2);
++				ar9462_2p0_soc_preamble,
++				ARRAY_SIZE(ar9462_2p0_soc_preamble), 2);
+ 		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
+ 		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+-				ar9480_2p0_soc_postamble,
+-				ARRAY_SIZE(ar9480_2p0_soc_postamble), 5);
++				ar9462_2p0_soc_postamble,
++				ARRAY_SIZE(ar9462_2p0_soc_postamble), 5);
+ 
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-				ar9480_common_rx_gain_table_2p0,
+-				ARRAY_SIZE(ar9480_common_rx_gain_table_2p0), 2);
++				ar9462_common_rx_gain_table_2p0,
++				ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
+ 
+ 		INIT_INI_ARRAY(&ah->ini_BTCOEX_MAX_TXPWR,
+-				ar9480_2p0_BTCOEX_MAX_TXPWR_table,
+-				ARRAY_SIZE(ar9480_2p0_BTCOEX_MAX_TXPWR_table),
++				ar9462_2p0_BTCOEX_MAX_TXPWR_table,
++				ARRAY_SIZE(ar9462_2p0_BTCOEX_MAX_TXPWR_table),
+ 				2);
+ 
+ 		/* Awake -> Sleep Setting */
+@@ -380,15 +380,15 @@ static void ar9003_hw_init_mode_regs(str
+ 
+ 		/* Fast clock modal settings */
+ 		INIT_INI_ARRAY(&ah->iniModesAdditional,
+-				ar9480_modes_fast_clock_2p0,
+-				ARRAY_SIZE(ar9480_modes_fast_clock_2p0), 3);
++				ar9462_modes_fast_clock_2p0,
++				ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
+ 
+ 		INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+-				AR9480_BB_CTX_COEFJ(2p0),
+-				ARRAY_SIZE(AR9480_BB_CTX_COEFJ(2p0)), 2);
++				AR9462_BB_CTX_COEFJ(2p0),
++				ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2);
+ 
+-		INIT_INI_ARRAY(&ah->ini_japan2484, AR9480_BBC_TXIFR_COEFFJ,
+-				ARRAY_SIZE(AR9480_BBC_TXIFR_COEFFJ), 2);
++		INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
++				ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
+ 
+ 	} else if (AR_SREV_9580(ah)) {
+ 		/* mac */
+@@ -537,15 +537,15 @@ static void ar9003_tx_gain_table_mode0(s
+ 			ar9580_1p0_lowest_ob_db_tx_gain_table,
+ 			ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
+ 			5);
+-	else if (AR_SREV_9480_10(ah))
++	else if (AR_SREV_9462_10(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesTxGain,
+-			ar9480_modes_low_ob_db_tx_gain_table_1p0,
+-			ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_1p0),
++			ar9462_modes_low_ob_db_tx_gain_table_1p0,
++			ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_1p0),
+ 			5);
+-	else if (AR_SREV_9480_20(ah))
++	else if (AR_SREV_9462_20(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesTxGain,
+-			ar9480_modes_low_ob_db_tx_gain_table_2p0,
+-			ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_2p0),
++			ar9462_modes_low_ob_db_tx_gain_table_2p0,
++			ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0),
+ 			5);
+ 	else
+ 		INIT_INI_ARRAY(&ah->iniModesTxGain,
+@@ -581,15 +581,15 @@ static void ar9003_tx_gain_table_mode1(s
+ 			ar9580_1p0_high_ob_db_tx_gain_table,
+ 			ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
+ 			5);
+-	else if (AR_SREV_9480_10(ah))
++	else if (AR_SREV_9462_10(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesTxGain,
+-			ar9480_modes_high_ob_db_tx_gain_table_1p0,
+-			ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_1p0),
++			ar9462_modes_high_ob_db_tx_gain_table_1p0,
++			ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_1p0),
+ 			5);
+-	else if (AR_SREV_9480_20(ah))
++	else if (AR_SREV_9462_20(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesTxGain,
+-			ar9480_modes_high_ob_db_tx_gain_table_2p0,
+-			ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_2p0),
++			ar9462_modes_high_ob_db_tx_gain_table_2p0,
++			ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0),
+ 			5);
+ 	else
+ 		INIT_INI_ARRAY(&ah->iniModesTxGain,
+@@ -712,15 +712,15 @@ static void ar9003_rx_gain_table_mode0(s
+ 				ar9580_1p0_rx_gain_table,
+ 				ARRAY_SIZE(ar9580_1p0_rx_gain_table),
+ 				2);
+-	else if (AR_SREV_9480_10(ah))
++	else if (AR_SREV_9462_10(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-				ar9480_common_rx_gain_table_1p0,
+-				ARRAY_SIZE(ar9480_common_rx_gain_table_1p0),
++				ar9462_common_rx_gain_table_1p0,
++				ARRAY_SIZE(ar9462_common_rx_gain_table_1p0),
+ 				2);
+-	else if (AR_SREV_9480_20(ah))
++	else if (AR_SREV_9462_20(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-				ar9480_common_rx_gain_table_2p0,
+-				ARRAY_SIZE(ar9480_common_rx_gain_table_2p0),
++				ar9462_common_rx_gain_table_2p0,
++				ARRAY_SIZE(ar9462_common_rx_gain_table_2p0),
+ 				2);
+ 	else
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+@@ -751,15 +751,15 @@ static void ar9003_rx_gain_table_mode1(s
+ 			ar9485Common_wo_xlna_rx_gain_1_1,
+ 			ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
+ 			2);
+-	else if (AR_SREV_9480_10(ah))
++	else if (AR_SREV_9462_10(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-			ar9480_common_wo_xlna_rx_gain_table_1p0,
+-			ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_1p0),
++			ar9462_common_wo_xlna_rx_gain_table_1p0,
++			ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_1p0),
+ 			2);
+-	else if (AR_SREV_9480_20(ah))
++	else if (AR_SREV_9462_20(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-			ar9480_common_wo_xlna_rx_gain_table_2p0,
+-			ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_2p0),
++			ar9462_common_wo_xlna_rx_gain_table_2p0,
++			ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
+ 			2);
+ 	else if (AR_SREV_9580(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+@@ -775,14 +775,14 @@ static void ar9003_rx_gain_table_mode1(s
+ 
+ static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
+ {
+-	if (AR_SREV_9480_10(ah))
++	if (AR_SREV_9462_10(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-			ar9480_common_mixed_rx_gain_table_1p0,
+-			ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_1p0), 2);
+-	else if (AR_SREV_9480_20(ah))
++			ar9462_common_mixed_rx_gain_table_1p0,
++			ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_1p0), 2);
++	else if (AR_SREV_9462_20(ah))
+ 		INIT_INI_ARRAY(&ah->iniModesRxGain,
+-			ar9480_common_mixed_rx_gain_table_2p0,
+-			ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_2p0), 2);
++			ar9462_common_mixed_rx_gain_table_2p0,
++			ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2);
  }
---- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-@@ -652,8 +652,9 @@ static void ar9003_hw_detect_outlier(int
- 			outlier_idx = max_idx;
- 		else
- 			outlier_idx = min_idx;
-+
-+		mp_coeff[outlier_idx] = mp_avg;
+ 
+ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
+--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
+@@ -525,8 +525,8 @@ int ath9k_hw_process_rxdesc_edma(struct 
+ 			rxs->rs_status |= ATH9K_RXERR_DECRYPT;
+ 		else if (rxsp->status11 & AR_MichaelErr)
+ 			rxs->rs_status |= ATH9K_RXERR_MIC;
+-		else if (rxsp->status11 & AR_KeyMiss)
+-			rxs->rs_status |= ATH9K_RXERR_DECRYPT;
++		if (rxsp->status11 & AR_KeyMiss)
++			rxs->rs_status |= ATH9K_RXERR_KEYMISS;
  	}
--	mp_coeff[outlier_idx] = mp_avg;
- }
  
- static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
-@@ -884,6 +885,7 @@ static bool ar9003_hw_init_cal(struct at
- 	if (txiqcal_done)
- 		ar9003_hw_tx_iq_cal_post_proc(ah);
+ 	return 0;
+--- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
+@@ -19,7 +19,6 @@
  
-+	ath9k_hw_loadnf(ah, chan);
- 	ath9k_hw_start_nfcal(ah, true);
+ void ar9003_paprd_enable(struct ath_hw *ah, bool val)
+ {
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	struct ath9k_channel *chan = ah->curchan;
+ 	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ 
+@@ -54,13 +53,7 @@ void ar9003_paprd_enable(struct ath_hw *
+ 
+ 	if (val) {
+ 		ah->paprd_table_write_done = true;
+-
+-		ah->eep_ops->set_txpower(ah, chan,
+-				ath9k_regd_get_ctl(regulatory, chan),
+-				chan->chan->max_antenna_gain * 2,
+-				chan->chan->max_power * 2,
+-				min((u32) MAX_RATE_POWER,
+-				(u32) regulatory->power_limit), false);
++		ath9k_hw_apply_txpower(ah, chan);
+ 	}
  
- 	/* Initialize list pointers */
---- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-@@ -21,6 +21,132 @@ static void ar9003_hw_rx_enable(struct a
- 	REG_WRITE(hw, AR_CR, 0);
+ 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0,
+@@ -207,7 +200,7 @@ static int ar9003_paprd_setup_single_tab
+ 		      AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28);
+ 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1,
+ 		      AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1);
+-	val = AR_SREV_9480(ah) ? 0x91 : 147;
++	val = AR_SREV_9462(ah) ? 0x91 : 147;
+ 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2,
+ 		      AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, val);
+ 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
+@@ -218,7 +211,7 @@ static int ar9003_paprd_setup_single_tab
+ 		      AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7);
+ 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
+ 		      AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1);
+-	if (AR_SREV_9485(ah) || AR_SREV_9480(ah))
++	if (AR_SREV_9485(ah) || AR_SREV_9462(ah))
+ 		REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
+ 			      AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
+ 			      -3);
+@@ -226,7 +219,7 @@ static int ar9003_paprd_setup_single_tab
+ 		REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
+ 			      AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
+ 			      -6);
+-	val = AR_SREV_9480(ah) ? -10 : -15;
++	val = AR_SREV_9462(ah) ? -10 : -15;
+ 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
+ 		      AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE,
+ 		      val);
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -559,7 +559,7 @@ static void ar9003_hw_set_chain_masks(st
+ 
+ 	if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
+ 		REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
+-	else if (AR_SREV_9480(ah))
++	else if (AR_SREV_9462(ah))
+ 		/* xxx only when MCI support is enabled */
+ 		REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
+ 	else
+@@ -631,9 +631,7 @@ static void ar9003_hw_prog_ini(struct at
+ static int ar9003_hw_process_ini(struct ath_hw *ah,
+ 				 struct ath9k_channel *chan)
+ {
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	unsigned int regWrites = 0, i;
+-	struct ieee80211_channel *channel = chan->chan;
+ 	u32 modesIndex;
+ 
+ 	switch (chan->chanmode) {
+@@ -664,7 +662,7 @@ static int ar9003_hw_process_ini(struct 
+ 		ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex);
+ 		ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex);
+ 		ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex);
+-		if (i == ATH_INI_POST && AR_SREV_9480_20(ah))
++		if (i == ATH_INI_POST && AR_SREV_9462_20(ah))
+ 			ar9003_hw_prog_ini(ah,
+ 					   &ah->ini_radio_post_sys2ant,
+ 					   modesIndex);
+@@ -687,20 +685,27 @@ static int ar9003_hw_process_ini(struct 
+ 	if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
+ 		REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
+ 
+-	if (AR_SREV_9480(ah))
++	if (AR_SREV_9462(ah))
+ 		ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1);
+ 
++	ah->modes_index = modesIndex;
+ 	ar9003_hw_override_ini(ah);
+ 	ar9003_hw_set_channel_regs(ah, chan);
+ 	ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
++	ath9k_hw_apply_txpower(ah, chan);
+ 
+-	/* Set TX power */
+-	ah->eep_ops->set_txpower(ah, chan,
+-				 ath9k_regd_get_ctl(regulatory, chan),
+-				 channel->max_antenna_gain * 2,
+-				 channel->max_power * 2,
+-				 min((u32) MAX_RATE_POWER,
+-				 (u32) regulatory->power_limit), false);
++	if (AR_SREV_9462(ah)) {
++		if (REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_0,
++				AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL))
++			ah->enabled_cals |= TX_IQ_CAL;
++		else
++			ah->enabled_cals &= ~TX_IQ_CAL;
++
++		if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
++			ah->enabled_cals |= TX_CL_CAL;
++		else
++			ah->enabled_cals &= ~TX_CL_CAL;
++	}
+ 
+ 	return 0;
+ }
+@@ -1256,6 +1261,73 @@ static void ar9003_hw_antdiv_comb_conf_s
+ 	REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
  }
  
-+static void
-+ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
++static int ar9003_hw_fast_chan_change(struct ath_hw *ah,
++				      struct ath9k_channel *chan,
++				      u8 *ini_reloaded)
 +{
-+	struct ar9003_txc *ads = ds;
-+	int checksum = 0;
-+	u32 val, ctl12, ctl17;
-+
-+	val = (ATHEROS_VENDOR_ID << AR_DescId_S) |
-+	      (1 << AR_TxRxDesc_S) |
-+	      (1 << AR_CtrlStat_S) |
-+	      (i->qcu << AR_TxQcuNum_S) | 0x17;
-+
-+	checksum += val;
-+	ACCESS_ONCE(ads->info) = val;
-+
-+	checksum += i->link;
-+	ACCESS_ONCE(ads->link) = i->link;
-+
-+	checksum += i->buf_addr[0];
-+	ACCESS_ONCE(ads->data0) = i->buf_addr[0];
-+	checksum += i->buf_addr[1];
-+	ACCESS_ONCE(ads->data1) = i->buf_addr[1];
-+	checksum += i->buf_addr[2];
-+	ACCESS_ONCE(ads->data2) = i->buf_addr[2];
-+	checksum += i->buf_addr[3];
-+	ACCESS_ONCE(ads->data3) = i->buf_addr[3];
-+
-+	checksum += (val = (i->buf_len[0] << AR_BufLen_S) & AR_BufLen);
-+	ACCESS_ONCE(ads->ctl3) = val;
-+	checksum += (val = (i->buf_len[1] << AR_BufLen_S) & AR_BufLen);
-+	ACCESS_ONCE(ads->ctl5) = val;
-+	checksum += (val = (i->buf_len[2] << AR_BufLen_S) & AR_BufLen);
-+	ACCESS_ONCE(ads->ctl7) = val;
-+	checksum += (val = (i->buf_len[3] << AR_BufLen_S) & AR_BufLen);
-+	ACCESS_ONCE(ads->ctl9) = val;
-+
-+	checksum = (u16) (((checksum & 0xffff) + (checksum >> 16)) & 0xffff);
-+	ACCESS_ONCE(ads->ctl10) = checksum;
-+
-+	if (i->is_first || i->is_last) {
-+		ACCESS_ONCE(ads->ctl13) = set11nTries(i->rates, 0)
-+			| set11nTries(i->rates, 1)
-+			| set11nTries(i->rates, 2)
-+			| set11nTries(i->rates, 3)
-+			| (i->dur_update ? AR_DurUpdateEna : 0)
-+			| SM(0, AR_BurstDur);
-+
-+		ACCESS_ONCE(ads->ctl14) = set11nRate(i->rates, 0)
-+			| set11nRate(i->rates, 1)
-+			| set11nRate(i->rates, 2)
-+			| set11nRate(i->rates, 3);
-+	} else {
-+		ACCESS_ONCE(ads->ctl13) = 0;
-+		ACCESS_ONCE(ads->ctl14) = 0;
-+	}
++	unsigned int regWrites = 0;
++	u32 modesIndex;
 +
-+	ads->ctl20 = 0;
-+	ads->ctl21 = 0;
-+	ads->ctl22 = 0;
-+
-+	ctl17 = SM(i->keytype, AR_EncrType);
-+	if (!i->is_first) {
-+		ACCESS_ONCE(ads->ctl11) = 0;
-+		ACCESS_ONCE(ads->ctl12) = i->is_last ? 0 : AR_TxMore;
-+		ACCESS_ONCE(ads->ctl15) = 0;
-+		ACCESS_ONCE(ads->ctl16) = 0;
-+		ACCESS_ONCE(ads->ctl17) = ctl17;
-+		ACCESS_ONCE(ads->ctl18) = 0;
-+		ACCESS_ONCE(ads->ctl19) = 0;
-+		return;
-+	}
-+
-+	ACCESS_ONCE(ads->ctl11) = (i->pkt_len & AR_FrameLen)
-+		| (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
-+		| SM(i->txpower, AR_XmitPower)
-+		| (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
-+		| (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
-+		| (i->flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0)
-+		| (i->flags & ATH9K_TXDESC_CLRDMASK ? AR_ClrDestMask : 0)
-+		| (i->flags & ATH9K_TXDESC_RTSENA ? AR_RTSEnable :
-+		   (i->flags & ATH9K_TXDESC_CTSENA ? AR_CTSEnable : 0));
-+
-+	ctl12 = (i->keyix != ATH9K_TXKEYIX_INVALID ?
-+		 SM(i->keyix, AR_DestIdx) : 0)
-+		| SM(i->type, AR_FrameType)
-+		| (i->flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
-+		| (i->flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
-+		| (i->flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
-+
-+	ctl17 |= (i->flags & ATH9K_TXDESC_LDPC ? AR_LDPC : 0);
-+	switch (i->aggr) {
-+	case AGGR_BUF_FIRST:
-+		ctl17 |= SM(i->aggr_len, AR_AggrLen);
-+		/* fall through */
-+	case AGGR_BUF_MIDDLE:
-+		ctl12 |= AR_IsAggr | AR_MoreAggr;
-+		ctl17 |= SM(i->ndelim, AR_PadDelim);
++	switch (chan->chanmode) {
++	case CHANNEL_A:
++	case CHANNEL_A_HT20:
++		modesIndex = 1;
 +		break;
-+	case AGGR_BUF_LAST:
-+		ctl12 |= AR_IsAggr;
++	case CHANNEL_A_HT40PLUS:
++	case CHANNEL_A_HT40MINUS:
++		modesIndex = 2;
 +		break;
-+	case AGGR_BUF_NONE:
++	case CHANNEL_G:
++	case CHANNEL_G_HT20:
++	case CHANNEL_B:
++		modesIndex = 4;
 +		break;
++	case CHANNEL_G_HT40PLUS:
++	case CHANNEL_G_HT40MINUS:
++		modesIndex = 3;
++		break;
++
++	default:
++		return -EINVAL;
++	}
++
++	if (modesIndex == ah->modes_index) {
++		*ini_reloaded = false;
++		goto set_rfmode;
 +	}
 +
-+	val = (i->flags & ATH9K_TXDESC_PAPRD) >> ATH9K_TXDESC_PAPRD_S;
-+	ctl12 |= SM(val, AR_PAPRDChainMask);
++	ar9003_hw_prog_ini(ah, &ah->iniSOC[ATH_INI_POST], modesIndex);
++	ar9003_hw_prog_ini(ah, &ah->iniMac[ATH_INI_POST], modesIndex);
++	ar9003_hw_prog_ini(ah, &ah->iniBB[ATH_INI_POST], modesIndex);
++	ar9003_hw_prog_ini(ah, &ah->iniRadio[ATH_INI_POST], modesIndex);
++	if (AR_SREV_9462_20(ah))
++		ar9003_hw_prog_ini(ah,
++				&ah->ini_radio_post_sys2ant,
++				modesIndex);
++
++	REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
 +
-+	ACCESS_ONCE(ads->ctl12) = ctl12;
-+	ACCESS_ONCE(ads->ctl17) = ctl17;
++	/*
++	 * For 5GHz channels requiring Fast Clock, apply
++	 * different modal values.
++	 */
++	if (IS_CHAN_A_FAST_CLOCK(ah, chan))
++		REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites);
 +
-+	ACCESS_ONCE(ads->ctl15) = set11nPktDurRTSCTS(i->rates, 0)
-+		| set11nPktDurRTSCTS(i->rates, 1);
++	if (AR_SREV_9330(ah))
++		REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
 +
-+	ACCESS_ONCE(ads->ctl16) = set11nPktDurRTSCTS(i->rates, 2)
-+		| set11nPktDurRTSCTS(i->rates, 3);
++	if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
++		REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
 +
-+	ACCESS_ONCE(ads->ctl18) = set11nRateFlags(i->rates, 0)
-+		| set11nRateFlags(i->rates, 1)
-+		| set11nRateFlags(i->rates, 2)
-+		| set11nRateFlags(i->rates, 3)
-+		| SM(i->rtscts_rate, AR_RTSCTSRate);
++	ah->modes_index = modesIndex;
++	*ini_reloaded = true;
 +
-+	ACCESS_ONCE(ads->ctl19) = AR_Not_Sounding;
++set_rfmode:
++	ar9003_hw_set_rfmode(ah, chan);
++	return 0;
 +}
 +
- static u16 ar9003_calc_ptr_chksum(struct ar9003_txc *ads)
- {
- 	int checksum;
-@@ -185,47 +311,6 @@ static bool ar9003_hw_get_isr(struct ath
- 	return true;
- }
- 
--static void ar9003_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen,
--				  bool is_firstseg, bool is_lastseg,
--				  const void *ds0, dma_addr_t buf_addr,
--				  unsigned int qcu)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--	unsigned int descid = 0;
--
--	ads->info = (ATHEROS_VENDOR_ID << AR_DescId_S) |
--				     (1 << AR_TxRxDesc_S) |
--				     (1 << AR_CtrlStat_S) |
--				     (qcu << AR_TxQcuNum_S) | 0x17;
--
--	ads->data0 = buf_addr;
--	ads->data1 = 0;
--	ads->data2 = 0;
--	ads->data3 = 0;
--
--	ads->ctl3 = (seglen << AR_BufLen_S);
--	ads->ctl3 &= AR_BufLen;
--
--	/* Fill in pointer checksum and descriptor id */
--	ads->ctl10 = ar9003_calc_ptr_chksum(ads);
--	ads->ctl10 |= (descid << AR_TxDescId_S);
--
--	if (is_firstseg) {
--		ads->ctl12 |= (is_lastseg ? 0 : AR_TxMore);
--	} else if (is_lastseg) {
--		ads->ctl11 = 0;
--		ads->ctl12 = 0;
--		ads->ctl13 = AR9003TXC_CONST(ds0)->ctl13;
--		ads->ctl14 = AR9003TXC_CONST(ds0)->ctl14;
--	} else {
--		/* XXX Intermediate descriptor in a multi-descriptor frame.*/
--		ads->ctl11 = 0;
--		ads->ctl12 = AR_TxMore;
--		ads->ctl13 = 0;
--		ads->ctl14 = 0;
--	}
--}
--
- static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
- 				 struct ath_tx_status *ts)
+ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
  {
-@@ -310,161 +395,6 @@ static int ar9003_hw_proc_txdesc(struct 
- 	return 0;
- }
+ 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
+@@ -1284,6 +1356,7 @@ void ar9003_hw_attach_phy_ops(struct ath
+ 	priv_ops->do_getnf = ar9003_hw_do_getnf;
+ 	priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
+ 	priv_ops->set_radar_params = ar9003_hw_set_radar_params;
++	priv_ops->fast_chan_change = ar9003_hw_fast_chan_change;
+ 
+ 	ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
+ 	ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+@@ -325,10 +325,10 @@
+ 
+ #define AR_PHY_RX_OCGAIN        (AR_AGC_BASE + 0x200)
+ 
+-#define AR_PHY_CCA_NOM_VAL_9300_2GHZ          -110
+-#define AR_PHY_CCA_NOM_VAL_9300_5GHZ          -115
+-#define AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ     -125
+-#define AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ     -125
++#define AR_PHY_CCA_NOM_VAL_9300_2GHZ          (AR_SREV_9462(ah) ? -127 : -110)
++#define AR_PHY_CCA_NOM_VAL_9300_5GHZ          (AR_SREV_9462(ah) ? -127 : -115)
++#define AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ     (AR_SREV_9462(ah) ? -127 : -125)
++#define AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ     (AR_SREV_9462(ah) ? -127 : -125)
+ #define AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ     -95
+ #define AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ     -100
+ 
+@@ -572,6 +572,8 @@
+ 
+ #define AR_PHY_TXGAIN_TABLE      (AR_SM_BASE + 0x300)
+ 
++#define AR_PHY_TX_IQCAL_CONTROL_0   (AR_SM_BASE + AR_SREV_9485(ah) ? \
++						 0x3c4 : 0x444)
+ #define AR_PHY_TX_IQCAL_CONTROL_1   (AR_SM_BASE + AR_SREV_9485(ah) ? \
+ 						 0x3c8 : 0x448)
+ #define AR_PHY_TX_IQCAL_START       (AR_SM_BASE + AR_SREV_9485(ah) ? \
+@@ -582,8 +584,6 @@
+ 					     (AR_SREV_9485(ah) ? \
+ 					      0x3d0 : 0x450) + ((_i) << 2))
+ #define AR_PHY_RTT_CTRL			(AR_SM_BASE + 0x380)
+-#define AR_PHY_RTT_TABLE_SW_INTF_B	(AR_SM_BASE + 0x384)
+-#define AR_PHY_RTT_TABLE_SW_INTF_1_B0	(AR_SM_BASE + 0x388)
+ 
+ #define AR_PHY_WATCHDOG_STATUS      (AR_SM_BASE + 0x5c0)
+ #define AR_PHY_WATCHDOG_CTL_1       (AR_SM_BASE + 0x5c4)
+@@ -608,9 +608,9 @@
+ #define AR_PHY_AIC_CTRL_1_B0	(AR_SM_BASE + 0x4b4)
+ #define AR_PHY_AIC_CTRL_2_B0	(AR_SM_BASE + 0x4b8)
+ #define AR_PHY_AIC_CTRL_3_B0	(AR_SM_BASE + 0x4bc)
+-#define AR_PHY_AIC_STAT_0_B0	(AR_SM_BASE + (AR_SREV_9480_10(ah) ? \
++#define AR_PHY_AIC_STAT_0_B0	(AR_SM_BASE + (AR_SREV_9462_10(ah) ? \
+ 					0x4c0 : 0x4c4))
+-#define AR_PHY_AIC_STAT_1_B0	(AR_SM_BASE + (AR_SREV_9480_10(ah) ? \
++#define AR_PHY_AIC_STAT_1_B0	(AR_SM_BASE + (AR_SREV_9462_10(ah) ? \
+ 					0x4c4 : 0x4c8))
+ #define AR_PHY_AIC_CTRL_4_B0	(AR_SM_BASE + 0x4c0)
+ #define AR_PHY_AIC_STAT_2_B0	(AR_SM_BASE + 0x4cc)
+@@ -625,7 +625,7 @@
+ #define AR_PHY_65NM_CH0_RXTX4       0x1610c
+ 
+ #define AR_CH0_TOP	(AR_SREV_9300(ah) ? 0x16288 : \
+-				((AR_SREV_9480(ah) ? 0x1628c : 0x16280)))
++				((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
+ #define AR_CH0_TOP_XPABIASLVL (0x300)
+ #define AR_CH0_TOP_XPABIASLVL_S (8)
+ 
+@@ -638,8 +638,8 @@
+ 
+ #define AR_SWITCH_TABLE_COM_ALL (0xffff)
+ #define AR_SWITCH_TABLE_COM_ALL_S (0)
+-#define AR_SWITCH_TABLE_COM_AR9480_ALL (0xffffff)
+-#define AR_SWITCH_TABLE_COM_AR9480_ALL_S (0)
++#define AR_SWITCH_TABLE_COM_AR9462_ALL (0xffffff)
++#define AR_SWITCH_TABLE_COM_AR9462_ALL_S (0)
+ #define AR_SWITCH_TABLE_COM_SPDT (0x00f00000)
+ #define AR_SWITCH_TABLE_COM_SPDT_ALL (0x0000fff0)
+ #define AR_SWITCH_TABLE_COM_SPDT_ALL_S (4)
+@@ -679,11 +679,11 @@
+ #define AR_CH0_XTAL_CAPOUTDAC	0x00fe0000
+ #define AR_CH0_XTAL_CAPOUTDAC_S	17
+ 
+-#define AR_PHY_PMU1		(AR_SREV_9480(ah) ? 0x16340 : 0x16c40)
++#define AR_PHY_PMU1		(AR_SREV_9462(ah) ? 0x16340 : 0x16c40)
+ #define AR_PHY_PMU1_PWD		0x1
+ #define AR_PHY_PMU1_PWD_S	0
+ 
+-#define AR_PHY_PMU2		(AR_SREV_9480(ah) ? 0x16344 : 0x16c44)
++#define AR_PHY_PMU2		(AR_SREV_9462(ah) ? 0x16344 : 0x16c44)
+ #define AR_PHY_PMU2_PGM		0x00200000
+ #define AR_PHY_PMU2_PGM_S	21
+ 
+@@ -823,6 +823,22 @@
+ #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT   0x01000000
+ #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24
+ #define AR_PHY_CHANNEL_STATUS_RX_CLEAR      0x00000004
++#define AR_PHY_RTT_CTRL_ENA_RADIO_RETENTION     0x00000001
++#define AR_PHY_RTT_CTRL_ENA_RADIO_RETENTION_S   0
++#define AR_PHY_RTT_CTRL_RESTORE_MASK            0x0000007E
++#define AR_PHY_RTT_CTRL_RESTORE_MASK_S          1
++#define AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE     0x00000080
++#define AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE_S   7
++#define AR_PHY_RTT_SW_RTT_TABLE_ACCESS          0x00000001
++#define AR_PHY_RTT_SW_RTT_TABLE_ACCESS_S        0
++#define AR_PHY_RTT_SW_RTT_TABLE_WRITE           0x00000002
++#define AR_PHY_RTT_SW_RTT_TABLE_WRITE_S         1
++#define AR_PHY_RTT_SW_RTT_TABLE_ADDR            0x0000001C
++#define AR_PHY_RTT_SW_RTT_TABLE_ADDR_S          2
++#define AR_PHY_RTT_SW_RTT_TABLE_DATA            0xFFFFFFF0
++#define AR_PHY_RTT_SW_RTT_TABLE_DATA_S          4
++#define AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL                   0x80000000
++#define AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL_S                         31
+ #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT             0x01fc0000
+ #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S                   18
+ #define AR_PHY_TX_IQCAL_START_DO_CAL	    0x00000001
+@@ -905,9 +921,9 @@
+ #define AR_PHY_AIC_CTRL_0_B1	(AR_SM1_BASE + 0x4b0)
+ #define AR_PHY_AIC_CTRL_1_B1	(AR_SM1_BASE + 0x4b4)
+ #define AR_PHY_AIC_CTRL_2_B1	(AR_SM1_BASE + 0x4b8)
+-#define AR_PHY_AIC_STAT_0_B1	(AR_SM1_BASE + (AR_SREV_9480_10(ah) ? \
++#define AR_PHY_AIC_STAT_0_B1	(AR_SM1_BASE + (AR_SREV_9462_10(ah) ? \
+ 					0x4c0 : 0x4c4))
+-#define AR_PHY_AIC_STAT_1_B1	(AR_SM1_BASE + (AR_SREV_9480_10(ah) ? \
++#define AR_PHY_AIC_STAT_1_B1	(AR_SM1_BASE + (AR_SREV_9462_10(ah) ? \
+ 					0x4c4 : 0x4c8))
+ #define AR_PHY_AIC_CTRL_4_B1	(AR_SM1_BASE + 0x4c0)
+ #define AR_PHY_AIC_STAT_2_B1	(AR_SM1_BASE + 0x4cc)
+@@ -915,6 +931,10 @@
+ #define AR_PHY_AIC_SRAM_ADDR_B1	(AR_SM1_BASE + 0x5f0)
+ #define AR_PHY_AIC_SRAM_DATA_B1	(AR_SM1_BASE + 0x5f4)
+ 
++#define AR_PHY_RTT_TABLE_SW_INTF_B(i)	(0x384 + (i) ? \
++					AR_SM1_BASE : AR_SM_BASE)
++#define AR_PHY_RTT_TABLE_SW_INTF_1_B(i)	(0x388 + (i) ? \
++					AR_SM1_BASE : AR_SM_BASE)
+ /*
+  * Channel 2 Register Map
+  */
+@@ -981,7 +1001,7 @@
+ #define AR_GLB_BASE	0x20000
+ #define AR_PHY_GLB_CONTROL	(AR_GLB_BASE + 0x44)
+ #define AR_GLB_SCRATCH(_ah)	(AR_GLB_BASE + \
+-					(AR_SREV_9480_20(_ah) ? 0x4c : 0x50))
++					(AR_SREV_9462_20(_ah) ? 0x4c : 0x50))
+ #define AR_GLB_STATUS		(AR_GLB_BASE + 0x48)
  
--static void ar9003_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
--		u32 pktlen, enum ath9k_pkt_type type, u32 txpower,
--		u8 keyIx, enum ath9k_key_type keyType, u32 flags)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
--	if (txpower > ah->txpower_limit)
--		txpower = ah->txpower_limit;
--
--	if (txpower > 63)
--		txpower = 63;
--
--	ads->ctl11 = (pktlen & AR_FrameLen)
--		| (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
--		| SM(txpower, AR_XmitPower)
--		| (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
--		| (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
--		| (flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0);
--
--	ads->ctl12 =
--		(keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
--		| SM(type, AR_FrameType)
--		| (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
--		| (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
--		| (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
--
--	ads->ctl17 = SM(keyType, AR_EncrType) |
--		     (flags & ATH9K_TXDESC_LDPC ? AR_LDPC : 0);
--	ads->ctl18 = 0;
--	ads->ctl19 = AR_Not_Sounding;
--
--	ads->ctl20 = 0;
--	ads->ctl21 = 0;
--	ads->ctl22 = 0;
--}
--
--static void ar9003_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
--	if (val)
--		ads->ctl11 |= AR_ClrDestMask;
--	else
--		ads->ctl11 &= ~AR_ClrDestMask;
--}
--
--static void ar9003_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
--					  void *lastds,
--					  u32 durUpdateEn, u32 rtsctsRate,
--					  u32 rtsctsDuration,
--					  struct ath9k_11n_rate_series series[],
--					  u32 nseries, u32 flags)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--	struct ar9003_txc *last_ads = (struct ar9003_txc *) lastds;
--	u_int32_t ctl11;
--
--	if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
--		ctl11 = ads->ctl11;
--
--		if (flags & ATH9K_TXDESC_RTSENA) {
--			ctl11 &= ~AR_CTSEnable;
--			ctl11 |= AR_RTSEnable;
--		} else {
--			ctl11 &= ~AR_RTSEnable;
--			ctl11 |= AR_CTSEnable;
--		}
--
--		ads->ctl11 = ctl11;
--	} else {
--		ads->ctl11 = (ads->ctl11 & ~(AR_RTSEnable | AR_CTSEnable));
--	}
--
--	ads->ctl13 = set11nTries(series, 0)
--		|  set11nTries(series, 1)
--		|  set11nTries(series, 2)
--		|  set11nTries(series, 3)
--		|  (durUpdateEn ? AR_DurUpdateEna : 0)
--		|  SM(0, AR_BurstDur);
--
--	ads->ctl14 = set11nRate(series, 0)
--		|  set11nRate(series, 1)
--		|  set11nRate(series, 2)
--		|  set11nRate(series, 3);
--
--	ads->ctl15 = set11nPktDurRTSCTS(series, 0)
--		|  set11nPktDurRTSCTS(series, 1);
--
--	ads->ctl16 = set11nPktDurRTSCTS(series, 2)
--		|  set11nPktDurRTSCTS(series, 3);
--
--	ads->ctl18 = set11nRateFlags(series, 0)
--		|  set11nRateFlags(series, 1)
--		|  set11nRateFlags(series, 2)
--		|  set11nRateFlags(series, 3)
--		| SM(rtsctsRate, AR_RTSCTSRate);
--	ads->ctl19 = AR_Not_Sounding;
--
--	last_ads->ctl13 = ads->ctl13;
--	last_ads->ctl14 = ads->ctl14;
--}
--
--static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
--					u32 aggrLen)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
--	ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
--
--	ads->ctl17 &= ~AR_AggrLen;
--	ads->ctl17 |= SM(aggrLen, AR_AggrLen);
--}
--
--static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
--					 u32 numDelims)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--	unsigned int ctl17;
--
--	ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
--
--	/*
--	 * We use a stack variable to manipulate ctl6 to reduce uncached
--	 * read modify, modfiy, write.
--	 */
--	ctl17 = ads->ctl17;
--	ctl17 &= ~AR_PadDelim;
--	ctl17 |= SM(numDelims, AR_PadDelim);
--	ads->ctl17 = ctl17;
--}
--
--static void ar9003_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
--	ads->ctl12 |= AR_IsAggr;
--	ads->ctl12 &= ~AR_MoreAggr;
--	ads->ctl17 &= ~AR_PadDelim;
--}
--
--static void ar9003_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
--{
--	struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
--	ads->ctl12 &= (~AR_IsAggr & ~AR_MoreAggr);
--}
--
--void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains)
--{
--	struct ar9003_txc *ads = ds;
+ /*
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9003_rtt.c
+@@ -0,0 +1,153 @@
++/*
++ * Copyright (c) 2010-2011 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#include "hw.h"
++#include "ar9003_phy.h"
++
++#define RTT_RESTORE_TIMEOUT          1000
++#define RTT_ACCESS_TIMEOUT           100
++#define RTT_BAD_VALUE                0x0bad0bad
++
++/*
++ * RTT (Radio Retention Table) hardware implementation information
++ *
++ * There is an internal table (i.e. the rtt) for each chain (or bank).
++ * Each table contains 6 entries and each entry is corresponding to
++ * a specific calibration parameter as depicted below.
++ *  0~2 - DC offset DAC calibration: loop, low, high (offsetI/Q_...)
++ *  3   - Filter cal (filterfc)
++ *  4   - RX gain settings
++ *  5   - Peak detector offset calibration (agc_caldac)
++ */
++
++void ar9003_hw_rtt_enable(struct ath_hw *ah)
++{
++	REG_WRITE(ah, AR_PHY_RTT_CTRL, 1);
++}
++
++void ar9003_hw_rtt_disable(struct ath_hw *ah)
++{
++	REG_WRITE(ah, AR_PHY_RTT_CTRL, 0);
++}
++
++void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask)
++{
++	REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
++		      AR_PHY_RTT_CTRL_RESTORE_MASK, rtt_mask);
++}
++
++bool ar9003_hw_rtt_force_restore(struct ath_hw *ah)
++{
++	if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
++			   AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE,
++			   0, RTT_RESTORE_TIMEOUT))
++		return false;
++
++	REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
++		      AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE, 1);
++
++	if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
++			   AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE,
++			   0, RTT_RESTORE_TIMEOUT))
++		return false;
++
++	return true;
++}
++
++static void ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain,
++		u32 index, u32 data28)
++{
++	u32 val;
++
++	val = SM(data28, AR_PHY_RTT_SW_RTT_TABLE_DATA);
++	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain), val);
++
++	val = SM(0, AR_PHY_RTT_SW_RTT_TABLE_ACCESS) |
++	      SM(1, AR_PHY_RTT_SW_RTT_TABLE_WRITE) |
++	      SM(index, AR_PHY_RTT_SW_RTT_TABLE_ADDR);
++	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
++	udelay(1);
++
++	val |= SM(1, AR_PHY_RTT_SW_RTT_TABLE_ACCESS);
++	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
++	udelay(1);
++
++	if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
++			   AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0,
++			   RTT_ACCESS_TIMEOUT))
++		return;
++
++	val &= ~SM(1, AR_PHY_RTT_SW_RTT_TABLE_WRITE);
++	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
++	udelay(1);
++
++	ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
++		      AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0,
++		      RTT_ACCESS_TIMEOUT);
++}
++
++void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table)
++{
++	int i;
++
++	for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++)
++		ar9003_hw_rtt_load_hist_entry(ah, chain, i, table[i]);
++}
++
++static int ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index)
++{
++	u32 val;
++
++	val = SM(0, AR_PHY_RTT_SW_RTT_TABLE_ACCESS) |
++	      SM(0, AR_PHY_RTT_SW_RTT_TABLE_WRITE) |
++	      SM(index, AR_PHY_RTT_SW_RTT_TABLE_ADDR);
++
++	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
++	udelay(1);
++
++	val |= SM(1, AR_PHY_RTT_SW_RTT_TABLE_ACCESS);
++	REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
++	udelay(1);
++
++	if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
++			   AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0,
++			   RTT_ACCESS_TIMEOUT))
++		return RTT_BAD_VALUE;
++
++	val = REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain));
++
++	return val;
++}
++
++void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table)
++{
++	int i;
++
++	for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++)
++		table[i] = ar9003_hw_rtt_fill_hist_entry(ah, chain, i);
++}
++
++void ar9003_hw_rtt_clear_hist(struct ath_hw *ah)
++{
++	int i, j;
++
++	for (i = 0; i < AR9300_MAX_CHAINS; i++) {
++		if (!(ah->rxchainmask & (1 << i)))
++			continue;
++		for (j = 0; j < MAX_RTT_TABLE_ENTRY; j++)
++			ar9003_hw_rtt_load_hist_entry(ah, i, j, 0);
++	}
++}
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9003_rtt.h
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (c) 2010-2011 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef AR9003_RTT_H
++#define AR9003_RTT_H
++
++void ar9003_hw_rtt_enable(struct ath_hw *ah);
++void ar9003_hw_rtt_disable(struct ath_hw *ah);
++void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask);
++bool ar9003_hw_rtt_force_restore(struct ath_hw *ah);
++void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table);
++void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table);
++void ar9003_hw_rtt_clear_hist(struct ath_hw *ah);
++
++#endif
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9462_1p0_initvals.h
+@@ -0,0 +1,1833 @@
++/*
++ * Copyright (c) 2010 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef INITVALS_9462_1P0_H
++#define INITVALS_9462_1P0_H
++
++/* AR9462 1.0 */
++
++static const u32 ar9462_1p0_mac_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00000008, 0x00000000},
++	{0x00000030, 0x00060085},
++	{0x00000034, 0x00000005},
++	{0x00000040, 0x00000000},
++	{0x00000044, 0x00000000},
++	{0x00000048, 0x00000008},
++	{0x0000004c, 0x00000010},
++	{0x00000050, 0x00000000},
++	{0x00001040, 0x002ffc0f},
++	{0x00001044, 0x002ffc0f},
++	{0x00001048, 0x002ffc0f},
++	{0x0000104c, 0x002ffc0f},
++	{0x00001050, 0x002ffc0f},
++	{0x00001054, 0x002ffc0f},
++	{0x00001058, 0x002ffc0f},
++	{0x0000105c, 0x002ffc0f},
++	{0x00001060, 0x002ffc0f},
++	{0x00001064, 0x002ffc0f},
++	{0x000010f0, 0x00000100},
++	{0x00001270, 0x00000000},
++	{0x000012b0, 0x00000000},
++	{0x000012f0, 0x00000000},
++	{0x0000143c, 0x00000000},
++	{0x0000147c, 0x00000000},
++	{0x00001810, 0x0f000003},
++	{0x00008000, 0x00000000},
++	{0x00008004, 0x00000000},
++	{0x00008008, 0x00000000},
++	{0x0000800c, 0x00000000},
++	{0x00008018, 0x00000000},
++	{0x00008020, 0x00000000},
++	{0x00008038, 0x00000000},
++	{0x0000803c, 0x00080000},
++	{0x00008040, 0x00000000},
++	{0x00008044, 0x00000000},
++	{0x00008048, 0x00000000},
++	{0x0000804c, 0xffffffff},
++	{0x00008050, 0xffffffff},
++	{0x00008054, 0x00000000},
++	{0x00008058, 0x00000000},
++	{0x0000805c, 0x000fc78f},
++	{0x00008060, 0x0000000f},
++	{0x00008064, 0x00000000},
++	{0x00008070, 0x00000310},
++	{0x00008074, 0x00000020},
++	{0x00008078, 0x00000000},
++	{0x0000809c, 0x0000000f},
++	{0x000080a0, 0x00000000},
++	{0x000080a4, 0x02ff0000},
++	{0x000080a8, 0x0e070605},
++	{0x000080ac, 0x0000000d},
++	{0x000080b0, 0x00000000},
++	{0x000080b4, 0x00000000},
++	{0x000080b8, 0x00000000},
++	{0x000080bc, 0x00000000},
++	{0x000080c0, 0x2a800000},
++	{0x000080c4, 0x06900168},
++	{0x000080c8, 0x13881c20},
++	{0x000080cc, 0x01f40000},
++	{0x000080d0, 0x00252500},
++	{0x000080d4, 0x00a00005},
++	{0x000080d8, 0x00400002},
++	{0x000080dc, 0x00000000},
++	{0x000080e0, 0xffffffff},
++	{0x000080e4, 0x0000ffff},
++	{0x000080e8, 0x3f3f3f3f},
++	{0x000080ec, 0x00000000},
++	{0x000080f0, 0x00000000},
++	{0x000080f4, 0x00000000},
++	{0x000080fc, 0x00020000},
++	{0x00008100, 0x00000000},
++	{0x00008108, 0x00000052},
++	{0x0000810c, 0x00000000},
++	{0x00008110, 0x00000000},
++	{0x00008114, 0x000007ff},
++	{0x00008118, 0x000000aa},
++	{0x0000811c, 0x00003210},
++	{0x00008124, 0x00000000},
++	{0x00008128, 0x00000000},
++	{0x0000812c, 0x00000000},
++	{0x00008130, 0x00000000},
++	{0x00008134, 0x00000000},
++	{0x00008138, 0x00000000},
++	{0x0000813c, 0x0000ffff},
++	{0x00008144, 0xffffffff},
++	{0x00008168, 0x00000000},
++	{0x0000816c, 0x00000000},
++	{0x00008170, 0x18486e00},
++	{0x00008174, 0x33332210},
++	{0x00008178, 0x00000000},
++	{0x0000817c, 0x00020000},
++	{0x000081c4, 0x33332210},
++	{0x000081c8, 0x00000000},
++	{0x000081cc, 0x00000000},
++	{0x000081d4, 0x00000000},
++	{0x000081ec, 0x00000000},
++	{0x000081f0, 0x00000000},
++	{0x000081f4, 0x00000000},
++	{0x000081f8, 0x00000000},
++	{0x000081fc, 0x00000000},
++	{0x00008240, 0x00100000},
++	{0x00008244, 0x0010f400},
++	{0x00008248, 0x00000800},
++	{0x0000824c, 0x0001e800},
++	{0x00008250, 0x00000000},
++	{0x00008254, 0x00000000},
++	{0x00008258, 0x00000000},
++	{0x0000825c, 0x40000000},
++	{0x00008260, 0x00080922},
++	{0x00008264, 0x99c00010},
++	{0x00008268, 0xffffffff},
++	{0x0000826c, 0x0000ffff},
++	{0x00008270, 0x00000000},
++	{0x00008274, 0x40000000},
++	{0x00008278, 0x003e4180},
++	{0x0000827c, 0x00000004},
++	{0x00008284, 0x0000002c},
++	{0x00008288, 0x0000002c},
++	{0x0000828c, 0x000000ff},
++	{0x00008294, 0x00000000},
++	{0x00008298, 0x00000000},
++	{0x0000829c, 0x00000000},
++	{0x00008300, 0x00000140},
++	{0x00008314, 0x00000000},
++	{0x0000831c, 0x0000010d},
++	{0x00008328, 0x00000000},
++	{0x0000832c, 0x0000001f},
++	{0x00008330, 0x00000302},
++	{0x00008334, 0x00000700},
++	{0x00008338, 0xffff0000},
++	{0x0000833c, 0x02400000},
++	{0x00008340, 0x000107ff},
++	{0x00008344, 0xaa48105b},
++	{0x00008348, 0x008f0000},
++	{0x0000835c, 0x00000000},
++	{0x00008360, 0xffffffff},
++	{0x00008364, 0xffffffff},
++	{0x00008368, 0x00000000},
++	{0x00008370, 0x00000000},
++	{0x00008374, 0x000000ff},
++	{0x00008378, 0x00000000},
++	{0x0000837c, 0x00000000},
++	{0x00008380, 0xffffffff},
++	{0x00008384, 0xffffffff},
++	{0x00008390, 0xffffffff},
++	{0x00008394, 0xffffffff},
++	{0x00008398, 0x00000000},
++	{0x0000839c, 0x00000000},
++	{0x000083a4, 0x0000fa14},
++	{0x000083a8, 0x000f0c00},
++	{0x000083ac, 0x33332210},
++	{0x000083b0, 0x33332210},
++	{0x000083b4, 0x33332210},
++	{0x000083b8, 0x33332210},
++	{0x000083bc, 0x00000000},
++	{0x000083c0, 0x00000000},
++	{0x000083c4, 0x00000000},
++	{0x000083c8, 0x00000000},
++	{0x000083cc, 0x00000200},
++	{0x000083d0, 0x000301ff},
++};
++
++static const u32 ar9462_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a398, 0x00000000},
++	{0x0000a39c, 0x6f7f0301},
++	{0x0000a3a0, 0xca9228ee},
++};
++
++static const u32 ar9462_1p0_sys3ant[][2] = {
++	/* Addr      allmodes  */
++	{0x00063280, 0x00040807},
++	{0x00063284, 0x104ccccc},
++};
++
++static const u32 ar9462_pcie_phy_clkreq_enable_L1_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x00018c00, 0x10053e5e},
++	{0x00018c04, 0x000801d8},
++	{0x00018c08, 0x0000580c},
++};
++
++static const u32 ar9462_1p0_mac_core_emulation[][2] = {
++	/* Addr      allmodes  */
++	{0x00000030, 0x00060085},
++	{0x00000044, 0x00000008},
++	{0x0000805c, 0xffffc7ff},
++	{0x00008344, 0xaa4a105b},
++};
++
++static const u32 ar9462_common_rx_gain_table_ar9280_2p0_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x02000101},
++	{0x0000a004, 0x02000102},
++	{0x0000a008, 0x02000103},
++	{0x0000a00c, 0x02000104},
++	{0x0000a010, 0x02000200},
++	{0x0000a014, 0x02000201},
++	{0x0000a018, 0x02000202},
++	{0x0000a01c, 0x02000203},
++	{0x0000a020, 0x02000204},
++	{0x0000a024, 0x02000205},
++	{0x0000a028, 0x02000208},
++	{0x0000a02c, 0x02000302},
++	{0x0000a030, 0x02000303},
++	{0x0000a034, 0x02000304},
++	{0x0000a038, 0x02000400},
++	{0x0000a03c, 0x02010300},
++	{0x0000a040, 0x02010301},
++	{0x0000a044, 0x02010302},
++	{0x0000a048, 0x02000500},
++	{0x0000a04c, 0x02010400},
++	{0x0000a050, 0x02020300},
++	{0x0000a054, 0x02020301},
++	{0x0000a058, 0x02020302},
++	{0x0000a05c, 0x02020303},
++	{0x0000a060, 0x02020400},
++	{0x0000a064, 0x02030300},
++	{0x0000a068, 0x02030301},
++	{0x0000a06c, 0x02030302},
++	{0x0000a070, 0x02030303},
++	{0x0000a074, 0x02030400},
++	{0x0000a078, 0x02040300},
++	{0x0000a07c, 0x02040301},
++	{0x0000a080, 0x02040302},
++	{0x0000a084, 0x02040303},
++	{0x0000a088, 0x02030500},
++	{0x0000a08c, 0x02040400},
++	{0x0000a090, 0x02050203},
++	{0x0000a094, 0x02050204},
++	{0x0000a098, 0x02050205},
++	{0x0000a09c, 0x02040500},
++	{0x0000a0a0, 0x02050301},
++	{0x0000a0a4, 0x02050302},
++	{0x0000a0a8, 0x02050303},
++	{0x0000a0ac, 0x02050400},
++	{0x0000a0b0, 0x02050401},
++	{0x0000a0b4, 0x02050402},
++	{0x0000a0b8, 0x02050403},
++	{0x0000a0bc, 0x02050500},
++	{0x0000a0c0, 0x02050501},
++	{0x0000a0c4, 0x02050502},
++	{0x0000a0c8, 0x02050503},
++	{0x0000a0cc, 0x02050504},
++	{0x0000a0d0, 0x02050600},
++	{0x0000a0d4, 0x02050601},
++	{0x0000a0d8, 0x02050602},
++	{0x0000a0dc, 0x02050603},
++	{0x0000a0e0, 0x02050604},
++	{0x0000a0e4, 0x02050700},
++	{0x0000a0e8, 0x02050701},
++	{0x0000a0ec, 0x02050702},
++	{0x0000a0f0, 0x02050703},
++	{0x0000a0f4, 0x02050704},
++	{0x0000a0f8, 0x02050705},
++	{0x0000a0fc, 0x02050708},
++	{0x0000a100, 0x02050709},
++	{0x0000a104, 0x0205070a},
++	{0x0000a108, 0x0205070b},
++	{0x0000a10c, 0x0205070c},
++	{0x0000a110, 0x0205070d},
++	{0x0000a114, 0x02050710},
++	{0x0000a118, 0x02050711},
++	{0x0000a11c, 0x02050712},
++	{0x0000a120, 0x02050713},
++	{0x0000a124, 0x02050714},
++	{0x0000a128, 0x02050715},
++	{0x0000a12c, 0x02050730},
++	{0x0000a130, 0x02050731},
++	{0x0000a134, 0x02050732},
++	{0x0000a138, 0x02050733},
++	{0x0000a13c, 0x02050734},
++	{0x0000a140, 0x02050735},
++	{0x0000a144, 0x02050750},
++	{0x0000a148, 0x02050751},
++	{0x0000a14c, 0x02050752},
++	{0x0000a150, 0x02050753},
++	{0x0000a154, 0x02050754},
++	{0x0000a158, 0x02050755},
++	{0x0000a15c, 0x02050770},
++	{0x0000a160, 0x02050771},
++	{0x0000a164, 0x02050772},
++	{0x0000a168, 0x02050773},
++	{0x0000a16c, 0x02050774},
++	{0x0000a170, 0x02050775},
++	{0x0000a174, 0x00000776},
++	{0x0000a178, 0x00000776},
++	{0x0000a17c, 0x00000776},
++	{0x0000a180, 0x00000776},
++	{0x0000a184, 0x00000776},
++	{0x0000a188, 0x00000776},
++	{0x0000a18c, 0x00000776},
++	{0x0000a190, 0x00000776},
++	{0x0000a194, 0x00000776},
++	{0x0000a198, 0x00000776},
++	{0x0000a19c, 0x00000776},
++	{0x0000a1a0, 0x00000776},
++	{0x0000a1a4, 0x00000776},
++	{0x0000a1a8, 0x00000776},
++	{0x0000a1ac, 0x00000776},
++	{0x0000a1b0, 0x00000776},
++	{0x0000a1b4, 0x00000776},
++	{0x0000a1b8, 0x00000776},
++	{0x0000a1bc, 0x00000776},
++	{0x0000a1c0, 0x00000776},
++	{0x0000a1c4, 0x00000776},
++	{0x0000a1c8, 0x00000776},
++	{0x0000a1cc, 0x00000776},
++	{0x0000a1d0, 0x00000776},
++	{0x0000a1d4, 0x00000776},
++	{0x0000a1d8, 0x00000776},
++	{0x0000a1dc, 0x00000776},
++	{0x0000a1e0, 0x00000776},
++	{0x0000a1e4, 0x00000776},
++	{0x0000a1e8, 0x00000776},
++	{0x0000a1ec, 0x00000776},
++	{0x0000a1f0, 0x00000776},
++	{0x0000a1f4, 0x00000776},
++	{0x0000a1f8, 0x00000776},
++	{0x0000a1fc, 0x00000776},
++	{0x0000b000, 0x02000101},
++	{0x0000b004, 0x02000102},
++	{0x0000b008, 0x02000103},
++	{0x0000b00c, 0x02000104},
++	{0x0000b010, 0x02000200},
++	{0x0000b014, 0x02000201},
++	{0x0000b018, 0x02000202},
++	{0x0000b01c, 0x02000203},
++	{0x0000b020, 0x02000204},
++	{0x0000b024, 0x02000205},
++	{0x0000b028, 0x02000208},
++	{0x0000b02c, 0x02000302},
++	{0x0000b030, 0x02000303},
++	{0x0000b034, 0x02000304},
++	{0x0000b038, 0x02000400},
++	{0x0000b03c, 0x02010300},
++	{0x0000b040, 0x02010301},
++	{0x0000b044, 0x02010302},
++	{0x0000b048, 0x02000500},
++	{0x0000b04c, 0x02010400},
++	{0x0000b050, 0x02020300},
++	{0x0000b054, 0x02020301},
++	{0x0000b058, 0x02020302},
++	{0x0000b05c, 0x02020303},
++	{0x0000b060, 0x02020400},
++	{0x0000b064, 0x02030300},
++	{0x0000b068, 0x02030301},
++	{0x0000b06c, 0x02030302},
++	{0x0000b070, 0x02030303},
++	{0x0000b074, 0x02030400},
++	{0x0000b078, 0x02040300},
++	{0x0000b07c, 0x02040301},
++	{0x0000b080, 0x02040302},
++	{0x0000b084, 0x02040303},
++	{0x0000b088, 0x02030500},
++	{0x0000b08c, 0x02040400},
++	{0x0000b090, 0x02050203},
++	{0x0000b094, 0x02050204},
++	{0x0000b098, 0x02050205},
++	{0x0000b09c, 0x02040500},
++	{0x0000b0a0, 0x02050301},
++	{0x0000b0a4, 0x02050302},
++	{0x0000b0a8, 0x02050303},
++	{0x0000b0ac, 0x02050400},
++	{0x0000b0b0, 0x02050401},
++	{0x0000b0b4, 0x02050402},
++	{0x0000b0b8, 0x02050403},
++	{0x0000b0bc, 0x02050500},
++	{0x0000b0c0, 0x02050501},
++	{0x0000b0c4, 0x02050502},
++	{0x0000b0c8, 0x02050503},
++	{0x0000b0cc, 0x02050504},
++	{0x0000b0d0, 0x02050600},
++	{0x0000b0d4, 0x02050601},
++	{0x0000b0d8, 0x02050602},
++	{0x0000b0dc, 0x02050603},
++	{0x0000b0e0, 0x02050604},
++	{0x0000b0e4, 0x02050700},
++	{0x0000b0e8, 0x02050701},
++	{0x0000b0ec, 0x02050702},
++	{0x0000b0f0, 0x02050703},
++	{0x0000b0f4, 0x02050704},
++	{0x0000b0f8, 0x02050705},
++	{0x0000b0fc, 0x02050708},
++	{0x0000b100, 0x02050709},
++	{0x0000b104, 0x0205070a},
++	{0x0000b108, 0x0205070b},
++	{0x0000b10c, 0x0205070c},
++	{0x0000b110, 0x0205070d},
++	{0x0000b114, 0x02050710},
++	{0x0000b118, 0x02050711},
++	{0x0000b11c, 0x02050712},
++	{0x0000b120, 0x02050713},
++	{0x0000b124, 0x02050714},
++	{0x0000b128, 0x02050715},
++	{0x0000b12c, 0x02050730},
++	{0x0000b130, 0x02050731},
++	{0x0000b134, 0x02050732},
++	{0x0000b138, 0x02050733},
++	{0x0000b13c, 0x02050734},
++	{0x0000b140, 0x02050735},
++	{0x0000b144, 0x02050750},
++	{0x0000b148, 0x02050751},
++	{0x0000b14c, 0x02050752},
++	{0x0000b150, 0x02050753},
++	{0x0000b154, 0x02050754},
++	{0x0000b158, 0x02050755},
++	{0x0000b15c, 0x02050770},
++	{0x0000b160, 0x02050771},
++	{0x0000b164, 0x02050772},
++	{0x0000b168, 0x02050773},
++	{0x0000b16c, 0x02050774},
++	{0x0000b170, 0x02050775},
++	{0x0000b174, 0x00000776},
++	{0x0000b178, 0x00000776},
++	{0x0000b17c, 0x00000776},
++	{0x0000b180, 0x00000776},
++	{0x0000b184, 0x00000776},
++	{0x0000b188, 0x00000776},
++	{0x0000b18c, 0x00000776},
++	{0x0000b190, 0x00000776},
++	{0x0000b194, 0x00000776},
++	{0x0000b198, 0x00000776},
++	{0x0000b19c, 0x00000776},
++	{0x0000b1a0, 0x00000776},
++	{0x0000b1a4, 0x00000776},
++	{0x0000b1a8, 0x00000776},
++	{0x0000b1ac, 0x00000776},
++	{0x0000b1b0, 0x00000776},
++	{0x0000b1b4, 0x00000776},
++	{0x0000b1b8, 0x00000776},
++	{0x0000b1bc, 0x00000776},
++	{0x0000b1c0, 0x00000776},
++	{0x0000b1c4, 0x00000776},
++	{0x0000b1c8, 0x00000776},
++	{0x0000b1cc, 0x00000776},
++	{0x0000b1d0, 0x00000776},
++	{0x0000b1d4, 0x00000776},
++	{0x0000b1d8, 0x00000776},
++	{0x0000b1dc, 0x00000776},
++	{0x0000b1e0, 0x00000776},
++	{0x0000b1e4, 0x00000776},
++	{0x0000b1e8, 0x00000776},
++	{0x0000b1ec, 0x00000776},
++	{0x0000b1f0, 0x00000776},
++	{0x0000b1f4, 0x00000776},
++	{0x0000b1f8, 0x00000776},
++	{0x0000b1fc, 0x00000776},
++};
++
++static const u32 ar9200_ar9280_2p0_radio_core_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x00007800, 0x00040000},
++	{0x00007804, 0xdb005012},
++	{0x00007808, 0x04924914},
++	{0x0000780c, 0x21084210},
++	{0x00007810, 0x6d801300},
++	{0x00007814, 0x0019beff},
++	{0x00007818, 0x07e41000},
++	{0x0000781c, 0x00392000},
++	{0x00007820, 0x92592480},
++	{0x00007824, 0x00040000},
++	{0x00007828, 0xdb005012},
++	{0x0000782c, 0x04924914},
++	{0x00007830, 0x21084210},
++	{0x00007834, 0x6d801300},
++	{0x00007838, 0x0019beff},
++	{0x0000783c, 0x07e40000},
++	{0x00007840, 0x00392000},
++	{0x00007844, 0x92592480},
++	{0x00007848, 0x00100000},
++	{0x0000784c, 0x773f0567},
++	{0x00007850, 0x54214514},
++	{0x00007854, 0x12035828},
++	{0x00007858, 0x92592692},
++	{0x0000785c, 0x00000000},
++	{0x00007860, 0x56400000},
++	{0x00007864, 0x0a8e370e},
++	{0x00007868, 0xc0102850},
++	{0x0000786c, 0x812d4000},
++	{0x00007870, 0x807ec400},
++	{0x00007874, 0x001b6db0},
++	{0x00007878, 0x00376b63},
++	{0x0000787c, 0x06db6db6},
++	{0x00007880, 0x006d8000},
++	{0x00007884, 0xffeffffe},
++	{0x00007888, 0xffeffffe},
++	{0x0000788c, 0x00010000},
++	{0x00007890, 0x02060aeb},
++	{0x00007894, 0x5a108000},
++};
++
++static const u32 ar9462_1p0_baseband_postamble_emulation[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
++	{0x00009e44, 0x005c0000, 0x005c0000, 0x005c0000, 0x005c0000},
++	{0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
++	{0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
++	{0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
++	{0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
++	{0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
++	{0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
++	{0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
++	{0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
++	{0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
++	{0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
++	{0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
++	{0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
++	{0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
++	{0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
++	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++};
++
++static const u32 ar9462_pcie_phy_pll_on_clkreq_disable_L1_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x00018c00, 0x10012e5e},
++	{0x00018c04, 0x000801d8},
++	{0x00018c08, 0x0000580c},
++};
++
++static const u32 ar9462_common_rx_gain_table_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x00010000},
++	{0x0000a004, 0x00030002},
++	{0x0000a008, 0x00050004},
++	{0x0000a00c, 0x00810080},
++	{0x0000a010, 0x00830082},
++	{0x0000a014, 0x01810180},
++	{0x0000a018, 0x01830182},
++	{0x0000a01c, 0x01850184},
++	{0x0000a020, 0x01890188},
++	{0x0000a024, 0x018b018a},
++	{0x0000a028, 0x018d018c},
++	{0x0000a02c, 0x01910190},
++	{0x0000a030, 0x01930192},
++	{0x0000a034, 0x01950194},
++	{0x0000a038, 0x038a0196},
++	{0x0000a03c, 0x038c038b},
++	{0x0000a040, 0x0390038d},
++	{0x0000a044, 0x03920391},
++	{0x0000a048, 0x03940393},
++	{0x0000a04c, 0x03960395},
++	{0x0000a050, 0x00000000},
++	{0x0000a054, 0x00000000},
++	{0x0000a058, 0x00000000},
++	{0x0000a05c, 0x00000000},
++	{0x0000a060, 0x00000000},
++	{0x0000a064, 0x00000000},
++	{0x0000a068, 0x00000000},
++	{0x0000a06c, 0x00000000},
++	{0x0000a070, 0x00000000},
++	{0x0000a074, 0x00000000},
++	{0x0000a078, 0x00000000},
++	{0x0000a07c, 0x00000000},
++	{0x0000a080, 0x22222229},
++	{0x0000a084, 0x1d1d1d1d},
++	{0x0000a088, 0x1d1d1d1d},
++	{0x0000a08c, 0x1d1d1d1d},
++	{0x0000a090, 0x171d1d1d},
++	{0x0000a094, 0x11111717},
++	{0x0000a098, 0x00030311},
++	{0x0000a09c, 0x00000000},
++	{0x0000a0a0, 0x00000000},
++	{0x0000a0a4, 0x00000000},
++	{0x0000a0a8, 0x00000000},
++	{0x0000a0ac, 0x00000000},
++	{0x0000a0b0, 0x00000000},
++	{0x0000a0b4, 0x00000000},
++	{0x0000a0b8, 0x00000000},
++	{0x0000a0bc, 0x00000000},
++	{0x0000a0c0, 0x001f0000},
++	{0x0000a0c4, 0x01000101},
++	{0x0000a0c8, 0x011e011f},
++	{0x0000a0cc, 0x011c011d},
++	{0x0000a0d0, 0x02030204},
++	{0x0000a0d4, 0x02010202},
++	{0x0000a0d8, 0x021f0200},
++	{0x0000a0dc, 0x0302021e},
++	{0x0000a0e0, 0x03000301},
++	{0x0000a0e4, 0x031e031f},
++	{0x0000a0e8, 0x0402031d},
++	{0x0000a0ec, 0x04000401},
++	{0x0000a0f0, 0x041e041f},
++	{0x0000a0f4, 0x0502041d},
++	{0x0000a0f8, 0x05000501},
++	{0x0000a0fc, 0x051e051f},
++	{0x0000a100, 0x06010602},
++	{0x0000a104, 0x061f0600},
++	{0x0000a108, 0x061d061e},
++	{0x0000a10c, 0x07020703},
++	{0x0000a110, 0x07000701},
++	{0x0000a114, 0x00000000},
++	{0x0000a118, 0x00000000},
++	{0x0000a11c, 0x00000000},
++	{0x0000a120, 0x00000000},
++	{0x0000a124, 0x00000000},
++	{0x0000a128, 0x00000000},
++	{0x0000a12c, 0x00000000},
++	{0x0000a130, 0x00000000},
++	{0x0000a134, 0x00000000},
++	{0x0000a138, 0x00000000},
++	{0x0000a13c, 0x00000000},
++	{0x0000a140, 0x001f0000},
++	{0x0000a144, 0x01000101},
++	{0x0000a148, 0x011e011f},
++	{0x0000a14c, 0x011c011d},
++	{0x0000a150, 0x02030204},
++	{0x0000a154, 0x02010202},
++	{0x0000a158, 0x021f0200},
++	{0x0000a15c, 0x0302021e},
++	{0x0000a160, 0x03000301},
++	{0x0000a164, 0x031e031f},
++	{0x0000a168, 0x0402031d},
++	{0x0000a16c, 0x04000401},
++	{0x0000a170, 0x041e041f},
++	{0x0000a174, 0x0502041d},
++	{0x0000a178, 0x05000501},
++	{0x0000a17c, 0x051e051f},
++	{0x0000a180, 0x06010602},
++	{0x0000a184, 0x061f0600},
++	{0x0000a188, 0x061d061e},
++	{0x0000a18c, 0x07020703},
++	{0x0000a190, 0x07000701},
++	{0x0000a194, 0x00000000},
++	{0x0000a198, 0x00000000},
++	{0x0000a19c, 0x00000000},
++	{0x0000a1a0, 0x00000000},
++	{0x0000a1a4, 0x00000000},
++	{0x0000a1a8, 0x00000000},
++	{0x0000a1ac, 0x00000000},
++	{0x0000a1b0, 0x00000000},
++	{0x0000a1b4, 0x00000000},
++	{0x0000a1b8, 0x00000000},
++	{0x0000a1bc, 0x00000000},
++	{0x0000a1c0, 0x00000000},
++	{0x0000a1c4, 0x00000000},
++	{0x0000a1c8, 0x00000000},
++	{0x0000a1cc, 0x00000000},
++	{0x0000a1d0, 0x00000000},
++	{0x0000a1d4, 0x00000000},
++	{0x0000a1d8, 0x00000000},
++	{0x0000a1dc, 0x00000000},
++	{0x0000a1e0, 0x00000000},
++	{0x0000a1e4, 0x00000000},
++	{0x0000a1e8, 0x00000000},
++	{0x0000a1ec, 0x00000000},
++	{0x0000a1f0, 0x00000396},
++	{0x0000a1f4, 0x00000396},
++	{0x0000a1f8, 0x00000396},
++	{0x0000a1fc, 0x00000196},
++	{0x0000b000, 0x00010000},
++	{0x0000b004, 0x00030002},
++	{0x0000b008, 0x00050004},
++	{0x0000b00c, 0x00810080},
++	{0x0000b010, 0x00830082},
++	{0x0000b014, 0x01810180},
++	{0x0000b018, 0x01830182},
++	{0x0000b01c, 0x01850184},
++	{0x0000b020, 0x02810280},
++	{0x0000b024, 0x02830282},
++	{0x0000b028, 0x02850284},
++	{0x0000b02c, 0x02890288},
++	{0x0000b030, 0x028b028a},
++	{0x0000b034, 0x0388028c},
++	{0x0000b038, 0x038a0389},
++	{0x0000b03c, 0x038c038b},
++	{0x0000b040, 0x0390038d},
++	{0x0000b044, 0x03920391},
++	{0x0000b048, 0x03940393},
++	{0x0000b04c, 0x03960395},
++	{0x0000b050, 0x00000000},
++	{0x0000b054, 0x00000000},
++	{0x0000b058, 0x00000000},
++	{0x0000b05c, 0x00000000},
++	{0x0000b060, 0x00000000},
++	{0x0000b064, 0x00000000},
++	{0x0000b068, 0x00000000},
++	{0x0000b06c, 0x00000000},
++	{0x0000b070, 0x00000000},
++	{0x0000b074, 0x00000000},
++	{0x0000b078, 0x00000000},
++	{0x0000b07c, 0x00000000},
++	{0x0000b080, 0x2a2d2f32},
++	{0x0000b084, 0x21232328},
++	{0x0000b088, 0x19191c1e},
++	{0x0000b08c, 0x12141417},
++	{0x0000b090, 0x07070e0e},
++	{0x0000b094, 0x03030305},
++	{0x0000b098, 0x00000003},
++	{0x0000b09c, 0x00000000},
++	{0x0000b0a0, 0x00000000},
++	{0x0000b0a4, 0x00000000},
++	{0x0000b0a8, 0x00000000},
++	{0x0000b0ac, 0x00000000},
++	{0x0000b0b0, 0x00000000},
++	{0x0000b0b4, 0x00000000},
++	{0x0000b0b8, 0x00000000},
++	{0x0000b0bc, 0x00000000},
++	{0x0000b0c0, 0x003f0020},
++	{0x0000b0c4, 0x00400041},
++	{0x0000b0c8, 0x0140005f},
++	{0x0000b0cc, 0x0160015f},
++	{0x0000b0d0, 0x017e017f},
++	{0x0000b0d4, 0x02410242},
++	{0x0000b0d8, 0x025f0240},
++	{0x0000b0dc, 0x027f0260},
++	{0x0000b0e0, 0x0341027e},
++	{0x0000b0e4, 0x035f0340},
++	{0x0000b0e8, 0x037f0360},
++	{0x0000b0ec, 0x04400441},
++	{0x0000b0f0, 0x0460045f},
++	{0x0000b0f4, 0x0541047f},
++	{0x0000b0f8, 0x055f0540},
++	{0x0000b0fc, 0x057f0560},
++	{0x0000b100, 0x06400641},
++	{0x0000b104, 0x0660065f},
++	{0x0000b108, 0x067e067f},
++	{0x0000b10c, 0x07410742},
++	{0x0000b110, 0x075f0740},
++	{0x0000b114, 0x077f0760},
++	{0x0000b118, 0x07800781},
++	{0x0000b11c, 0x07a0079f},
++	{0x0000b120, 0x07c107bf},
++	{0x0000b124, 0x000007c0},
++	{0x0000b128, 0x00000000},
++	{0x0000b12c, 0x00000000},
++	{0x0000b130, 0x00000000},
++	{0x0000b134, 0x00000000},
++	{0x0000b138, 0x00000000},
++	{0x0000b13c, 0x00000000},
++	{0x0000b140, 0x003f0020},
++	{0x0000b144, 0x00400041},
++	{0x0000b148, 0x0140005f},
++	{0x0000b14c, 0x0160015f},
++	{0x0000b150, 0x017e017f},
++	{0x0000b154, 0x02410242},
++	{0x0000b158, 0x025f0240},
++	{0x0000b15c, 0x027f0260},
++	{0x0000b160, 0x0341027e},
++	{0x0000b164, 0x035f0340},
++	{0x0000b168, 0x037f0360},
++	{0x0000b16c, 0x04400441},
++	{0x0000b170, 0x0460045f},
++	{0x0000b174, 0x0541047f},
++	{0x0000b178, 0x055f0540},
++	{0x0000b17c, 0x057f0560},
++	{0x0000b180, 0x06400641},
++	{0x0000b184, 0x0660065f},
++	{0x0000b188, 0x067e067f},
++	{0x0000b18c, 0x07410742},
++	{0x0000b190, 0x075f0740},
++	{0x0000b194, 0x077f0760},
++	{0x0000b198, 0x07800781},
++	{0x0000b19c, 0x07a0079f},
++	{0x0000b1a0, 0x07c107bf},
++	{0x0000b1a4, 0x000007c0},
++	{0x0000b1a8, 0x00000000},
++	{0x0000b1ac, 0x00000000},
++	{0x0000b1b0, 0x00000000},
++	{0x0000b1b4, 0x00000000},
++	{0x0000b1b8, 0x00000000},
++	{0x0000b1bc, 0x00000000},
++	{0x0000b1c0, 0x00000000},
++	{0x0000b1c4, 0x00000000},
++	{0x0000b1c8, 0x00000000},
++	{0x0000b1cc, 0x00000000},
++	{0x0000b1d0, 0x00000000},
++	{0x0000b1d4, 0x00000000},
++	{0x0000b1d8, 0x00000000},
++	{0x0000b1dc, 0x00000000},
++	{0x0000b1e0, 0x00000000},
++	{0x0000b1e4, 0x00000000},
++	{0x0000b1e8, 0x00000000},
++	{0x0000b1ec, 0x00000000},
++	{0x0000b1f0, 0x00000396},
++	{0x0000b1f4, 0x00000396},
++	{0x0000b1f8, 0x00000396},
++	{0x0000b1fc, 0x00000196},
++};
++
++static const u32 ar9462_modes_high_ob_db_tx_gain_table_1p0[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
++	{0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
++	{0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
++	{0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
++	{0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
++	{0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
++	{0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
++	{0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
++	{0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
++	{0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
++	{0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
++	{0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
++	{0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
++	{0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
++	{0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
++	{0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
++	{0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
++	{0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
++	{0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
++	{0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
++	{0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
++	{0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
++	{0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
++	{0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
++	{0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
++	{0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
++	{0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
++	{0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
++	{0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
++	{0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
++	{0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
++	{0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
++	{0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
++	{0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
++	{0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
++	{0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
++	{0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
++	{0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
++	{0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
++	{0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
++};
++
++static const u32 ar9462_common_wo_xlna_rx_gain_table_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x00010000},
++	{0x0000a004, 0x00030002},
++	{0x0000a008, 0x00050004},
++	{0x0000a00c, 0x00810080},
++	{0x0000a010, 0x00830082},
++	{0x0000a014, 0x01810180},
++	{0x0000a018, 0x01830182},
++	{0x0000a01c, 0x01850184},
++	{0x0000a020, 0x01890188},
++	{0x0000a024, 0x018b018a},
++	{0x0000a028, 0x018d018c},
++	{0x0000a02c, 0x03820190},
++	{0x0000a030, 0x03840383},
++	{0x0000a034, 0x03880385},
++	{0x0000a038, 0x038a0389},
++	{0x0000a03c, 0x038c038b},
++	{0x0000a040, 0x0390038d},
++	{0x0000a044, 0x03920391},
++	{0x0000a048, 0x03940393},
++	{0x0000a04c, 0x03960395},
++	{0x0000a050, 0x00000000},
++	{0x0000a054, 0x00000000},
++	{0x0000a058, 0x00000000},
++	{0x0000a05c, 0x00000000},
++	{0x0000a060, 0x00000000},
++	{0x0000a064, 0x00000000},
++	{0x0000a068, 0x00000000},
++	{0x0000a06c, 0x00000000},
++	{0x0000a070, 0x00000000},
++	{0x0000a074, 0x00000000},
++	{0x0000a078, 0x00000000},
++	{0x0000a07c, 0x00000000},
++	{0x0000a080, 0x29292929},
++	{0x0000a084, 0x29292929},
++	{0x0000a088, 0x29292929},
++	{0x0000a08c, 0x29292929},
++	{0x0000a090, 0x22292929},
++	{0x0000a094, 0x1d1d2222},
++	{0x0000a098, 0x0c111117},
++	{0x0000a09c, 0x00030303},
++	{0x0000a0a0, 0x00000000},
++	{0x0000a0a4, 0x00000000},
++	{0x0000a0a8, 0x00000000},
++	{0x0000a0ac, 0x00000000},
++	{0x0000a0b0, 0x00000000},
++	{0x0000a0b4, 0x00000000},
++	{0x0000a0b8, 0x00000000},
++	{0x0000a0bc, 0x00000000},
++	{0x0000a0c0, 0x001f0000},
++	{0x0000a0c4, 0x01000101},
++	{0x0000a0c8, 0x011e011f},
++	{0x0000a0cc, 0x011c011d},
++	{0x0000a0d0, 0x02030204},
++	{0x0000a0d4, 0x02010202},
++	{0x0000a0d8, 0x021f0200},
++	{0x0000a0dc, 0x0302021e},
++	{0x0000a0e0, 0x03000301},
++	{0x0000a0e4, 0x031e031f},
++	{0x0000a0e8, 0x0402031d},
++	{0x0000a0ec, 0x04000401},
++	{0x0000a0f0, 0x041e041f},
++	{0x0000a0f4, 0x0502041d},
++	{0x0000a0f8, 0x05000501},
++	{0x0000a0fc, 0x051e051f},
++	{0x0000a100, 0x06010602},
++	{0x0000a104, 0x061f0600},
++	{0x0000a108, 0x061d061e},
++	{0x0000a10c, 0x07020703},
++	{0x0000a110, 0x07000701},
++	{0x0000a114, 0x00000000},
++	{0x0000a118, 0x00000000},
++	{0x0000a11c, 0x00000000},
++	{0x0000a120, 0x00000000},
++	{0x0000a124, 0x00000000},
++	{0x0000a128, 0x00000000},
++	{0x0000a12c, 0x00000000},
++	{0x0000a130, 0x00000000},
++	{0x0000a134, 0x00000000},
++	{0x0000a138, 0x00000000},
++	{0x0000a13c, 0x00000000},
++	{0x0000a140, 0x001f0000},
++	{0x0000a144, 0x01000101},
++	{0x0000a148, 0x011e011f},
++	{0x0000a14c, 0x011c011d},
++	{0x0000a150, 0x02030204},
++	{0x0000a154, 0x02010202},
++	{0x0000a158, 0x021f0200},
++	{0x0000a15c, 0x0302021e},
++	{0x0000a160, 0x03000301},
++	{0x0000a164, 0x031e031f},
++	{0x0000a168, 0x0402031d},
++	{0x0000a16c, 0x04000401},
++	{0x0000a170, 0x041e041f},
++	{0x0000a174, 0x0502041d},
++	{0x0000a178, 0x05000501},
++	{0x0000a17c, 0x051e051f},
++	{0x0000a180, 0x06010602},
++	{0x0000a184, 0x061f0600},
++	{0x0000a188, 0x061d061e},
++	{0x0000a18c, 0x07020703},
++	{0x0000a190, 0x07000701},
++	{0x0000a194, 0x00000000},
++	{0x0000a198, 0x00000000},
++	{0x0000a19c, 0x00000000},
++	{0x0000a1a0, 0x00000000},
++	{0x0000a1a4, 0x00000000},
++	{0x0000a1a8, 0x00000000},
++	{0x0000a1ac, 0x00000000},
++	{0x0000a1b0, 0x00000000},
++	{0x0000a1b4, 0x00000000},
++	{0x0000a1b8, 0x00000000},
++	{0x0000a1bc, 0x00000000},
++	{0x0000a1c0, 0x00000000},
++	{0x0000a1c4, 0x00000000},
++	{0x0000a1c8, 0x00000000},
++	{0x0000a1cc, 0x00000000},
++	{0x0000a1d0, 0x00000000},
++	{0x0000a1d4, 0x00000000},
++	{0x0000a1d8, 0x00000000},
++	{0x0000a1dc, 0x00000000},
++	{0x0000a1e0, 0x00000000},
++	{0x0000a1e4, 0x00000000},
++	{0x0000a1e8, 0x00000000},
++	{0x0000a1ec, 0x00000000},
++	{0x0000a1f0, 0x00000396},
++	{0x0000a1f4, 0x00000396},
++	{0x0000a1f8, 0x00000396},
++	{0x0000a1fc, 0x00000196},
++	{0x0000b000, 0x00010000},
++	{0x0000b004, 0x00030002},
++	{0x0000b008, 0x00050004},
++	{0x0000b00c, 0x00810080},
++	{0x0000b010, 0x00830082},
++	{0x0000b014, 0x01810180},
++	{0x0000b018, 0x01830182},
++	{0x0000b01c, 0x01850184},
++	{0x0000b020, 0x02810280},
++	{0x0000b024, 0x02830282},
++	{0x0000b028, 0x02850284},
++	{0x0000b02c, 0x02890288},
++	{0x0000b030, 0x028b028a},
++	{0x0000b034, 0x0388028c},
++	{0x0000b038, 0x038a0389},
++	{0x0000b03c, 0x038c038b},
++	{0x0000b040, 0x0390038d},
++	{0x0000b044, 0x03920391},
++	{0x0000b048, 0x03940393},
++	{0x0000b04c, 0x03960395},
++	{0x0000b050, 0x00000000},
++	{0x0000b054, 0x00000000},
++	{0x0000b058, 0x00000000},
++	{0x0000b05c, 0x00000000},
++	{0x0000b060, 0x00000000},
++	{0x0000b064, 0x00000000},
++	{0x0000b068, 0x00000000},
++	{0x0000b06c, 0x00000000},
++	{0x0000b070, 0x00000000},
++	{0x0000b074, 0x00000000},
++	{0x0000b078, 0x00000000},
++	{0x0000b07c, 0x00000000},
++	{0x0000b080, 0x32323232},
++	{0x0000b084, 0x2f2f3232},
++	{0x0000b088, 0x23282a2d},
++	{0x0000b08c, 0x1c1e2123},
++	{0x0000b090, 0x14171919},
++	{0x0000b094, 0x0e0e1214},
++	{0x0000b098, 0x03050707},
++	{0x0000b09c, 0x00030303},
++	{0x0000b0a0, 0x00000000},
++	{0x0000b0a4, 0x00000000},
++	{0x0000b0a8, 0x00000000},
++	{0x0000b0ac, 0x00000000},
++	{0x0000b0b0, 0x00000000},
++	{0x0000b0b4, 0x00000000},
++	{0x0000b0b8, 0x00000000},
++	{0x0000b0bc, 0x00000000},
++	{0x0000b0c0, 0x003f0020},
++	{0x0000b0c4, 0x00400041},
++	{0x0000b0c8, 0x0140005f},
++	{0x0000b0cc, 0x0160015f},
++	{0x0000b0d0, 0x017e017f},
++	{0x0000b0d4, 0x02410242},
++	{0x0000b0d8, 0x025f0240},
++	{0x0000b0dc, 0x027f0260},
++	{0x0000b0e0, 0x0341027e},
++	{0x0000b0e4, 0x035f0340},
++	{0x0000b0e8, 0x037f0360},
++	{0x0000b0ec, 0x04400441},
++	{0x0000b0f0, 0x0460045f},
++	{0x0000b0f4, 0x0541047f},
++	{0x0000b0f8, 0x055f0540},
++	{0x0000b0fc, 0x057f0560},
++	{0x0000b100, 0x06400641},
++	{0x0000b104, 0x0660065f},
++	{0x0000b108, 0x067e067f},
++	{0x0000b10c, 0x07410742},
++	{0x0000b110, 0x075f0740},
++	{0x0000b114, 0x077f0760},
++	{0x0000b118, 0x07800781},
++	{0x0000b11c, 0x07a0079f},
++	{0x0000b120, 0x07c107bf},
++	{0x0000b124, 0x000007c0},
++	{0x0000b128, 0x00000000},
++	{0x0000b12c, 0x00000000},
++	{0x0000b130, 0x00000000},
++	{0x0000b134, 0x00000000},
++	{0x0000b138, 0x00000000},
++	{0x0000b13c, 0x00000000},
++	{0x0000b140, 0x003f0020},
++	{0x0000b144, 0x00400041},
++	{0x0000b148, 0x0140005f},
++	{0x0000b14c, 0x0160015f},
++	{0x0000b150, 0x017e017f},
++	{0x0000b154, 0x02410242},
++	{0x0000b158, 0x025f0240},
++	{0x0000b15c, 0x027f0260},
++	{0x0000b160, 0x0341027e},
++	{0x0000b164, 0x035f0340},
++	{0x0000b168, 0x037f0360},
++	{0x0000b16c, 0x04400441},
++	{0x0000b170, 0x0460045f},
++	{0x0000b174, 0x0541047f},
++	{0x0000b178, 0x055f0540},
++	{0x0000b17c, 0x057f0560},
++	{0x0000b180, 0x06400641},
++	{0x0000b184, 0x0660065f},
++	{0x0000b188, 0x067e067f},
++	{0x0000b18c, 0x07410742},
++	{0x0000b190, 0x075f0740},
++	{0x0000b194, 0x077f0760},
++	{0x0000b198, 0x07800781},
++	{0x0000b19c, 0x07a0079f},
++	{0x0000b1a0, 0x07c107bf},
++	{0x0000b1a4, 0x000007c0},
++	{0x0000b1a8, 0x00000000},
++	{0x0000b1ac, 0x00000000},
++	{0x0000b1b0, 0x00000000},
++	{0x0000b1b4, 0x00000000},
++	{0x0000b1b8, 0x00000000},
++	{0x0000b1bc, 0x00000000},
++	{0x0000b1c0, 0x00000000},
++	{0x0000b1c4, 0x00000000},
++	{0x0000b1c8, 0x00000000},
++	{0x0000b1cc, 0x00000000},
++	{0x0000b1d0, 0x00000000},
++	{0x0000b1d4, 0x00000000},
++	{0x0000b1d8, 0x00000000},
++	{0x0000b1dc, 0x00000000},
++	{0x0000b1e0, 0x00000000},
++	{0x0000b1e4, 0x00000000},
++	{0x0000b1e8, 0x00000000},
++	{0x0000b1ec, 0x00000000},
++	{0x0000b1f0, 0x00000396},
++	{0x0000b1f4, 0x00000396},
++	{0x0000b1f8, 0x00000396},
++	{0x0000b1fc, 0x00000196},
++};
++
++static const u32 ar9462_1p0_mac_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
++	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
++	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
++	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
++	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
++	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
++	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
++	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
++};
++
++static const u32 ar9462_1p0_mac_postamble_emulation[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
++	{0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
++};
++
++static const u32 ar9462_1p0_tx_gain_table_baseband_postamble_emulation[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
++	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
++	{0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
++	{0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
++	{0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
++	{0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
++	{0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
++	{0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
++	{0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
++	{0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
++	{0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
++	{0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
++	{0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
++};
++
++static const u32 ar9462_1p0_radio_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
++	{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24646c08, 0x24646c08},
++	{0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
++	{0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
++	{0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
++	{0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
++	{0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
++};
++
++static const u32 ar9462_1p0_soc_postamble_emulation[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00007010, 0x00001133, 0x00001133, 0x00001133, 0x00001133},
++};
++
++static const u32 ar9462_1p0_baseband_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00009800, 0xafe68e30},
++	{0x00009804, 0xfd14e000},
++	{0x00009808, 0x9c0a9f6b},
++	{0x0000980c, 0x04900000},
++	{0x00009814, 0x9280c00a},
++	{0x00009818, 0x00000000},
++	{0x0000981c, 0x00020028},
++	{0x00009834, 0x6400a290},
++	{0x00009838, 0x0108ecff},
++	{0x0000983c, 0x0d000600},
++	{0x00009880, 0x201fff00},
++	{0x00009884, 0x00001042},
++	{0x000098a4, 0x00200400},
++	{0x000098b0, 0x32840bbe},
++	{0x000098d0, 0x004b6a8e},
++	{0x000098d4, 0x00000820},
++	{0x000098dc, 0x00000000},
++	{0x000098e4, 0x01ffffff},
++	{0x000098e8, 0x01ffffff},
++	{0x000098ec, 0x01ffffff},
++	{0x000098f0, 0x00000000},
++	{0x000098f4, 0x00000000},
++	{0x00009c04, 0xff55ff55},
++	{0x00009c08, 0x0320ff55},
++	{0x00009c0c, 0x00000000},
++	{0x00009c10, 0x00000000},
++	{0x00009c14, 0x00046384},
++	{0x00009c18, 0x05b6b440},
++	{0x00009c1c, 0x00b6b440},
++	{0x00009d00, 0xc080a333},
++	{0x00009d04, 0x40206c10},
++	{0x00009d08, 0x009c4060},
++	{0x00009d0c, 0x9883800a},
++	{0x00009d10, 0x01834061},
++	{0x00009d14, 0x00c0040b},
++	{0x00009d18, 0x00000000},
++	{0x00009e08, 0x0038230c},
++	{0x00009e24, 0x990bb514},
++	{0x00009e28, 0x0c6f0000},
++	{0x00009e30, 0x06336f77},
++	{0x00009e34, 0x6af6532f},
++	{0x00009e38, 0x0cc80c00},
++	{0x00009e40, 0x0d261820},
++	{0x00009e4c, 0x00001004},
++	{0x00009e50, 0x00ff03f1},
++	{0x00009e54, 0x64c355c7},
++	{0x00009e58, 0xfd897735},
++	{0x00009e5c, 0xe9198724},
++	{0x00009fc0, 0x803e4788},
++	{0x00009fc4, 0x0001efb5},
++	{0x00009fcc, 0x40000014},
++	{0x00009fd0, 0x01193b93},
++	{0x0000a20c, 0x00000000},
++	{0x0000a220, 0x00000000},
++	{0x0000a224, 0x00000000},
++	{0x0000a228, 0x10002310},
++	{0x0000a23c, 0x00000000},
++	{0x0000a244, 0x0c000000},
++	{0x0000a2a0, 0x00000001},
++	{0x0000a2c0, 0x00000001},
++	{0x0000a2c8, 0x00000000},
++	{0x0000a2cc, 0x18c43433},
++	{0x0000a2d4, 0x00000000},
++	{0x0000a2ec, 0x00000000},
++	{0x0000a2f0, 0x00000000},
++	{0x0000a2f4, 0x00000000},
++	{0x0000a2f8, 0x00000000},
++	{0x0000a344, 0x00000000},
++	{0x0000a34c, 0x00000000},
++	{0x0000a350, 0x0000a000},
++	{0x0000a364, 0x00000000},
++	{0x0000a370, 0x00000000},
++	{0x0000a390, 0x00000001},
++	{0x0000a394, 0x00000444},
++	{0x0000a398, 0x001f0e0f},
++	{0x0000a39c, 0x0075393f},
++	{0x0000a3a0, 0xb79f6427},
++	{0x0000a3a4, 0x00000000},
++	{0x0000a3a8, 0xaaaaaaaa},
++	{0x0000a3ac, 0x3c466478},
++	{0x0000a3c0, 0x20202020},
++	{0x0000a3c4, 0x22222220},
++	{0x0000a3c8, 0x20200020},
++	{0x0000a3cc, 0x20202020},
++	{0x0000a3d0, 0x20202020},
++	{0x0000a3d4, 0x20202020},
++	{0x0000a3d8, 0x20202020},
++	{0x0000a3dc, 0x20202020},
++	{0x0000a3e0, 0x20202020},
++	{0x0000a3e4, 0x20202020},
++	{0x0000a3e8, 0x20202020},
++	{0x0000a3ec, 0x20202020},
++	{0x0000a3f0, 0x00000000},
++	{0x0000a3f4, 0x00000006},
++	{0x0000a3f8, 0x0c9bd380},
++	{0x0000a3fc, 0x000f0f01},
++	{0x0000a400, 0x8fa91f01},
++	{0x0000a404, 0x00000000},
++	{0x0000a408, 0x0e79e5c6},
++	{0x0000a40c, 0x00820820},
++	{0x0000a414, 0x1ce739ce},
++	{0x0000a418, 0x2d001dce},
++	{0x0000a41c, 0x1ce739ce},
++	{0x0000a420, 0x000001ce},
++	{0x0000a424, 0x1ce739ce},
++	{0x0000a428, 0x000001ce},
++	{0x0000a42c, 0x1ce739ce},
++	{0x0000a430, 0x1ce739ce},
++	{0x0000a434, 0x00000000},
++	{0x0000a438, 0x00001801},
++	{0x0000a43c, 0x00100000},
++	{0x0000a440, 0x00000000},
++	{0x0000a444, 0x00000000},
++	{0x0000a448, 0x05000080},
++	{0x0000a44c, 0x00000001},
++	{0x0000a450, 0x00010000},
++	{0x0000a458, 0x00000000},
++	{0x0000a644, 0xbfad9d74},
++	{0x0000a648, 0x0048060a},
++	{0x0000a64c, 0x00003c37},
++	{0x0000a670, 0x03020100},
++	{0x0000a674, 0x09080504},
++	{0x0000a678, 0x0d0c0b0a},
++	{0x0000a67c, 0x13121110},
++	{0x0000a680, 0x31301514},
++	{0x0000a684, 0x35343332},
++	{0x0000a688, 0x00000036},
++	{0x0000a690, 0x00000838},
++	{0x0000a6b0, 0x0000000a},
++	{0x0000a6b4, 0x28f12c01},
++	{0x0000a7c0, 0x00000000},
++	{0x0000a7c4, 0xfffffffc},
++	{0x0000a7c8, 0x00000000},
++	{0x0000a7cc, 0x00000000},
++	{0x0000a7d0, 0x00000000},
++	{0x0000a7d4, 0x00000004},
++	{0x0000a7dc, 0x00000001},
++	{0x0000a8d0, 0x004b6a8e},
++	{0x0000a8d4, 0x00000820},
++	{0x0000a8dc, 0x00000000},
++	{0x0000a8f0, 0x00000000},
++	{0x0000a8f4, 0x00000000},
++	{0x0000b2d0, 0x00000080},
++	{0x0000b2d4, 0x00000000},
++	{0x0000b2ec, 0x00000000},
++	{0x0000b2f0, 0x00000000},
++	{0x0000b2f4, 0x00000000},
++	{0x0000b2f8, 0x00000000},
++	{0x0000b408, 0x0e79e5c0},
++	{0x0000b40c, 0x00820820},
++	{0x0000b420, 0x00000000},
++	{0x0000b6b0, 0x0000000a},
++	{0x0000b6b4, 0x00c00001},
++};
++
++static const u32 ar9462_1p0_baseband_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
++	{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
++	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
++	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
++	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
++	{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
++	{0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
++	{0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
++	{0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
++	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
++	{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
++	{0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e},
++	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
++	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
++	{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
++	{0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
++	{0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},
++	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
++	{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
++	{0x0000a204, 0x0131b7c0, 0x0131b7c4, 0x0131b7c4, 0x0131b7c0},
++	{0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
++	{0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
++	{0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
++	{0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
++	{0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
++	{0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
++	{0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
++	{0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
++	{0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
++	{0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
++	{0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
++	{0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
++	{0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
++	{0x0000a288, 0x00000110, 0x00000110, 0x00100110, 0x00100110},
++	{0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
++	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
++	{0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
++	{0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
++	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
++	{0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
++	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
++	{0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
++	{0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
++};
++
++static const u32 ar9462_modes_fast_clock_1p0[][3] = {
++	/* Addr      5G_HT20     5G_HT40   */
++	{0x00001030, 0x00000268, 0x000004d0},
++	{0x00001070, 0x0000018c, 0x00000318},
++	{0x000010b0, 0x00000fd0, 0x00001fa0},
++	{0x00008014, 0x044c044c, 0x08980898},
++	{0x0000801c, 0x148ec02b, 0x148ec057},
++	{0x00008318, 0x000044c0, 0x00008980},
++	{0x00009e00, 0x0372131c, 0x0372131c},
++	{0x0000a230, 0x0000400b, 0x00004016},
++	{0x0000a254, 0x00000898, 0x00001130},
++};
++
++static const u32 ar9462_modes_low_ob_db_tx_gain_table_1p0[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++	{0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++	{0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
++	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
++	{0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
++	{0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
++	{0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
++	{0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
++	{0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
++	{0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
++	{0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
++	{0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
++	{0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
++	{0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
++	{0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
++	{0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
++	{0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
++	{0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
++	{0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
++	{0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
++	{0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
++	{0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
++	{0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
++	{0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
++	{0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
++	{0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
++	{0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
++	{0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++	{0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
++	{0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
++	{0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++	{0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++	{0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
++	{0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
++	{0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
++	{0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
++};
++
++static const u32 ar9462_1p0_soc_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
++};
++
++static const u32 ar9462_common_mixed_rx_gain_table_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x00010000},
++	{0x0000a004, 0x00030002},
++	{0x0000a008, 0x00050004},
++	{0x0000a00c, 0x00810080},
++	{0x0000a010, 0x00830082},
++	{0x0000a014, 0x01810180},
++	{0x0000a018, 0x01830182},
++	{0x0000a01c, 0x01850184},
++	{0x0000a020, 0x01890188},
++	{0x0000a024, 0x018b018a},
++	{0x0000a028, 0x018d018c},
++	{0x0000a02c, 0x03820190},
++	{0x0000a030, 0x03840383},
++	{0x0000a034, 0x03880385},
++	{0x0000a038, 0x038a0389},
++	{0x0000a03c, 0x038c038b},
++	{0x0000a040, 0x0390038d},
++	{0x0000a044, 0x03920391},
++	{0x0000a048, 0x03940393},
++	{0x0000a04c, 0x03960395},
++	{0x0000a050, 0x00000000},
++	{0x0000a054, 0x00000000},
++	{0x0000a058, 0x00000000},
++	{0x0000a05c, 0x00000000},
++	{0x0000a060, 0x00000000},
++	{0x0000a064, 0x00000000},
++	{0x0000a068, 0x00000000},
++	{0x0000a06c, 0x00000000},
++	{0x0000a070, 0x00000000},
++	{0x0000a074, 0x00000000},
++	{0x0000a078, 0x00000000},
++	{0x0000a07c, 0x00000000},
++	{0x0000a080, 0x29292929},
++	{0x0000a084, 0x29292929},
++	{0x0000a088, 0x29292929},
++	{0x0000a08c, 0x29292929},
++	{0x0000a090, 0x22292929},
++	{0x0000a094, 0x1d1d2222},
++	{0x0000a098, 0x0c111117},
++	{0x0000a09c, 0x00030303},
++	{0x0000a0a0, 0x00000000},
++	{0x0000a0a4, 0x00000000},
++	{0x0000a0a8, 0x00000000},
++	{0x0000a0ac, 0x00000000},
++	{0x0000a0b0, 0x00000000},
++	{0x0000a0b4, 0x00000000},
++	{0x0000a0b8, 0x00000000},
++	{0x0000a0bc, 0x00000000},
++	{0x0000a0c0, 0x001f0000},
++	{0x0000a0c4, 0x01000101},
++	{0x0000a0c8, 0x011e011f},
++	{0x0000a0cc, 0x011c011d},
++	{0x0000a0d0, 0x02030204},
++	{0x0000a0d4, 0x02010202},
++	{0x0000a0d8, 0x021f0200},
++	{0x0000a0dc, 0x0302021e},
++	{0x0000a0e0, 0x03000301},
++	{0x0000a0e4, 0x031e031f},
++	{0x0000a0e8, 0x0402031d},
++	{0x0000a0ec, 0x04000401},
++	{0x0000a0f0, 0x041e041f},
++	{0x0000a0f4, 0x0502041d},
++	{0x0000a0f8, 0x05000501},
++	{0x0000a0fc, 0x051e051f},
++	{0x0000a100, 0x06010602},
++	{0x0000a104, 0x061f0600},
++	{0x0000a108, 0x061d061e},
++	{0x0000a10c, 0x07020703},
++	{0x0000a110, 0x07000701},
++	{0x0000a114, 0x00000000},
++	{0x0000a118, 0x00000000},
++	{0x0000a11c, 0x00000000},
++	{0x0000a120, 0x00000000},
++	{0x0000a124, 0x00000000},
++	{0x0000a128, 0x00000000},
++	{0x0000a12c, 0x00000000},
++	{0x0000a130, 0x00000000},
++	{0x0000a134, 0x00000000},
++	{0x0000a138, 0x00000000},
++	{0x0000a13c, 0x00000000},
++	{0x0000a140, 0x001f0000},
++	{0x0000a144, 0x01000101},
++	{0x0000a148, 0x011e011f},
++	{0x0000a14c, 0x011c011d},
++	{0x0000a150, 0x02030204},
++	{0x0000a154, 0x02010202},
++	{0x0000a158, 0x021f0200},
++	{0x0000a15c, 0x0302021e},
++	{0x0000a160, 0x03000301},
++	{0x0000a164, 0x031e031f},
++	{0x0000a168, 0x0402031d},
++	{0x0000a16c, 0x04000401},
++	{0x0000a170, 0x041e041f},
++	{0x0000a174, 0x0502041d},
++	{0x0000a178, 0x05000501},
++	{0x0000a17c, 0x051e051f},
++	{0x0000a180, 0x06010602},
++	{0x0000a184, 0x061f0600},
++	{0x0000a188, 0x061d061e},
++	{0x0000a18c, 0x07020703},
++	{0x0000a190, 0x07000701},
++	{0x0000a194, 0x00000000},
++	{0x0000a198, 0x00000000},
++	{0x0000a19c, 0x00000000},
++	{0x0000a1a0, 0x00000000},
++	{0x0000a1a4, 0x00000000},
++	{0x0000a1a8, 0x00000000},
++	{0x0000a1ac, 0x00000000},
++	{0x0000a1b0, 0x00000000},
++	{0x0000a1b4, 0x00000000},
++	{0x0000a1b8, 0x00000000},
++	{0x0000a1bc, 0x00000000},
++	{0x0000a1c0, 0x00000000},
++	{0x0000a1c4, 0x00000000},
++	{0x0000a1c8, 0x00000000},
++	{0x0000a1cc, 0x00000000},
++	{0x0000a1d0, 0x00000000},
++	{0x0000a1d4, 0x00000000},
++	{0x0000a1d8, 0x00000000},
++	{0x0000a1dc, 0x00000000},
++	{0x0000a1e0, 0x00000000},
++	{0x0000a1e4, 0x00000000},
++	{0x0000a1e8, 0x00000000},
++	{0x0000a1ec, 0x00000000},
++	{0x0000a1f0, 0x00000396},
++	{0x0000a1f4, 0x00000396},
++	{0x0000a1f8, 0x00000396},
++	{0x0000a1fc, 0x00000196},
++	{0x0000b000, 0x00010000},
++	{0x0000b004, 0x00030002},
++	{0x0000b008, 0x00050004},
++	{0x0000b00c, 0x00810080},
++	{0x0000b010, 0x00830082},
++	{0x0000b014, 0x01810180},
++	{0x0000b018, 0x01830182},
++	{0x0000b01c, 0x01850184},
++	{0x0000b020, 0x02810280},
++	{0x0000b024, 0x02830282},
++	{0x0000b028, 0x02850284},
++	{0x0000b02c, 0x02890288},
++	{0x0000b030, 0x028b028a},
++	{0x0000b034, 0x0388028c},
++	{0x0000b038, 0x038a0389},
++	{0x0000b03c, 0x038c038b},
++	{0x0000b040, 0x0390038d},
++	{0x0000b044, 0x03920391},
++	{0x0000b048, 0x03940393},
++	{0x0000b04c, 0x03960395},
++	{0x0000b050, 0x00000000},
++	{0x0000b054, 0x00000000},
++	{0x0000b058, 0x00000000},
++	{0x0000b05c, 0x00000000},
++	{0x0000b060, 0x00000000},
++	{0x0000b064, 0x00000000},
++	{0x0000b068, 0x00000000},
++	{0x0000b06c, 0x00000000},
++	{0x0000b070, 0x00000000},
++	{0x0000b074, 0x00000000},
++	{0x0000b078, 0x00000000},
++	{0x0000b07c, 0x00000000},
++	{0x0000b080, 0x2a2d2f32},
++	{0x0000b084, 0x21232328},
++	{0x0000b088, 0x19191c1e},
++	{0x0000b08c, 0x12141417},
++	{0x0000b090, 0x07070e0e},
++	{0x0000b094, 0x03030305},
++	{0x0000b098, 0x00000003},
++	{0x0000b09c, 0x00000000},
++	{0x0000b0a0, 0x00000000},
++	{0x0000b0a4, 0x00000000},
++	{0x0000b0a8, 0x00000000},
++	{0x0000b0ac, 0x00000000},
++	{0x0000b0b0, 0x00000000},
++	{0x0000b0b4, 0x00000000},
++	{0x0000b0b8, 0x00000000},
++	{0x0000b0bc, 0x00000000},
++	{0x0000b0c0, 0x003f0020},
++	{0x0000b0c4, 0x00400041},
++	{0x0000b0c8, 0x0140005f},
++	{0x0000b0cc, 0x0160015f},
++	{0x0000b0d0, 0x017e017f},
++	{0x0000b0d4, 0x02410242},
++	{0x0000b0d8, 0x025f0240},
++	{0x0000b0dc, 0x027f0260},
++	{0x0000b0e0, 0x0341027e},
++	{0x0000b0e4, 0x035f0340},
++	{0x0000b0e8, 0x037f0360},
++	{0x0000b0ec, 0x04400441},
++	{0x0000b0f0, 0x0460045f},
++	{0x0000b0f4, 0x0541047f},
++	{0x0000b0f8, 0x055f0540},
++	{0x0000b0fc, 0x057f0560},
++	{0x0000b100, 0x06400641},
++	{0x0000b104, 0x0660065f},
++	{0x0000b108, 0x067e067f},
++	{0x0000b10c, 0x07410742},
++	{0x0000b110, 0x075f0740},
++	{0x0000b114, 0x077f0760},
++	{0x0000b118, 0x07800781},
++	{0x0000b11c, 0x07a0079f},
++	{0x0000b120, 0x07c107bf},
++	{0x0000b124, 0x000007c0},
++	{0x0000b128, 0x00000000},
++	{0x0000b12c, 0x00000000},
++	{0x0000b130, 0x00000000},
++	{0x0000b134, 0x00000000},
++	{0x0000b138, 0x00000000},
++	{0x0000b13c, 0x00000000},
++	{0x0000b140, 0x003f0020},
++	{0x0000b144, 0x00400041},
++	{0x0000b148, 0x0140005f},
++	{0x0000b14c, 0x0160015f},
++	{0x0000b150, 0x017e017f},
++	{0x0000b154, 0x02410242},
++	{0x0000b158, 0x025f0240},
++	{0x0000b15c, 0x027f0260},
++	{0x0000b160, 0x0341027e},
++	{0x0000b164, 0x035f0340},
++	{0x0000b168, 0x037f0360},
++	{0x0000b16c, 0x04400441},
++	{0x0000b170, 0x0460045f},
++	{0x0000b174, 0x0541047f},
++	{0x0000b178, 0x055f0540},
++	{0x0000b17c, 0x057f0560},
++	{0x0000b180, 0x06400641},
++	{0x0000b184, 0x0660065f},
++	{0x0000b188, 0x067e067f},
++	{0x0000b18c, 0x07410742},
++	{0x0000b190, 0x075f0740},
++	{0x0000b194, 0x077f0760},
++	{0x0000b198, 0x07800781},
++	{0x0000b19c, 0x07a0079f},
++	{0x0000b1a0, 0x07c107bf},
++	{0x0000b1a4, 0x000007c0},
++	{0x0000b1a8, 0x00000000},
++	{0x0000b1ac, 0x00000000},
++	{0x0000b1b0, 0x00000000},
++	{0x0000b1b4, 0x00000000},
++	{0x0000b1b8, 0x00000000},
++	{0x0000b1bc, 0x00000000},
++	{0x0000b1c0, 0x00000000},
++	{0x0000b1c4, 0x00000000},
++	{0x0000b1c8, 0x00000000},
++	{0x0000b1cc, 0x00000000},
++	{0x0000b1d0, 0x00000000},
++	{0x0000b1d4, 0x00000000},
++	{0x0000b1d8, 0x00000000},
++	{0x0000b1dc, 0x00000000},
++	{0x0000b1e0, 0x00000000},
++	{0x0000b1e4, 0x00000000},
++	{0x0000b1e8, 0x00000000},
++	{0x0000b1ec, 0x00000000},
++	{0x0000b1f0, 0x00000396},
++	{0x0000b1f4, 0x00000396},
++	{0x0000b1f8, 0x00000396},
++	{0x0000b1fc, 0x00000196},
++};
++
++static const u32 ar9462_pcie_phy_clkreq_disable_L1_1p0[][2] = {
++	/* Addr      allmodes  */
++	{0x00018c00, 0x10013e5e},
++	{0x00018c04, 0x000801d8},
++	{0x00018c08, 0x0000580c},
++};
++
++static const u32 ar9462_1p0_baseband_core_emulation[][2] = {
++	/* Addr      allmodes  */
++	{0x00009800, 0xafa68e30},
++	{0x00009884, 0x00002842},
++	{0x00009c04, 0xff55ff55},
++	{0x00009c08, 0x0320ff55},
++	{0x00009e50, 0x00000000},
++	{0x00009fcc, 0x00000014},
++	{0x0000a344, 0x00000010},
++	{0x0000a398, 0x00000000},
++	{0x0000a39c, 0x71733d01},
++	{0x0000a3a0, 0xd0ad5c12},
++	{0x0000a3c0, 0x22222220},
++	{0x0000a3c4, 0x22222222},
++	{0x0000a404, 0x00418a11},
++	{0x0000a418, 0x050001ce},
++	{0x0000a438, 0x00001800},
++	{0x0000a458, 0x01444452},
++	{0x0000a644, 0x3fad9d74},
++	{0x0000a690, 0x00000038},
++};
++
++static const u32 ar9462_1p0_radio_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00016000, 0x36db6db6},
++	{0x00016004, 0x6db6db40},
++	{0x00016008, 0x73f00000},
++	{0x0001600c, 0x00000000},
++	{0x00016010, 0x6d820001},
++	{0x00016040, 0x7f80fff8},
++	{0x0001604c, 0x2699e04f},
++	{0x00016050, 0x6db6db6c},
++	{0x00016054, 0x6db60000},
++	{0x00016058, 0x6c200000},
++	{0x00016080, 0x00040000},
++	{0x00016084, 0x9a68048c},
++	{0x00016088, 0x54214514},
++	{0x0001608c, 0x12030409},
++	{0x00016090, 0x24926490},
++	{0x00016098, 0xd2888888},
++	{0x000160a0, 0x0a108ffe},
++	{0x000160a4, 0x812fc490},
++	{0x000160a8, 0x423c8000},
++	{0x000160b4, 0x92000000},
++	{0x000160b8, 0x0285dddc},
++	{0x000160bc, 0x02908888},
++	{0x000160c0, 0x00adb6d0},
++	{0x000160c4, 0x6db6db60},
++	{0x000160c8, 0x6db6db6c},
++	{0x000160cc, 0x0de6c1b0},
++	{0x00016100, 0x3fffbe04},
++	{0x00016104, 0xfff80000},
++	{0x00016108, 0x00200400},
++	{0x00016110, 0x00000000},
++	{0x00016144, 0x02084080},
++	{0x00016148, 0x000080c0},
++	{0x00016280, 0x050a0001},
++	{0x00016284, 0x3d841400},
++	{0x00016288, 0x00000000},
++	{0x0001628c, 0xe3000000},
++	{0x00016290, 0xa1005080},
++	{0x00016294, 0x00000020},
++	{0x00016298, 0x50a02900},
++	{0x00016340, 0x121e4276},
++	{0x00016344, 0x00300000},
++	{0x00016400, 0x36db6db6},
++	{0x00016404, 0x6db6db40},
++	{0x00016408, 0x73f00000},
++	{0x0001640c, 0x00000000},
++	{0x00016410, 0x6c800001},
++	{0x00016440, 0x7f80fff8},
++	{0x0001644c, 0x4699e04f},
++	{0x00016450, 0x6db6db6c},
++	{0x00016454, 0x6db60000},
++	{0x00016500, 0x3fffbe04},
++	{0x00016504, 0xfff80000},
++	{0x00016508, 0x00200400},
++	{0x00016510, 0x00000000},
++	{0x00016544, 0x02084080},
++	{0x00016548, 0x000080c0},
++};
++
++static const u32 ar9462_1p0_soc_preamble[][2] = {
++	/* Addr      allmodes  */
++	{0x00007020, 0x00000000},
++	{0x00007034, 0x00000002},
++	{0x00007038, 0x000004c2},
++};
++
++static const u32 ar9462_1p0_sys2ant[][2] = {
++	/* Addr      allmodes  */
++	{0x00063120, 0x00801980},
++};
++
++#endif /* INITVALS_9462_1P0_H */
+--- /dev/null
++++ b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
+@@ -0,0 +1,1928 @@
++/*
++ * Copyright (c) 2010 Atheros Communications Inc.
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ */
++
++#ifndef INITVALS_9462_2P0_H
++#define INITVALS_9462_2P0_H
++
++/* AR9462 2.0 */
++
++static const u32 ar9462_modes_fast_clock_2p0[][3] = {
++	/* Addr      5G_HT20     5G_HT40   */
++	{0x00001030, 0x00000268, 0x000004d0},
++	{0x00001070, 0x0000018c, 0x00000318},
++	{0x000010b0, 0x00000fd0, 0x00001fa0},
++	{0x00008014, 0x044c044c, 0x08980898},
++	{0x0000801c, 0x148ec02b, 0x148ec057},
++	{0x00008318, 0x000044c0, 0x00008980},
++	{0x00009e00, 0x0372131c, 0x0372131c},
++	{0x0000a230, 0x0000400b, 0x00004016},
++	{0x0000a254, 0x00000898, 0x00001130},
++};
++
++static const u32 ar9462_pciephy_clkreq_enable_L1_2p0[][2] = {
++	/* Addr      allmodes  */
++	{0x00018c00, 0x18253ede},
++	{0x00018c04, 0x000801d8},
++	{0x00018c08, 0x0003580c},
++};
++
++static const u32 ar9462_2p0_baseband_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
++	{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
++	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
++	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
++	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
++	{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
++	{0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
++	{0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
++	{0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
++	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
++	{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
++	{0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3039605e, 0x33795d5e},
++	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
++	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
++	{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
++	{0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
++	{0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
++	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
++	{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
++	{0x0000a204, 0x013187c0, 0x013187c4, 0x013187c4, 0x013187c0},
++	{0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
++	{0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
++	{0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
++	{0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
++	{0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
++	{0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
++	{0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
++	{0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
++	{0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
++	{0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
++	{0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
++	{0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
++	{0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
++	{0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
++	{0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
++	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
++	{0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
++	{0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
++	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
++	{0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
++	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
++	{0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
++	{0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
++};
++
++static const u32 ar9462_2p0_mac_core_emulation[][2] = {
++	/* Addr      allmodes  */
++	{0x00000030, 0x000e0085},
++	{0x00000044, 0x00000008},
++	{0x0000805c, 0xffffc7ff},
++	{0x00008344, 0xaa4a105b},
++};
++
++static const u32 ar9462_common_rx_gain_table_2p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x00010000},
++	{0x0000a004, 0x00030002},
++	{0x0000a008, 0x00050004},
++	{0x0000a00c, 0x00810080},
++	{0x0000a010, 0x00830082},
++	{0x0000a014, 0x01810180},
++	{0x0000a018, 0x01830182},
++	{0x0000a01c, 0x01850184},
++	{0x0000a020, 0x01890188},
++	{0x0000a024, 0x018b018a},
++	{0x0000a028, 0x018d018c},
++	{0x0000a02c, 0x01910190},
++	{0x0000a030, 0x01930192},
++	{0x0000a034, 0x01950194},
++	{0x0000a038, 0x038a0196},
++	{0x0000a03c, 0x038c038b},
++	{0x0000a040, 0x0390038d},
++	{0x0000a044, 0x03920391},
++	{0x0000a048, 0x03940393},
++	{0x0000a04c, 0x03960395},
++	{0x0000a050, 0x00000000},
++	{0x0000a054, 0x00000000},
++	{0x0000a058, 0x00000000},
++	{0x0000a05c, 0x00000000},
++	{0x0000a060, 0x00000000},
++	{0x0000a064, 0x00000000},
++	{0x0000a068, 0x00000000},
++	{0x0000a06c, 0x00000000},
++	{0x0000a070, 0x00000000},
++	{0x0000a074, 0x00000000},
++	{0x0000a078, 0x00000000},
++	{0x0000a07c, 0x00000000},
++	{0x0000a080, 0x22222229},
++	{0x0000a084, 0x1d1d1d1d},
++	{0x0000a088, 0x1d1d1d1d},
++	{0x0000a08c, 0x1d1d1d1d},
++	{0x0000a090, 0x171d1d1d},
++	{0x0000a094, 0x11111717},
++	{0x0000a098, 0x00030311},
++	{0x0000a09c, 0x00000000},
++	{0x0000a0a0, 0x00000000},
++	{0x0000a0a4, 0x00000000},
++	{0x0000a0a8, 0x00000000},
++	{0x0000a0ac, 0x00000000},
++	{0x0000a0b0, 0x00000000},
++	{0x0000a0b4, 0x00000000},
++	{0x0000a0b8, 0x00000000},
++	{0x0000a0bc, 0x00000000},
++	{0x0000a0c0, 0x001f0000},
++	{0x0000a0c4, 0x01000101},
++	{0x0000a0c8, 0x011e011f},
++	{0x0000a0cc, 0x011c011d},
++	{0x0000a0d0, 0x02030204},
++	{0x0000a0d4, 0x02010202},
++	{0x0000a0d8, 0x021f0200},
++	{0x0000a0dc, 0x0302021e},
++	{0x0000a0e0, 0x03000301},
++	{0x0000a0e4, 0x031e031f},
++	{0x0000a0e8, 0x0402031d},
++	{0x0000a0ec, 0x04000401},
++	{0x0000a0f0, 0x041e041f},
++	{0x0000a0f4, 0x0502041d},
++	{0x0000a0f8, 0x05000501},
++	{0x0000a0fc, 0x051e051f},
++	{0x0000a100, 0x06010602},
++	{0x0000a104, 0x061f0600},
++	{0x0000a108, 0x061d061e},
++	{0x0000a10c, 0x07020703},
++	{0x0000a110, 0x07000701},
++	{0x0000a114, 0x00000000},
++	{0x0000a118, 0x00000000},
++	{0x0000a11c, 0x00000000},
++	{0x0000a120, 0x00000000},
++	{0x0000a124, 0x00000000},
++	{0x0000a128, 0x00000000},
++	{0x0000a12c, 0x00000000},
++	{0x0000a130, 0x00000000},
++	{0x0000a134, 0x00000000},
++	{0x0000a138, 0x00000000},
++	{0x0000a13c, 0x00000000},
++	{0x0000a140, 0x001f0000},
++	{0x0000a144, 0x01000101},
++	{0x0000a148, 0x011e011f},
++	{0x0000a14c, 0x011c011d},
++	{0x0000a150, 0x02030204},
++	{0x0000a154, 0x02010202},
++	{0x0000a158, 0x021f0200},
++	{0x0000a15c, 0x0302021e},
++	{0x0000a160, 0x03000301},
++	{0x0000a164, 0x031e031f},
++	{0x0000a168, 0x0402031d},
++	{0x0000a16c, 0x04000401},
++	{0x0000a170, 0x041e041f},
++	{0x0000a174, 0x0502041d},
++	{0x0000a178, 0x05000501},
++	{0x0000a17c, 0x051e051f},
++	{0x0000a180, 0x06010602},
++	{0x0000a184, 0x061f0600},
++	{0x0000a188, 0x061d061e},
++	{0x0000a18c, 0x07020703},
++	{0x0000a190, 0x07000701},
++	{0x0000a194, 0x00000000},
++	{0x0000a198, 0x00000000},
++	{0x0000a19c, 0x00000000},
++	{0x0000a1a0, 0x00000000},
++	{0x0000a1a4, 0x00000000},
++	{0x0000a1a8, 0x00000000},
++	{0x0000a1ac, 0x00000000},
++	{0x0000a1b0, 0x00000000},
++	{0x0000a1b4, 0x00000000},
++	{0x0000a1b8, 0x00000000},
++	{0x0000a1bc, 0x00000000},
++	{0x0000a1c0, 0x00000000},
++	{0x0000a1c4, 0x00000000},
++	{0x0000a1c8, 0x00000000},
++	{0x0000a1cc, 0x00000000},
++	{0x0000a1d0, 0x00000000},
++	{0x0000a1d4, 0x00000000},
++	{0x0000a1d8, 0x00000000},
++	{0x0000a1dc, 0x00000000},
++	{0x0000a1e0, 0x00000000},
++	{0x0000a1e4, 0x00000000},
++	{0x0000a1e8, 0x00000000},
++	{0x0000a1ec, 0x00000000},
++	{0x0000a1f0, 0x00000396},
++	{0x0000a1f4, 0x00000396},
++	{0x0000a1f8, 0x00000396},
++	{0x0000a1fc, 0x00000196},
++	{0x0000b000, 0x00010000},
++	{0x0000b004, 0x00030002},
++	{0x0000b008, 0x00050004},
++	{0x0000b00c, 0x00810080},
++	{0x0000b010, 0x00830082},
++	{0x0000b014, 0x01810180},
++	{0x0000b018, 0x01830182},
++	{0x0000b01c, 0x01850184},
++	{0x0000b020, 0x02810280},
++	{0x0000b024, 0x02830282},
++	{0x0000b028, 0x02850284},
++	{0x0000b02c, 0x02890288},
++	{0x0000b030, 0x028b028a},
++	{0x0000b034, 0x0388028c},
++	{0x0000b038, 0x038a0389},
++	{0x0000b03c, 0x038c038b},
++	{0x0000b040, 0x0390038d},
++	{0x0000b044, 0x03920391},
++	{0x0000b048, 0x03940393},
++	{0x0000b04c, 0x03960395},
++	{0x0000b050, 0x00000000},
++	{0x0000b054, 0x00000000},
++	{0x0000b058, 0x00000000},
++	{0x0000b05c, 0x00000000},
++	{0x0000b060, 0x00000000},
++	{0x0000b064, 0x00000000},
++	{0x0000b068, 0x00000000},
++	{0x0000b06c, 0x00000000},
++	{0x0000b070, 0x00000000},
++	{0x0000b074, 0x00000000},
++	{0x0000b078, 0x00000000},
++	{0x0000b07c, 0x00000000},
++	{0x0000b080, 0x2a2d2f32},
++	{0x0000b084, 0x21232328},
++	{0x0000b088, 0x19191c1e},
++	{0x0000b08c, 0x12141417},
++	{0x0000b090, 0x07070e0e},
++	{0x0000b094, 0x03030305},
++	{0x0000b098, 0x00000003},
++	{0x0000b09c, 0x00000000},
++	{0x0000b0a0, 0x00000000},
++	{0x0000b0a4, 0x00000000},
++	{0x0000b0a8, 0x00000000},
++	{0x0000b0ac, 0x00000000},
++	{0x0000b0b0, 0x00000000},
++	{0x0000b0b4, 0x00000000},
++	{0x0000b0b8, 0x00000000},
++	{0x0000b0bc, 0x00000000},
++	{0x0000b0c0, 0x003f0020},
++	{0x0000b0c4, 0x00400041},
++	{0x0000b0c8, 0x0140005f},
++	{0x0000b0cc, 0x0160015f},
++	{0x0000b0d0, 0x017e017f},
++	{0x0000b0d4, 0x02410242},
++	{0x0000b0d8, 0x025f0240},
++	{0x0000b0dc, 0x027f0260},
++	{0x0000b0e0, 0x0341027e},
++	{0x0000b0e4, 0x035f0340},
++	{0x0000b0e8, 0x037f0360},
++	{0x0000b0ec, 0x04400441},
++	{0x0000b0f0, 0x0460045f},
++	{0x0000b0f4, 0x0541047f},
++	{0x0000b0f8, 0x055f0540},
++	{0x0000b0fc, 0x057f0560},
++	{0x0000b100, 0x06400641},
++	{0x0000b104, 0x0660065f},
++	{0x0000b108, 0x067e067f},
++	{0x0000b10c, 0x07410742},
++	{0x0000b110, 0x075f0740},
++	{0x0000b114, 0x077f0760},
++	{0x0000b118, 0x07800781},
++	{0x0000b11c, 0x07a0079f},
++	{0x0000b120, 0x07c107bf},
++	{0x0000b124, 0x000007c0},
++	{0x0000b128, 0x00000000},
++	{0x0000b12c, 0x00000000},
++	{0x0000b130, 0x00000000},
++	{0x0000b134, 0x00000000},
++	{0x0000b138, 0x00000000},
++	{0x0000b13c, 0x00000000},
++	{0x0000b140, 0x003f0020},
++	{0x0000b144, 0x00400041},
++	{0x0000b148, 0x0140005f},
++	{0x0000b14c, 0x0160015f},
++	{0x0000b150, 0x017e017f},
++	{0x0000b154, 0x02410242},
++	{0x0000b158, 0x025f0240},
++	{0x0000b15c, 0x027f0260},
++	{0x0000b160, 0x0341027e},
++	{0x0000b164, 0x035f0340},
++	{0x0000b168, 0x037f0360},
++	{0x0000b16c, 0x04400441},
++	{0x0000b170, 0x0460045f},
++	{0x0000b174, 0x0541047f},
++	{0x0000b178, 0x055f0540},
++	{0x0000b17c, 0x057f0560},
++	{0x0000b180, 0x06400641},
++	{0x0000b184, 0x0660065f},
++	{0x0000b188, 0x067e067f},
++	{0x0000b18c, 0x07410742},
++	{0x0000b190, 0x075f0740},
++	{0x0000b194, 0x077f0760},
++	{0x0000b198, 0x07800781},
++	{0x0000b19c, 0x07a0079f},
++	{0x0000b1a0, 0x07c107bf},
++	{0x0000b1a4, 0x000007c0},
++	{0x0000b1a8, 0x00000000},
++	{0x0000b1ac, 0x00000000},
++	{0x0000b1b0, 0x00000000},
++	{0x0000b1b4, 0x00000000},
++	{0x0000b1b8, 0x00000000},
++	{0x0000b1bc, 0x00000000},
++	{0x0000b1c0, 0x00000000},
++	{0x0000b1c4, 0x00000000},
++	{0x0000b1c8, 0x00000000},
++	{0x0000b1cc, 0x00000000},
++	{0x0000b1d0, 0x00000000},
++	{0x0000b1d4, 0x00000000},
++	{0x0000b1d8, 0x00000000},
++	{0x0000b1dc, 0x00000000},
++	{0x0000b1e0, 0x00000000},
++	{0x0000b1e4, 0x00000000},
++	{0x0000b1e8, 0x00000000},
++	{0x0000b1ec, 0x00000000},
++	{0x0000b1f0, 0x00000396},
++	{0x0000b1f4, 0x00000396},
++	{0x0000b1f8, 0x00000396},
++	{0x0000b1fc, 0x00000196},
++};
++
++static const u32 ar9462_pciephy_clkreq_disable_L1_2p0[][2] = {
++	/* Addr      allmodes  */
++	{0x00018c00, 0x18213ede},
++	{0x00018c04, 0x000801d8},
++	{0x00018c08, 0x0003580c},
++};
++
++static const u32 ar9462_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
++	/* Addr      allmodes  */
++	{0x00018c00, 0x18212ede},
++	{0x00018c04, 0x000801d8},
++	{0x00018c08, 0x0003580c},
++};
++
++static const u32 ar9462_2p0_sys3ant[][2] = {
++	/* Addr      allmodes  */
++	{0x00063280, 0x00040807},
++	{0x00063284, 0x104ccccc},
++};
++
++static const u32 ar9462_common_rx_gain_table_ar9280_2p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x02000101},
++	{0x0000a004, 0x02000102},
++	{0x0000a008, 0x02000103},
++	{0x0000a00c, 0x02000104},
++	{0x0000a010, 0x02000200},
++	{0x0000a014, 0x02000201},
++	{0x0000a018, 0x02000202},
++	{0x0000a01c, 0x02000203},
++	{0x0000a020, 0x02000204},
++	{0x0000a024, 0x02000205},
++	{0x0000a028, 0x02000208},
++	{0x0000a02c, 0x02000302},
++	{0x0000a030, 0x02000303},
++	{0x0000a034, 0x02000304},
++	{0x0000a038, 0x02000400},
++	{0x0000a03c, 0x02010300},
++	{0x0000a040, 0x02010301},
++	{0x0000a044, 0x02010302},
++	{0x0000a048, 0x02000500},
++	{0x0000a04c, 0x02010400},
++	{0x0000a050, 0x02020300},
++	{0x0000a054, 0x02020301},
++	{0x0000a058, 0x02020302},
++	{0x0000a05c, 0x02020303},
++	{0x0000a060, 0x02020400},
++	{0x0000a064, 0x02030300},
++	{0x0000a068, 0x02030301},
++	{0x0000a06c, 0x02030302},
++	{0x0000a070, 0x02030303},
++	{0x0000a074, 0x02030400},
++	{0x0000a078, 0x02040300},
++	{0x0000a07c, 0x02040301},
++	{0x0000a080, 0x02040302},
++	{0x0000a084, 0x02040303},
++	{0x0000a088, 0x02030500},
++	{0x0000a08c, 0x02040400},
++	{0x0000a090, 0x02050203},
++	{0x0000a094, 0x02050204},
++	{0x0000a098, 0x02050205},
++	{0x0000a09c, 0x02040500},
++	{0x0000a0a0, 0x02050301},
++	{0x0000a0a4, 0x02050302},
++	{0x0000a0a8, 0x02050303},
++	{0x0000a0ac, 0x02050400},
++	{0x0000a0b0, 0x02050401},
++	{0x0000a0b4, 0x02050402},
++	{0x0000a0b8, 0x02050403},
++	{0x0000a0bc, 0x02050500},
++	{0x0000a0c0, 0x02050501},
++	{0x0000a0c4, 0x02050502},
++	{0x0000a0c8, 0x02050503},
++	{0x0000a0cc, 0x02050504},
++	{0x0000a0d0, 0x02050600},
++	{0x0000a0d4, 0x02050601},
++	{0x0000a0d8, 0x02050602},
++	{0x0000a0dc, 0x02050603},
++	{0x0000a0e0, 0x02050604},
++	{0x0000a0e4, 0x02050700},
++	{0x0000a0e8, 0x02050701},
++	{0x0000a0ec, 0x02050702},
++	{0x0000a0f0, 0x02050703},
++	{0x0000a0f4, 0x02050704},
++	{0x0000a0f8, 0x02050705},
++	{0x0000a0fc, 0x02050708},
++	{0x0000a100, 0x02050709},
++	{0x0000a104, 0x0205070a},
++	{0x0000a108, 0x0205070b},
++	{0x0000a10c, 0x0205070c},
++	{0x0000a110, 0x0205070d},
++	{0x0000a114, 0x02050710},
++	{0x0000a118, 0x02050711},
++	{0x0000a11c, 0x02050712},
++	{0x0000a120, 0x02050713},
++	{0x0000a124, 0x02050714},
++	{0x0000a128, 0x02050715},
++	{0x0000a12c, 0x02050730},
++	{0x0000a130, 0x02050731},
++	{0x0000a134, 0x02050732},
++	{0x0000a138, 0x02050733},
++	{0x0000a13c, 0x02050734},
++	{0x0000a140, 0x02050735},
++	{0x0000a144, 0x02050750},
++	{0x0000a148, 0x02050751},
++	{0x0000a14c, 0x02050752},
++	{0x0000a150, 0x02050753},
++	{0x0000a154, 0x02050754},
++	{0x0000a158, 0x02050755},
++	{0x0000a15c, 0x02050770},
++	{0x0000a160, 0x02050771},
++	{0x0000a164, 0x02050772},
++	{0x0000a168, 0x02050773},
++	{0x0000a16c, 0x02050774},
++	{0x0000a170, 0x02050775},
++	{0x0000a174, 0x00000776},
++	{0x0000a178, 0x00000776},
++	{0x0000a17c, 0x00000776},
++	{0x0000a180, 0x00000776},
++	{0x0000a184, 0x00000776},
++	{0x0000a188, 0x00000776},
++	{0x0000a18c, 0x00000776},
++	{0x0000a190, 0x00000776},
++	{0x0000a194, 0x00000776},
++	{0x0000a198, 0x00000776},
++	{0x0000a19c, 0x00000776},
++	{0x0000a1a0, 0x00000776},
++	{0x0000a1a4, 0x00000776},
++	{0x0000a1a8, 0x00000776},
++	{0x0000a1ac, 0x00000776},
++	{0x0000a1b0, 0x00000776},
++	{0x0000a1b4, 0x00000776},
++	{0x0000a1b8, 0x00000776},
++	{0x0000a1bc, 0x00000776},
++	{0x0000a1c0, 0x00000776},
++	{0x0000a1c4, 0x00000776},
++	{0x0000a1c8, 0x00000776},
++	{0x0000a1cc, 0x00000776},
++	{0x0000a1d0, 0x00000776},
++	{0x0000a1d4, 0x00000776},
++	{0x0000a1d8, 0x00000776},
++	{0x0000a1dc, 0x00000776},
++	{0x0000a1e0, 0x00000776},
++	{0x0000a1e4, 0x00000776},
++	{0x0000a1e8, 0x00000776},
++	{0x0000a1ec, 0x00000776},
++	{0x0000a1f0, 0x00000776},
++	{0x0000a1f4, 0x00000776},
++	{0x0000a1f8, 0x00000776},
++	{0x0000a1fc, 0x00000776},
++	{0x0000b000, 0x02000101},
++	{0x0000b004, 0x02000102},
++	{0x0000b008, 0x02000103},
++	{0x0000b00c, 0x02000104},
++	{0x0000b010, 0x02000200},
++	{0x0000b014, 0x02000201},
++	{0x0000b018, 0x02000202},
++	{0x0000b01c, 0x02000203},
++	{0x0000b020, 0x02000204},
++	{0x0000b024, 0x02000205},
++	{0x0000b028, 0x02000208},
++	{0x0000b02c, 0x02000302},
++	{0x0000b030, 0x02000303},
++	{0x0000b034, 0x02000304},
++	{0x0000b038, 0x02000400},
++	{0x0000b03c, 0x02010300},
++	{0x0000b040, 0x02010301},
++	{0x0000b044, 0x02010302},
++	{0x0000b048, 0x02000500},
++	{0x0000b04c, 0x02010400},
++	{0x0000b050, 0x02020300},
++	{0x0000b054, 0x02020301},
++	{0x0000b058, 0x02020302},
++	{0x0000b05c, 0x02020303},
++	{0x0000b060, 0x02020400},
++	{0x0000b064, 0x02030300},
++	{0x0000b068, 0x02030301},
++	{0x0000b06c, 0x02030302},
++	{0x0000b070, 0x02030303},
++	{0x0000b074, 0x02030400},
++	{0x0000b078, 0x02040300},
++	{0x0000b07c, 0x02040301},
++	{0x0000b080, 0x02040302},
++	{0x0000b084, 0x02040303},
++	{0x0000b088, 0x02030500},
++	{0x0000b08c, 0x02040400},
++	{0x0000b090, 0x02050203},
++	{0x0000b094, 0x02050204},
++	{0x0000b098, 0x02050205},
++	{0x0000b09c, 0x02040500},
++	{0x0000b0a0, 0x02050301},
++	{0x0000b0a4, 0x02050302},
++	{0x0000b0a8, 0x02050303},
++	{0x0000b0ac, 0x02050400},
++	{0x0000b0b0, 0x02050401},
++	{0x0000b0b4, 0x02050402},
++	{0x0000b0b8, 0x02050403},
++	{0x0000b0bc, 0x02050500},
++	{0x0000b0c0, 0x02050501},
++	{0x0000b0c4, 0x02050502},
++	{0x0000b0c8, 0x02050503},
++	{0x0000b0cc, 0x02050504},
++	{0x0000b0d0, 0x02050600},
++	{0x0000b0d4, 0x02050601},
++	{0x0000b0d8, 0x02050602},
++	{0x0000b0dc, 0x02050603},
++	{0x0000b0e0, 0x02050604},
++	{0x0000b0e4, 0x02050700},
++	{0x0000b0e8, 0x02050701},
++	{0x0000b0ec, 0x02050702},
++	{0x0000b0f0, 0x02050703},
++	{0x0000b0f4, 0x02050704},
++	{0x0000b0f8, 0x02050705},
++	{0x0000b0fc, 0x02050708},
++	{0x0000b100, 0x02050709},
++	{0x0000b104, 0x0205070a},
++	{0x0000b108, 0x0205070b},
++	{0x0000b10c, 0x0205070c},
++	{0x0000b110, 0x0205070d},
++	{0x0000b114, 0x02050710},
++	{0x0000b118, 0x02050711},
++	{0x0000b11c, 0x02050712},
++	{0x0000b120, 0x02050713},
++	{0x0000b124, 0x02050714},
++	{0x0000b128, 0x02050715},
++	{0x0000b12c, 0x02050730},
++	{0x0000b130, 0x02050731},
++	{0x0000b134, 0x02050732},
++	{0x0000b138, 0x02050733},
++	{0x0000b13c, 0x02050734},
++	{0x0000b140, 0x02050735},
++	{0x0000b144, 0x02050750},
++	{0x0000b148, 0x02050751},
++	{0x0000b14c, 0x02050752},
++	{0x0000b150, 0x02050753},
++	{0x0000b154, 0x02050754},
++	{0x0000b158, 0x02050755},
++	{0x0000b15c, 0x02050770},
++	{0x0000b160, 0x02050771},
++	{0x0000b164, 0x02050772},
++	{0x0000b168, 0x02050773},
++	{0x0000b16c, 0x02050774},
++	{0x0000b170, 0x02050775},
++	{0x0000b174, 0x00000776},
++	{0x0000b178, 0x00000776},
++	{0x0000b17c, 0x00000776},
++	{0x0000b180, 0x00000776},
++	{0x0000b184, 0x00000776},
++	{0x0000b188, 0x00000776},
++	{0x0000b18c, 0x00000776},
++	{0x0000b190, 0x00000776},
++	{0x0000b194, 0x00000776},
++	{0x0000b198, 0x00000776},
++	{0x0000b19c, 0x00000776},
++	{0x0000b1a0, 0x00000776},
++	{0x0000b1a4, 0x00000776},
++	{0x0000b1a8, 0x00000776},
++	{0x0000b1ac, 0x00000776},
++	{0x0000b1b0, 0x00000776},
++	{0x0000b1b4, 0x00000776},
++	{0x0000b1b8, 0x00000776},
++	{0x0000b1bc, 0x00000776},
++	{0x0000b1c0, 0x00000776},
++	{0x0000b1c4, 0x00000776},
++	{0x0000b1c8, 0x00000776},
++	{0x0000b1cc, 0x00000776},
++	{0x0000b1d0, 0x00000776},
++	{0x0000b1d4, 0x00000776},
++	{0x0000b1d8, 0x00000776},
++	{0x0000b1dc, 0x00000776},
++	{0x0000b1e0, 0x00000776},
++	{0x0000b1e4, 0x00000776},
++	{0x0000b1e8, 0x00000776},
++	{0x0000b1ec, 0x00000776},
++	{0x0000b1f0, 0x00000776},
++	{0x0000b1f4, 0x00000776},
++	{0x0000b1f8, 0x00000776},
++	{0x0000b1fc, 0x00000776},
++};
++
++static const u32 ar9200_ar9280_2p0_radio_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00007800, 0x00040000},
++	{0x00007804, 0xdb005012},
++	{0x00007808, 0x04924914},
++	{0x0000780c, 0x21084210},
++	{0x00007810, 0x6d801300},
++	{0x00007814, 0x0019beff},
++	{0x00007818, 0x07e41000},
++	{0x0000781c, 0x00392000},
++	{0x00007820, 0x92592480},
++	{0x00007824, 0x00040000},
++	{0x00007828, 0xdb005012},
++	{0x0000782c, 0x04924914},
++	{0x00007830, 0x21084210},
++	{0x00007834, 0x6d801300},
++	{0x00007838, 0x0019beff},
++	{0x0000783c, 0x07e40000},
++	{0x00007840, 0x00392000},
++	{0x00007844, 0x92592480},
++	{0x00007848, 0x00100000},
++	{0x0000784c, 0x773f0567},
++	{0x00007850, 0x54214514},
++	{0x00007854, 0x12035828},
++	{0x00007858, 0x92592692},
++	{0x0000785c, 0x00000000},
++	{0x00007860, 0x56400000},
++	{0x00007864, 0x0a8e370e},
++	{0x00007868, 0xc0102850},
++	{0x0000786c, 0x812d4000},
++	{0x00007870, 0x807ec400},
++	{0x00007874, 0x001b6db0},
++	{0x00007878, 0x00376b63},
++	{0x0000787c, 0x06db6db6},
++	{0x00007880, 0x006d8000},
++	{0x00007884, 0xffeffffe},
++	{0x00007888, 0xffeffffe},
++	{0x0000788c, 0x00010000},
++	{0x00007890, 0x02060aeb},
++	{0x00007894, 0x5a108000},
++};
++
++static const u32 ar9462_2p0_mac_postamble_emulation[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
++	{0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
++};
++
++static const u32 ar9462_2p0_radio_postamble_sys3ant[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
++	{0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
++	{0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
++};
++
++static const u32 ar9462_2p0_baseband_postamble_emulation[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
++	{0x00009e44, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000},
++	{0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
++	{0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
++	{0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
++	{0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
++	{0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
++	{0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
++	{0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
++	{0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
++	{0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
++	{0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
++	{0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
++	{0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
++	{0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
++	{0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
++	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++};
++
++static const u32 ar9462_2p0_radio_postamble_sys2ant[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
++	{0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
++	{0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
++};
++
++static const u32 ar9462_common_wo_xlna_rx_gain_table_2p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x00010000},
++	{0x0000a004, 0x00030002},
++	{0x0000a008, 0x00050004},
++	{0x0000a00c, 0x00810080},
++	{0x0000a010, 0x00830082},
++	{0x0000a014, 0x01810180},
++	{0x0000a018, 0x01830182},
++	{0x0000a01c, 0x01850184},
++	{0x0000a020, 0x01890188},
++	{0x0000a024, 0x018b018a},
++	{0x0000a028, 0x018d018c},
++	{0x0000a02c, 0x03820190},
++	{0x0000a030, 0x03840383},
++	{0x0000a034, 0x03880385},
++	{0x0000a038, 0x038a0389},
++	{0x0000a03c, 0x038c038b},
++	{0x0000a040, 0x0390038d},
++	{0x0000a044, 0x03920391},
++	{0x0000a048, 0x03940393},
++	{0x0000a04c, 0x03960395},
++	{0x0000a050, 0x00000000},
++	{0x0000a054, 0x00000000},
++	{0x0000a058, 0x00000000},
++	{0x0000a05c, 0x00000000},
++	{0x0000a060, 0x00000000},
++	{0x0000a064, 0x00000000},
++	{0x0000a068, 0x00000000},
++	{0x0000a06c, 0x00000000},
++	{0x0000a070, 0x00000000},
++	{0x0000a074, 0x00000000},
++	{0x0000a078, 0x00000000},
++	{0x0000a07c, 0x00000000},
++	{0x0000a080, 0x29292929},
++	{0x0000a084, 0x29292929},
++	{0x0000a088, 0x29292929},
++	{0x0000a08c, 0x29292929},
++	{0x0000a090, 0x22292929},
++	{0x0000a094, 0x1d1d2222},
++	{0x0000a098, 0x0c111117},
++	{0x0000a09c, 0x00030303},
++	{0x0000a0a0, 0x00000000},
++	{0x0000a0a4, 0x00000000},
++	{0x0000a0a8, 0x00000000},
++	{0x0000a0ac, 0x00000000},
++	{0x0000a0b0, 0x00000000},
++	{0x0000a0b4, 0x00000000},
++	{0x0000a0b8, 0x00000000},
++	{0x0000a0bc, 0x00000000},
++	{0x0000a0c0, 0x001f0000},
++	{0x0000a0c4, 0x01000101},
++	{0x0000a0c8, 0x011e011f},
++	{0x0000a0cc, 0x011c011d},
++	{0x0000a0d0, 0x02030204},
++	{0x0000a0d4, 0x02010202},
++	{0x0000a0d8, 0x021f0200},
++	{0x0000a0dc, 0x0302021e},
++	{0x0000a0e0, 0x03000301},
++	{0x0000a0e4, 0x031e031f},
++	{0x0000a0e8, 0x0402031d},
++	{0x0000a0ec, 0x04000401},
++	{0x0000a0f0, 0x041e041f},
++	{0x0000a0f4, 0x0502041d},
++	{0x0000a0f8, 0x05000501},
++	{0x0000a0fc, 0x051e051f},
++	{0x0000a100, 0x06010602},
++	{0x0000a104, 0x061f0600},
++	{0x0000a108, 0x061d061e},
++	{0x0000a10c, 0x07020703},
++	{0x0000a110, 0x07000701},
++	{0x0000a114, 0x00000000},
++	{0x0000a118, 0x00000000},
++	{0x0000a11c, 0x00000000},
++	{0x0000a120, 0x00000000},
++	{0x0000a124, 0x00000000},
++	{0x0000a128, 0x00000000},
++	{0x0000a12c, 0x00000000},
++	{0x0000a130, 0x00000000},
++	{0x0000a134, 0x00000000},
++	{0x0000a138, 0x00000000},
++	{0x0000a13c, 0x00000000},
++	{0x0000a140, 0x001f0000},
++	{0x0000a144, 0x01000101},
++	{0x0000a148, 0x011e011f},
++	{0x0000a14c, 0x011c011d},
++	{0x0000a150, 0x02030204},
++	{0x0000a154, 0x02010202},
++	{0x0000a158, 0x021f0200},
++	{0x0000a15c, 0x0302021e},
++	{0x0000a160, 0x03000301},
++	{0x0000a164, 0x031e031f},
++	{0x0000a168, 0x0402031d},
++	{0x0000a16c, 0x04000401},
++	{0x0000a170, 0x041e041f},
++	{0x0000a174, 0x0502041d},
++	{0x0000a178, 0x05000501},
++	{0x0000a17c, 0x051e051f},
++	{0x0000a180, 0x06010602},
++	{0x0000a184, 0x061f0600},
++	{0x0000a188, 0x061d061e},
++	{0x0000a18c, 0x07020703},
++	{0x0000a190, 0x07000701},
++	{0x0000a194, 0x00000000},
++	{0x0000a198, 0x00000000},
++	{0x0000a19c, 0x00000000},
++	{0x0000a1a0, 0x00000000},
++	{0x0000a1a4, 0x00000000},
++	{0x0000a1a8, 0x00000000},
++	{0x0000a1ac, 0x00000000},
++	{0x0000a1b0, 0x00000000},
++	{0x0000a1b4, 0x00000000},
++	{0x0000a1b8, 0x00000000},
++	{0x0000a1bc, 0x00000000},
++	{0x0000a1c0, 0x00000000},
++	{0x0000a1c4, 0x00000000},
++	{0x0000a1c8, 0x00000000},
++	{0x0000a1cc, 0x00000000},
++	{0x0000a1d0, 0x00000000},
++	{0x0000a1d4, 0x00000000},
++	{0x0000a1d8, 0x00000000},
++	{0x0000a1dc, 0x00000000},
++	{0x0000a1e0, 0x00000000},
++	{0x0000a1e4, 0x00000000},
++	{0x0000a1e8, 0x00000000},
++	{0x0000a1ec, 0x00000000},
++	{0x0000a1f0, 0x00000396},
++	{0x0000a1f4, 0x00000396},
++	{0x0000a1f8, 0x00000396},
++	{0x0000a1fc, 0x00000196},
++	{0x0000b000, 0x00010000},
++	{0x0000b004, 0x00030002},
++	{0x0000b008, 0x00050004},
++	{0x0000b00c, 0x00810080},
++	{0x0000b010, 0x00830082},
++	{0x0000b014, 0x01810180},
++	{0x0000b018, 0x01830182},
++	{0x0000b01c, 0x01850184},
++	{0x0000b020, 0x02810280},
++	{0x0000b024, 0x02830282},
++	{0x0000b028, 0x02850284},
++	{0x0000b02c, 0x02890288},
++	{0x0000b030, 0x028b028a},
++	{0x0000b034, 0x0388028c},
++	{0x0000b038, 0x038a0389},
++	{0x0000b03c, 0x038c038b},
++	{0x0000b040, 0x0390038d},
++	{0x0000b044, 0x03920391},
++	{0x0000b048, 0x03940393},
++	{0x0000b04c, 0x03960395},
++	{0x0000b050, 0x00000000},
++	{0x0000b054, 0x00000000},
++	{0x0000b058, 0x00000000},
++	{0x0000b05c, 0x00000000},
++	{0x0000b060, 0x00000000},
++	{0x0000b064, 0x00000000},
++	{0x0000b068, 0x00000000},
++	{0x0000b06c, 0x00000000},
++	{0x0000b070, 0x00000000},
++	{0x0000b074, 0x00000000},
++	{0x0000b078, 0x00000000},
++	{0x0000b07c, 0x00000000},
++	{0x0000b080, 0x32323232},
++	{0x0000b084, 0x2f2f3232},
++	{0x0000b088, 0x23282a2d},
++	{0x0000b08c, 0x1c1e2123},
++	{0x0000b090, 0x14171919},
++	{0x0000b094, 0x0e0e1214},
++	{0x0000b098, 0x03050707},
++	{0x0000b09c, 0x00030303},
++	{0x0000b0a0, 0x00000000},
++	{0x0000b0a4, 0x00000000},
++	{0x0000b0a8, 0x00000000},
++	{0x0000b0ac, 0x00000000},
++	{0x0000b0b0, 0x00000000},
++	{0x0000b0b4, 0x00000000},
++	{0x0000b0b8, 0x00000000},
++	{0x0000b0bc, 0x00000000},
++	{0x0000b0c0, 0x003f0020},
++	{0x0000b0c4, 0x00400041},
++	{0x0000b0c8, 0x0140005f},
++	{0x0000b0cc, 0x0160015f},
++	{0x0000b0d0, 0x017e017f},
++	{0x0000b0d4, 0x02410242},
++	{0x0000b0d8, 0x025f0240},
++	{0x0000b0dc, 0x027f0260},
++	{0x0000b0e0, 0x0341027e},
++	{0x0000b0e4, 0x035f0340},
++	{0x0000b0e8, 0x037f0360},
++	{0x0000b0ec, 0x04400441},
++	{0x0000b0f0, 0x0460045f},
++	{0x0000b0f4, 0x0541047f},
++	{0x0000b0f8, 0x055f0540},
++	{0x0000b0fc, 0x057f0560},
++	{0x0000b100, 0x06400641},
++	{0x0000b104, 0x0660065f},
++	{0x0000b108, 0x067e067f},
++	{0x0000b10c, 0x07410742},
++	{0x0000b110, 0x075f0740},
++	{0x0000b114, 0x077f0760},
++	{0x0000b118, 0x07800781},
++	{0x0000b11c, 0x07a0079f},
++	{0x0000b120, 0x07c107bf},
++	{0x0000b124, 0x000007c0},
++	{0x0000b128, 0x00000000},
++	{0x0000b12c, 0x00000000},
++	{0x0000b130, 0x00000000},
++	{0x0000b134, 0x00000000},
++	{0x0000b138, 0x00000000},
++	{0x0000b13c, 0x00000000},
++	{0x0000b140, 0x003f0020},
++	{0x0000b144, 0x00400041},
++	{0x0000b148, 0x0140005f},
++	{0x0000b14c, 0x0160015f},
++	{0x0000b150, 0x017e017f},
++	{0x0000b154, 0x02410242},
++	{0x0000b158, 0x025f0240},
++	{0x0000b15c, 0x027f0260},
++	{0x0000b160, 0x0341027e},
++	{0x0000b164, 0x035f0340},
++	{0x0000b168, 0x037f0360},
++	{0x0000b16c, 0x04400441},
++	{0x0000b170, 0x0460045f},
++	{0x0000b174, 0x0541047f},
++	{0x0000b178, 0x055f0540},
++	{0x0000b17c, 0x057f0560},
++	{0x0000b180, 0x06400641},
++	{0x0000b184, 0x0660065f},
++	{0x0000b188, 0x067e067f},
++	{0x0000b18c, 0x07410742},
++	{0x0000b190, 0x075f0740},
++	{0x0000b194, 0x077f0760},
++	{0x0000b198, 0x07800781},
++	{0x0000b19c, 0x07a0079f},
++	{0x0000b1a0, 0x07c107bf},
++	{0x0000b1a4, 0x000007c0},
++	{0x0000b1a8, 0x00000000},
++	{0x0000b1ac, 0x00000000},
++	{0x0000b1b0, 0x00000000},
++	{0x0000b1b4, 0x00000000},
++	{0x0000b1b8, 0x00000000},
++	{0x0000b1bc, 0x00000000},
++	{0x0000b1c0, 0x00000000},
++	{0x0000b1c4, 0x00000000},
++	{0x0000b1c8, 0x00000000},
++	{0x0000b1cc, 0x00000000},
++	{0x0000b1d0, 0x00000000},
++	{0x0000b1d4, 0x00000000},
++	{0x0000b1d8, 0x00000000},
++	{0x0000b1dc, 0x00000000},
++	{0x0000b1e0, 0x00000000},
++	{0x0000b1e4, 0x00000000},
++	{0x0000b1e8, 0x00000000},
++	{0x0000b1ec, 0x00000000},
++	{0x0000b1f0, 0x00000396},
++	{0x0000b1f4, 0x00000396},
++	{0x0000b1f8, 0x00000396},
++	{0x0000b1fc, 0x00000196},
++};
++
++static const u32 ar9462_2p0_baseband_core_txfir_coeff_japan_2484[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a398, 0x00000000},
++	{0x0000a39c, 0x6f7f0301},
++	{0x0000a3a0, 0xca9228ee},
++};
++
++static const u32 ar9462_modes_low_ob_db_tx_gain_table_2p0[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
++	{0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++	{0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++	{0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
++	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
++	{0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
++	{0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
++	{0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
++	{0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
++	{0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
++	{0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
++	{0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
++	{0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
++	{0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
++	{0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
++	{0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
++	{0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
++	{0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
++	{0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
++	{0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
++	{0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
++	{0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
++	{0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
++	{0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
++	{0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
++	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
++	{0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
++	{0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
++	{0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
++	{0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++	{0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
++	{0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
++	{0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
++	{0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
++	{0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
++	{0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
++	{0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
++	{0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
++	{0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
++	{0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
++	{0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
++};
++
++static const u32 ar9462_2p0_soc_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
++};
++
++static const u32 ar9462_2p0_baseband_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00009800, 0xafe68e30},
++	{0x00009804, 0xfd14e000},
++	{0x00009808, 0x9c0a9f6b},
++	{0x0000980c, 0x04900000},
++	{0x00009814, 0x9280c00a},
++	{0x00009818, 0x00000000},
++	{0x0000981c, 0x00020028},
++	{0x00009834, 0x6400a290},
++	{0x00009838, 0x0108ecff},
++	{0x0000983c, 0x0d000600},
++	{0x00009880, 0x201fff00},
++	{0x00009884, 0x00001042},
++	{0x000098a4, 0x00200400},
++	{0x000098b0, 0x32440bbe},
++	{0x000098d0, 0x004b6a8e},
++	{0x000098d4, 0x00000820},
++	{0x000098dc, 0x00000000},
++	{0x000098e4, 0x01ffffff},
++	{0x000098e8, 0x01ffffff},
++	{0x000098ec, 0x01ffffff},
++	{0x000098f0, 0x00000000},
++	{0x000098f4, 0x00000000},
++	{0x00009bf0, 0x80000000},
++	{0x00009c04, 0xff55ff55},
++	{0x00009c08, 0x0320ff55},
++	{0x00009c0c, 0x00000000},
++	{0x00009c10, 0x00000000},
++	{0x00009c14, 0x00046384},
++	{0x00009c18, 0x05b6b440},
++	{0x00009c1c, 0x00b6b440},
++	{0x00009d00, 0xc080a333},
++	{0x00009d04, 0x40206c10},
++	{0x00009d08, 0x009c4060},
++	{0x00009d0c, 0x9883800a},
++	{0x00009d10, 0x01834061},
++	{0x00009d14, 0x00c0040b},
++	{0x00009d18, 0x00000000},
++	{0x00009e08, 0x0038230c},
++	{0x00009e24, 0x990bb515},
++	{0x00009e28, 0x0c6f0000},
++	{0x00009e30, 0x06336f77},
++	{0x00009e34, 0x6af6532f},
++	{0x00009e38, 0x0cc80c00},
++	{0x00009e40, 0x0d261820},
++	{0x00009e4c, 0x00001004},
++	{0x00009e50, 0x00ff03f1},
++	{0x00009e54, 0xe4c355c7},
++	{0x00009e58, 0xfd897735},
++	{0x00009e5c, 0xe9198724},
++	{0x00009fc0, 0x803e4788},
++	{0x00009fc4, 0x0001efb5},
++	{0x00009fcc, 0x40000014},
++	{0x00009fd0, 0x01193b93},
++	{0x0000a20c, 0x00000000},
++	{0x0000a220, 0x00000000},
++	{0x0000a224, 0x00000000},
++	{0x0000a228, 0x10002310},
++	{0x0000a23c, 0x00000000},
++	{0x0000a244, 0x0c000000},
++	{0x0000a2a0, 0x00000001},
++	{0x0000a2c0, 0x00000001},
++	{0x0000a2c8, 0x00000000},
++	{0x0000a2cc, 0x18c43433},
++	{0x0000a2d4, 0x00000000},
++	{0x0000a2ec, 0x00000000},
++	{0x0000a2f0, 0x00000000},
++	{0x0000a2f4, 0x00000000},
++	{0x0000a2f8, 0x00000000},
++	{0x0000a344, 0x00000000},
++	{0x0000a34c, 0x00000000},
++	{0x0000a350, 0x0000a000},
++	{0x0000a364, 0x00000000},
++	{0x0000a370, 0x00000000},
++	{0x0000a390, 0x00000001},
++	{0x0000a394, 0x00000444},
++	{0x0000a398, 0x001f0e0f},
++	{0x0000a39c, 0x0075393f},
++	{0x0000a3a0, 0xb79f6427},
++	{0x0000a3a4, 0x00000000},
++	{0x0000a3a8, 0xaaaaaaaa},
++	{0x0000a3ac, 0x3c466478},
++	{0x0000a3c0, 0x20202020},
++	{0x0000a3c4, 0x22222220},
++	{0x0000a3c8, 0x20200020},
++	{0x0000a3cc, 0x20202020},
++	{0x0000a3d0, 0x20202020},
++	{0x0000a3d4, 0x20202020},
++	{0x0000a3d8, 0x20202020},
++	{0x0000a3dc, 0x20202020},
++	{0x0000a3e0, 0x20202020},
++	{0x0000a3e4, 0x20202020},
++	{0x0000a3e8, 0x20202020},
++	{0x0000a3ec, 0x20202020},
++	{0x0000a3f0, 0x00000000},
++	{0x0000a3f4, 0x00000006},
++	{0x0000a3f8, 0x0c9bd380},
++	{0x0000a3fc, 0x000f0f01},
++	{0x0000a400, 0x8fa91f01},
++	{0x0000a404, 0x00000000},
++	{0x0000a408, 0x0e79e5c6},
++	{0x0000a40c, 0x00820820},
++	{0x0000a414, 0x1ce739ce},
++	{0x0000a418, 0x2d001dce},
++	{0x0000a41c, 0x1ce739ce},
++	{0x0000a420, 0x000001ce},
++	{0x0000a424, 0x1ce739ce},
++	{0x0000a428, 0x000001ce},
++	{0x0000a42c, 0x1ce739ce},
++	{0x0000a430, 0x1ce739ce},
++	{0x0000a434, 0x00000000},
++	{0x0000a438, 0x00001801},
++	{0x0000a43c, 0x00100000},
++	{0x0000a444, 0x00000000},
++	{0x0000a448, 0x05000080},
++	{0x0000a44c, 0x00000001},
++	{0x0000a450, 0x00010000},
++	{0x0000a454, 0x07000000},
++	{0x0000a644, 0xbfad9d74},
++	{0x0000a648, 0x0048060a},
++	{0x0000a64c, 0x00002037},
++	{0x0000a670, 0x03020100},
++	{0x0000a674, 0x09080504},
++	{0x0000a678, 0x0d0c0b0a},
++	{0x0000a67c, 0x13121110},
++	{0x0000a680, 0x31301514},
++	{0x0000a684, 0x35343332},
++	{0x0000a688, 0x00000036},
++	{0x0000a690, 0x00000838},
++	{0x0000a6b0, 0x0000000a},
++	{0x0000a6b4, 0x00512c01},
++	{0x0000a7c0, 0x00000000},
++	{0x0000a7c4, 0xfffffffc},
++	{0x0000a7c8, 0x00000000},
++	{0x0000a7cc, 0x00000000},
++	{0x0000a7d0, 0x00000000},
++	{0x0000a7d4, 0x00000004},
++	{0x0000a7dc, 0x00000001},
++	{0x0000a7f0, 0x80000000},
++	{0x0000a8d0, 0x004b6a8e},
++	{0x0000a8d4, 0x00000820},
++	{0x0000a8dc, 0x00000000},
++	{0x0000a8f0, 0x00000000},
++	{0x0000a8f4, 0x00000000},
++	{0x0000abf0, 0x80000000},
++	{0x0000b2d0, 0x00000080},
++	{0x0000b2d4, 0x00000000},
++	{0x0000b2ec, 0x00000000},
++	{0x0000b2f0, 0x00000000},
++	{0x0000b2f4, 0x00000000},
++	{0x0000b2f8, 0x00000000},
++	{0x0000b408, 0x0e79e5c0},
++	{0x0000b40c, 0x00820820},
++	{0x0000b420, 0x00000000},
++	{0x0000b6b0, 0x0000000a},
++	{0x0000b6b4, 0x00000001},
++};
++
++static const u32 ar9462_2p0_radio_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
++	{0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
++	{0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
++	{0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
++};
++
++static const u32 ar9462_modes_high_ob_db_tx_gain_table_2p0[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
++	{0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
++	{0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
++	{0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
++	{0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
++	{0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
++	{0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
++	{0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
++	{0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
++	{0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
++	{0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
++	{0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
++	{0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
++	{0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
++	{0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
++	{0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
++	{0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
++	{0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
++	{0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
++	{0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
++	{0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
++	{0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
++	{0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
++	{0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
++	{0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
++	{0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
++	{0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
++	{0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
++	{0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
++	{0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
++	{0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
++	{0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
++	{0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
++	{0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
++	{0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
++	{0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
++	{0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
++	{0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
++	{0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
++	{0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
++	{0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
++	{0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
++	{0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
++};
++
++static const u32 ar9462_2p0_radio_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00016000, 0x36db6db6},
++	{0x00016004, 0x6db6db40},
++	{0x00016008, 0x73f00000},
++	{0x0001600c, 0x00000000},
++	{0x00016010, 0x6d820001},
++	{0x00016040, 0x7f80fff8},
++	{0x0001604c, 0x2699e04f},
++	{0x00016050, 0x6db6db6c},
++	{0x00016058, 0x6c200000},
++	{0x00016080, 0x00040000},
++	{0x00016084, 0x9a68048c},
++	{0x00016088, 0x54214514},
++	{0x0001608c, 0x1203040b},
++	{0x00016090, 0x24926490},
++	{0x00016098, 0xd2888888},
++	{0x000160a0, 0x0a108ffe},
++	{0x000160a4, 0x812fc491},
++	{0x000160a8, 0x423c8000},
++	{0x000160b4, 0x92000000},
++	{0x000160b8, 0x0285dddc},
++	{0x000160bc, 0x02908888},
++	{0x000160c0, 0x00adb6d0},
++	{0x000160c4, 0x6db6db60},
++	{0x000160c8, 0x6db6db6c},
++	{0x000160cc, 0x0de6c1b0},
++	{0x00016100, 0x3fffbe04},
++	{0x00016104, 0xfff80000},
++	{0x00016108, 0x00200400},
++	{0x00016110, 0x00000000},
++	{0x00016144, 0x02084080},
++	{0x00016148, 0x000080c0},
++	{0x00016280, 0x050a0001},
++	{0x00016284, 0x3d841400},
++	{0x00016288, 0x00000000},
++	{0x0001628c, 0xe3000000},
++	{0x00016290, 0xa1005080},
++	{0x00016294, 0x00000020},
++	{0x00016298, 0x54a82900},
++	{0x00016340, 0x121e4276},
++	{0x00016344, 0x00300000},
++	{0x00016400, 0x36db6db6},
++	{0x00016404, 0x6db6db40},
++	{0x00016408, 0x73f00000},
++	{0x0001640c, 0x00000000},
++	{0x00016410, 0x6c800001},
++	{0x00016440, 0x7f80fff8},
++	{0x0001644c, 0x4699e04f},
++	{0x00016450, 0x6db6db6c},
++	{0x00016500, 0x3fffbe04},
++	{0x00016504, 0xfff80000},
++	{0x00016508, 0x00200400},
++	{0x00016510, 0x00000000},
++	{0x00016544, 0x02084080},
++	{0x00016548, 0x000080c0},
++};
++
++static const u32 ar9462_2p0_tx_gain_table_baseband_postamble_emulation[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
++	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
++	{0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
++	{0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
++	{0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
++	{0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
++	{0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
++	{0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
++	{0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
++	{0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
++	{0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
++	{0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
++	{0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
++};
++
++static const u32 ar9462_2p0_soc_preamble[][2] = {
++	/* Addr      allmodes  */
++	{0x00007020, 0x00000000},
++	{0x00007034, 0x00000002},
++	{0x00007038, 0x000004c2},
++};
++
++static const u32 ar9462_2p0_sys2ant[][2] = {
++	/* Addr      allmodes  */
++	{0x00063120, 0x00801980},
++};
++
++static const u32 ar9462_2p0_mac_core[][2] = {
++	/* Addr      allmodes  */
++	{0x00000008, 0x00000000},
++	{0x00000030, 0x000e0085},
++	{0x00000034, 0x00000005},
++	{0x00000040, 0x00000000},
++	{0x00000044, 0x00000000},
++	{0x00000048, 0x00000008},
++	{0x0000004c, 0x00000010},
++	{0x00000050, 0x00000000},
++	{0x00001040, 0x002ffc0f},
++	{0x00001044, 0x002ffc0f},
++	{0x00001048, 0x002ffc0f},
++	{0x0000104c, 0x002ffc0f},
++	{0x00001050, 0x002ffc0f},
++	{0x00001054, 0x002ffc0f},
++	{0x00001058, 0x002ffc0f},
++	{0x0000105c, 0x002ffc0f},
++	{0x00001060, 0x002ffc0f},
++	{0x00001064, 0x002ffc0f},
++	{0x000010f0, 0x00000100},
++	{0x00001270, 0x00000000},
++	{0x000012b0, 0x00000000},
++	{0x000012f0, 0x00000000},
++	{0x0000143c, 0x00000000},
++	{0x0000147c, 0x00000000},
++	{0x00001810, 0x0f000003},
++	{0x00008000, 0x00000000},
++	{0x00008004, 0x00000000},
++	{0x00008008, 0x00000000},
++	{0x0000800c, 0x00000000},
++	{0x00008018, 0x00000000},
++	{0x00008020, 0x00000000},
++	{0x00008038, 0x00000000},
++	{0x0000803c, 0x00080000},
++	{0x00008040, 0x00000000},
++	{0x00008044, 0x00000000},
++	{0x00008048, 0x00000000},
++	{0x0000804c, 0xffffffff},
++	{0x00008050, 0xffffffff},
++	{0x00008054, 0x00000000},
++	{0x00008058, 0x00000000},
++	{0x0000805c, 0x000fc78f},
++	{0x00008060, 0x0000000f},
++	{0x00008064, 0x00000000},
++	{0x00008070, 0x00000310},
++	{0x00008074, 0x00000020},
++	{0x00008078, 0x00000000},
++	{0x0000809c, 0x0000000f},
++	{0x000080a0, 0x00000000},
++	{0x000080a4, 0x02ff0000},
++	{0x000080a8, 0x0e070605},
++	{0x000080ac, 0x0000000d},
++	{0x000080b0, 0x00000000},
++	{0x000080b4, 0x00000000},
++	{0x000080b8, 0x00000000},
++	{0x000080bc, 0x00000000},
++	{0x000080c0, 0x2a800000},
++	{0x000080c4, 0x06900168},
++	{0x000080c8, 0x13881c20},
++	{0x000080cc, 0x01f40000},
++	{0x000080d0, 0x00252500},
++	{0x000080d4, 0x00b00005},
++	{0x000080d8, 0x00400002},
++	{0x000080dc, 0x00000000},
++	{0x000080e0, 0xffffffff},
++	{0x000080e4, 0x0000ffff},
++	{0x000080e8, 0x3f3f3f3f},
++	{0x000080ec, 0x00000000},
++	{0x000080f0, 0x00000000},
++	{0x000080f4, 0x00000000},
++	{0x000080fc, 0x00020000},
++	{0x00008100, 0x00000000},
++	{0x00008108, 0x00000052},
++	{0x0000810c, 0x00000000},
++	{0x00008110, 0x00000000},
++	{0x00008114, 0x000007ff},
++	{0x00008118, 0x000000aa},
++	{0x0000811c, 0x00003210},
++	{0x00008124, 0x00000000},
++	{0x00008128, 0x00000000},
++	{0x0000812c, 0x00000000},
++	{0x00008130, 0x00000000},
++	{0x00008134, 0x00000000},
++	{0x00008138, 0x00000000},
++	{0x0000813c, 0x0000ffff},
++	{0x00008144, 0xffffffff},
++	{0x00008168, 0x00000000},
++	{0x0000816c, 0x00000000},
++	{0x00008170, 0x18486e00},
++	{0x00008174, 0x33332210},
++	{0x00008178, 0x00000000},
++	{0x0000817c, 0x00020000},
++	{0x000081c4, 0x33332210},
++	{0x000081c8, 0x00000000},
++	{0x000081cc, 0x00000000},
++	{0x000081d4, 0x00000000},
++	{0x000081ec, 0x00000000},
++	{0x000081f0, 0x00000000},
++	{0x000081f4, 0x00000000},
++	{0x000081f8, 0x00000000},
++	{0x000081fc, 0x00000000},
++	{0x00008240, 0x00100000},
++	{0x00008244, 0x0010f400},
++	{0x00008248, 0x00000800},
++	{0x0000824c, 0x0001e800},
++	{0x00008250, 0x00000000},
++	{0x00008254, 0x00000000},
++	{0x00008258, 0x00000000},
++	{0x0000825c, 0x40000000},
++	{0x00008260, 0x00080922},
++	{0x00008264, 0x99c00010},
++	{0x00008268, 0xffffffff},
++	{0x0000826c, 0x0000ffff},
++	{0x00008270, 0x00000000},
++	{0x00008274, 0x40000000},
++	{0x00008278, 0x003e4180},
++	{0x0000827c, 0x00000004},
++	{0x00008284, 0x0000002c},
++	{0x00008288, 0x0000002c},
++	{0x0000828c, 0x000000ff},
++	{0x00008294, 0x00000000},
++	{0x00008298, 0x00000000},
++	{0x0000829c, 0x00000000},
++	{0x00008300, 0x00000140},
++	{0x00008314, 0x00000000},
++	{0x0000831c, 0x0000010d},
++	{0x00008328, 0x00000000},
++	{0x0000832c, 0x0000001f},
++	{0x00008330, 0x00000302},
++	{0x00008334, 0x00000700},
++	{0x00008338, 0xffff0000},
++	{0x0000833c, 0x02400000},
++	{0x00008340, 0x000107ff},
++	{0x00008344, 0xaa48105b},
++	{0x00008348, 0x008f0000},
++	{0x0000835c, 0x00000000},
++	{0x00008360, 0xffffffff},
++	{0x00008364, 0xffffffff},
++	{0x00008368, 0x00000000},
++	{0x00008370, 0x00000000},
++	{0x00008374, 0x000000ff},
++	{0x00008378, 0x00000000},
++	{0x0000837c, 0x00000000},
++	{0x00008380, 0xffffffff},
++	{0x00008384, 0xffffffff},
++	{0x00008390, 0xffffffff},
++	{0x00008394, 0xffffffff},
++	{0x00008398, 0x00000000},
++	{0x0000839c, 0x00000000},
++	{0x000083a4, 0x0000fa14},
++	{0x000083a8, 0x000f0c00},
++	{0x000083ac, 0x33332210},
++	{0x000083b0, 0x33332210},
++	{0x000083b4, 0x33332210},
++	{0x000083b8, 0x33332210},
++	{0x000083bc, 0x00000000},
++	{0x000083c0, 0x00000000},
++	{0x000083c4, 0x00000000},
++	{0x000083c8, 0x00000000},
++	{0x000083cc, 0x00000200},
++	{0x000083d0, 0x000301ff},
++};
++
++static const u32 ar9462_2p0_mac_postamble[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
++	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
++	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
++	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
++	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
++	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
++	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
++	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
++};
++
++static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {
++	/* Addr      allmodes  */
++	{0x0000a000, 0x00010000},
++	{0x0000a004, 0x00030002},
++	{0x0000a008, 0x00050004},
++	{0x0000a00c, 0x00810080},
++	{0x0000a010, 0x00830082},
++	{0x0000a014, 0x01810180},
++	{0x0000a018, 0x01830182},
++	{0x0000a01c, 0x01850184},
++	{0x0000a020, 0x01890188},
++	{0x0000a024, 0x018b018a},
++	{0x0000a028, 0x018d018c},
++	{0x0000a02c, 0x03820190},
++	{0x0000a030, 0x03840383},
++	{0x0000a034, 0x03880385},
++	{0x0000a038, 0x038a0389},
++	{0x0000a03c, 0x038c038b},
++	{0x0000a040, 0x0390038d},
++	{0x0000a044, 0x03920391},
++	{0x0000a048, 0x03940393},
++	{0x0000a04c, 0x03960395},
++	{0x0000a050, 0x00000000},
++	{0x0000a054, 0x00000000},
++	{0x0000a058, 0x00000000},
++	{0x0000a05c, 0x00000000},
++	{0x0000a060, 0x00000000},
++	{0x0000a064, 0x00000000},
++	{0x0000a068, 0x00000000},
++	{0x0000a06c, 0x00000000},
++	{0x0000a070, 0x00000000},
++	{0x0000a074, 0x00000000},
++	{0x0000a078, 0x00000000},
++	{0x0000a07c, 0x00000000},
++	{0x0000a080, 0x29292929},
++	{0x0000a084, 0x29292929},
++	{0x0000a088, 0x29292929},
++	{0x0000a08c, 0x29292929},
++	{0x0000a090, 0x22292929},
++	{0x0000a094, 0x1d1d2222},
++	{0x0000a098, 0x0c111117},
++	{0x0000a09c, 0x00030303},
++	{0x0000a0a0, 0x00000000},
++	{0x0000a0a4, 0x00000000},
++	{0x0000a0a8, 0x00000000},
++	{0x0000a0ac, 0x00000000},
++	{0x0000a0b0, 0x00000000},
++	{0x0000a0b4, 0x00000000},
++	{0x0000a0b8, 0x00000000},
++	{0x0000a0bc, 0x00000000},
++	{0x0000a0c0, 0x001f0000},
++	{0x0000a0c4, 0x01000101},
++	{0x0000a0c8, 0x011e011f},
++	{0x0000a0cc, 0x011c011d},
++	{0x0000a0d0, 0x02030204},
++	{0x0000a0d4, 0x02010202},
++	{0x0000a0d8, 0x021f0200},
++	{0x0000a0dc, 0x0302021e},
++	{0x0000a0e0, 0x03000301},
++	{0x0000a0e4, 0x031e031f},
++	{0x0000a0e8, 0x0402031d},
++	{0x0000a0ec, 0x04000401},
++	{0x0000a0f0, 0x041e041f},
++	{0x0000a0f4, 0x0502041d},
++	{0x0000a0f8, 0x05000501},
++	{0x0000a0fc, 0x051e051f},
++	{0x0000a100, 0x06010602},
++	{0x0000a104, 0x061f0600},
++	{0x0000a108, 0x061d061e},
++	{0x0000a10c, 0x07020703},
++	{0x0000a110, 0x07000701},
++	{0x0000a114, 0x00000000},
++	{0x0000a118, 0x00000000},
++	{0x0000a11c, 0x00000000},
++	{0x0000a120, 0x00000000},
++	{0x0000a124, 0x00000000},
++	{0x0000a128, 0x00000000},
++	{0x0000a12c, 0x00000000},
++	{0x0000a130, 0x00000000},
++	{0x0000a134, 0x00000000},
++	{0x0000a138, 0x00000000},
++	{0x0000a13c, 0x00000000},
++	{0x0000a140, 0x001f0000},
++	{0x0000a144, 0x01000101},
++	{0x0000a148, 0x011e011f},
++	{0x0000a14c, 0x011c011d},
++	{0x0000a150, 0x02030204},
++	{0x0000a154, 0x02010202},
++	{0x0000a158, 0x021f0200},
++	{0x0000a15c, 0x0302021e},
++	{0x0000a160, 0x03000301},
++	{0x0000a164, 0x031e031f},
++	{0x0000a168, 0x0402031d},
++	{0x0000a16c, 0x04000401},
++	{0x0000a170, 0x041e041f},
++	{0x0000a174, 0x0502041d},
++	{0x0000a178, 0x05000501},
++	{0x0000a17c, 0x051e051f},
++	{0x0000a180, 0x06010602},
++	{0x0000a184, 0x061f0600},
++	{0x0000a188, 0x061d061e},
++	{0x0000a18c, 0x07020703},
++	{0x0000a190, 0x07000701},
++	{0x0000a194, 0x00000000},
++	{0x0000a198, 0x00000000},
++	{0x0000a19c, 0x00000000},
++	{0x0000a1a0, 0x00000000},
++	{0x0000a1a4, 0x00000000},
++	{0x0000a1a8, 0x00000000},
++	{0x0000a1ac, 0x00000000},
++	{0x0000a1b0, 0x00000000},
++	{0x0000a1b4, 0x00000000},
++	{0x0000a1b8, 0x00000000},
++	{0x0000a1bc, 0x00000000},
++	{0x0000a1c0, 0x00000000},
++	{0x0000a1c4, 0x00000000},
++	{0x0000a1c8, 0x00000000},
++	{0x0000a1cc, 0x00000000},
++	{0x0000a1d0, 0x00000000},
++	{0x0000a1d4, 0x00000000},
++	{0x0000a1d8, 0x00000000},
++	{0x0000a1dc, 0x00000000},
++	{0x0000a1e0, 0x00000000},
++	{0x0000a1e4, 0x00000000},
++	{0x0000a1e8, 0x00000000},
++	{0x0000a1ec, 0x00000000},
++	{0x0000a1f0, 0x00000396},
++	{0x0000a1f4, 0x00000396},
++	{0x0000a1f8, 0x00000396},
++	{0x0000a1fc, 0x00000196},
++	{0x0000b000, 0x00010000},
++	{0x0000b004, 0x00030002},
++	{0x0000b008, 0x00050004},
++	{0x0000b00c, 0x00810080},
++	{0x0000b010, 0x00830082},
++	{0x0000b014, 0x01810180},
++	{0x0000b018, 0x01830182},
++	{0x0000b01c, 0x01850184},
++	{0x0000b020, 0x02810280},
++	{0x0000b024, 0x02830282},
++	{0x0000b028, 0x02850284},
++	{0x0000b02c, 0x02890288},
++	{0x0000b030, 0x028b028a},
++	{0x0000b034, 0x0388028c},
++	{0x0000b038, 0x038a0389},
++	{0x0000b03c, 0x038c038b},
++	{0x0000b040, 0x0390038d},
++	{0x0000b044, 0x03920391},
++	{0x0000b048, 0x03940393},
++	{0x0000b04c, 0x03960395},
++	{0x0000b050, 0x00000000},
++	{0x0000b054, 0x00000000},
++	{0x0000b058, 0x00000000},
++	{0x0000b05c, 0x00000000},
++	{0x0000b060, 0x00000000},
++	{0x0000b064, 0x00000000},
++	{0x0000b068, 0x00000000},
++	{0x0000b06c, 0x00000000},
++	{0x0000b070, 0x00000000},
++	{0x0000b074, 0x00000000},
++	{0x0000b078, 0x00000000},
++	{0x0000b07c, 0x00000000},
++	{0x0000b080, 0x2a2d2f32},
++	{0x0000b084, 0x21232328},
++	{0x0000b088, 0x19191c1e},
++	{0x0000b08c, 0x12141417},
++	{0x0000b090, 0x07070e0e},
++	{0x0000b094, 0x03030305},
++	{0x0000b098, 0x00000003},
++	{0x0000b09c, 0x00000000},
++	{0x0000b0a0, 0x00000000},
++	{0x0000b0a4, 0x00000000},
++	{0x0000b0a8, 0x00000000},
++	{0x0000b0ac, 0x00000000},
++	{0x0000b0b0, 0x00000000},
++	{0x0000b0b4, 0x00000000},
++	{0x0000b0b8, 0x00000000},
++	{0x0000b0bc, 0x00000000},
++	{0x0000b0c0, 0x003f0020},
++	{0x0000b0c4, 0x00400041},
++	{0x0000b0c8, 0x0140005f},
++	{0x0000b0cc, 0x0160015f},
++	{0x0000b0d0, 0x017e017f},
++	{0x0000b0d4, 0x02410242},
++	{0x0000b0d8, 0x025f0240},
++	{0x0000b0dc, 0x027f0260},
++	{0x0000b0e0, 0x0341027e},
++	{0x0000b0e4, 0x035f0340},
++	{0x0000b0e8, 0x037f0360},
++	{0x0000b0ec, 0x04400441},
++	{0x0000b0f0, 0x0460045f},
++	{0x0000b0f4, 0x0541047f},
++	{0x0000b0f8, 0x055f0540},
++	{0x0000b0fc, 0x057f0560},
++	{0x0000b100, 0x06400641},
++	{0x0000b104, 0x0660065f},
++	{0x0000b108, 0x067e067f},
++	{0x0000b10c, 0x07410742},
++	{0x0000b110, 0x075f0740},
++	{0x0000b114, 0x077f0760},
++	{0x0000b118, 0x07800781},
++	{0x0000b11c, 0x07a0079f},
++	{0x0000b120, 0x07c107bf},
++	{0x0000b124, 0x000007c0},
++	{0x0000b128, 0x00000000},
++	{0x0000b12c, 0x00000000},
++	{0x0000b130, 0x00000000},
++	{0x0000b134, 0x00000000},
++	{0x0000b138, 0x00000000},
++	{0x0000b13c, 0x00000000},
++	{0x0000b140, 0x003f0020},
++	{0x0000b144, 0x00400041},
++	{0x0000b148, 0x0140005f},
++	{0x0000b14c, 0x0160015f},
++	{0x0000b150, 0x017e017f},
++	{0x0000b154, 0x02410242},
++	{0x0000b158, 0x025f0240},
++	{0x0000b15c, 0x027f0260},
++	{0x0000b160, 0x0341027e},
++	{0x0000b164, 0x035f0340},
++	{0x0000b168, 0x037f0360},
++	{0x0000b16c, 0x04400441},
++	{0x0000b170, 0x0460045f},
++	{0x0000b174, 0x0541047f},
++	{0x0000b178, 0x055f0540},
++	{0x0000b17c, 0x057f0560},
++	{0x0000b180, 0x06400641},
++	{0x0000b184, 0x0660065f},
++	{0x0000b188, 0x067e067f},
++	{0x0000b18c, 0x07410742},
++	{0x0000b190, 0x075f0740},
++	{0x0000b194, 0x077f0760},
++	{0x0000b198, 0x07800781},
++	{0x0000b19c, 0x07a0079f},
++	{0x0000b1a0, 0x07c107bf},
++	{0x0000b1a4, 0x000007c0},
++	{0x0000b1a8, 0x00000000},
++	{0x0000b1ac, 0x00000000},
++	{0x0000b1b0, 0x00000000},
++	{0x0000b1b4, 0x00000000},
++	{0x0000b1b8, 0x00000000},
++	{0x0000b1bc, 0x00000000},
++	{0x0000b1c0, 0x00000000},
++	{0x0000b1c4, 0x00000000},
++	{0x0000b1c8, 0x00000000},
++	{0x0000b1cc, 0x00000000},
++	{0x0000b1d0, 0x00000000},
++	{0x0000b1d4, 0x00000000},
++	{0x0000b1d8, 0x00000000},
++	{0x0000b1dc, 0x00000000},
++	{0x0000b1e0, 0x00000000},
++	{0x0000b1e4, 0x00000000},
++	{0x0000b1e8, 0x00000000},
++	{0x0000b1ec, 0x00000000},
++	{0x0000b1f0, 0x00000396},
++	{0x0000b1f4, 0x00000396},
++	{0x0000b1f8, 0x00000396},
++	{0x0000b1fc, 0x00000196},
++};
++
++static const u32 ar9462_modes_green_ob_db_tx_gain_table_2p0[][5] = {
++	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
++	{0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
++	{0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
++	{0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
++	{0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++	{0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
++	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
++	{0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
++	{0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
++	{0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
++	{0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
++	{0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
++	{0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
++	{0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
++	{0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
++	{0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
++	{0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
++	{0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
++	{0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
++	{0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
++	{0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
++	{0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
++	{0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
++	{0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
++	{0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
++	{0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
++	{0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
++	{0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
++	{0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
++	{0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
++	{0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
++	{0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
++	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++	{0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
++	{0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
++	{0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
++	{0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
++	{0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
++	{0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
++	{0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
++	{0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
++	{0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
++	{0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
++	{0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
++	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++	{0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
++	{0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
++	{0x00016054, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
++	{0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
++	{0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
++	{0x00016454, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
++};
++
++static const u32 ar9462_2p0_BTCOEX_MAX_TXPWR_table[][2] = {
++	/* Addr      allmodes  */
++	{0x000018c0, 0x10101010},
++	{0x000018c4, 0x10101010},
++	{0x000018c8, 0x10101010},
++	{0x000018cc, 0x10101010},
++	{0x000018d0, 0x10101010},
++	{0x000018d4, 0x10101010},
++	{0x000018d8, 0x10101010},
++	{0x000018dc, 0x10101010},
++};
++
++static const u32 ar9462_2p0_baseband_core_emulation[][2] = {
++	/* Addr      allmodes  */
++	{0x00009800, 0xafa68e30},
++	{0x00009884, 0x00002842},
++	{0x00009c04, 0xff55ff55},
++	{0x00009c08, 0x0320ff55},
++	{0x00009e50, 0x00000000},
++	{0x00009fcc, 0x00000014},
++	{0x0000a344, 0x00000010},
++	{0x0000a398, 0x00000000},
++	{0x0000a39c, 0x71733d01},
++	{0x0000a3a0, 0xd0ad5c12},
++	{0x0000a3c0, 0x22222220},
++	{0x0000a3c4, 0x22222222},
++	{0x0000a404, 0x00418a11},
++	{0x0000a418, 0x050001ce},
++	{0x0000a438, 0x00001800},
++	{0x0000a458, 0x01444452},
++	{0x0000a644, 0x3fad9d74},
++	{0x0000a690, 0x00000038},
++};
++
++#endif /* INITVALS_9462_2P0_H */
+--- a/drivers/net/wireless/ath/ath9k/ar9480_1p0_initvals.h
++++ /dev/null
+@@ -1,1833 +0,0 @@
+-/*
+- * Copyright (c) 2010 Atheros Communications Inc.
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
 -
--	ads->ctl12 |= SM(chains, AR_PAPRDChainMask);
--}
--EXPORT_SYMBOL(ar9003_hw_set_paprd_txdesc);
+-#ifndef INITVALS_9480_1P0_H
+-#define INITVALS_9480_1P0_H
+-
+-/* AR9480 1.0 */
+-
+-static const u32 ar9480_1p0_mac_core[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00000008, 0x00000000},
+-	{0x00000030, 0x00060085},
+-	{0x00000034, 0x00000005},
+-	{0x00000040, 0x00000000},
+-	{0x00000044, 0x00000000},
+-	{0x00000048, 0x00000008},
+-	{0x0000004c, 0x00000010},
+-	{0x00000050, 0x00000000},
+-	{0x00001040, 0x002ffc0f},
+-	{0x00001044, 0x002ffc0f},
+-	{0x00001048, 0x002ffc0f},
+-	{0x0000104c, 0x002ffc0f},
+-	{0x00001050, 0x002ffc0f},
+-	{0x00001054, 0x002ffc0f},
+-	{0x00001058, 0x002ffc0f},
+-	{0x0000105c, 0x002ffc0f},
+-	{0x00001060, 0x002ffc0f},
+-	{0x00001064, 0x002ffc0f},
+-	{0x000010f0, 0x00000100},
+-	{0x00001270, 0x00000000},
+-	{0x000012b0, 0x00000000},
+-	{0x000012f0, 0x00000000},
+-	{0x0000143c, 0x00000000},
+-	{0x0000147c, 0x00000000},
+-	{0x00001810, 0x0f000003},
+-	{0x00008000, 0x00000000},
+-	{0x00008004, 0x00000000},
+-	{0x00008008, 0x00000000},
+-	{0x0000800c, 0x00000000},
+-	{0x00008018, 0x00000000},
+-	{0x00008020, 0x00000000},
+-	{0x00008038, 0x00000000},
+-	{0x0000803c, 0x00080000},
+-	{0x00008040, 0x00000000},
+-	{0x00008044, 0x00000000},
+-	{0x00008048, 0x00000000},
+-	{0x0000804c, 0xffffffff},
+-	{0x00008050, 0xffffffff},
+-	{0x00008054, 0x00000000},
+-	{0x00008058, 0x00000000},
+-	{0x0000805c, 0x000fc78f},
+-	{0x00008060, 0x0000000f},
+-	{0x00008064, 0x00000000},
+-	{0x00008070, 0x00000310},
+-	{0x00008074, 0x00000020},
+-	{0x00008078, 0x00000000},
+-	{0x0000809c, 0x0000000f},
+-	{0x000080a0, 0x00000000},
+-	{0x000080a4, 0x02ff0000},
+-	{0x000080a8, 0x0e070605},
+-	{0x000080ac, 0x0000000d},
+-	{0x000080b0, 0x00000000},
+-	{0x000080b4, 0x00000000},
+-	{0x000080b8, 0x00000000},
+-	{0x000080bc, 0x00000000},
+-	{0x000080c0, 0x2a800000},
+-	{0x000080c4, 0x06900168},
+-	{0x000080c8, 0x13881c20},
+-	{0x000080cc, 0x01f40000},
+-	{0x000080d0, 0x00252500},
+-	{0x000080d4, 0x00a00005},
+-	{0x000080d8, 0x00400002},
+-	{0x000080dc, 0x00000000},
+-	{0x000080e0, 0xffffffff},
+-	{0x000080e4, 0x0000ffff},
+-	{0x000080e8, 0x3f3f3f3f},
+-	{0x000080ec, 0x00000000},
+-	{0x000080f0, 0x00000000},
+-	{0x000080f4, 0x00000000},
+-	{0x000080fc, 0x00020000},
+-	{0x00008100, 0x00000000},
+-	{0x00008108, 0x00000052},
+-	{0x0000810c, 0x00000000},
+-	{0x00008110, 0x00000000},
+-	{0x00008114, 0x000007ff},
+-	{0x00008118, 0x000000aa},
+-	{0x0000811c, 0x00003210},
+-	{0x00008124, 0x00000000},
+-	{0x00008128, 0x00000000},
+-	{0x0000812c, 0x00000000},
+-	{0x00008130, 0x00000000},
+-	{0x00008134, 0x00000000},
+-	{0x00008138, 0x00000000},
+-	{0x0000813c, 0x0000ffff},
+-	{0x00008144, 0xffffffff},
+-	{0x00008168, 0x00000000},
+-	{0x0000816c, 0x00000000},
+-	{0x00008170, 0x18486e00},
+-	{0x00008174, 0x33332210},
+-	{0x00008178, 0x00000000},
+-	{0x0000817c, 0x00020000},
+-	{0x000081c4, 0x33332210},
+-	{0x000081c8, 0x00000000},
+-	{0x000081cc, 0x00000000},
+-	{0x000081d4, 0x00000000},
+-	{0x000081ec, 0x00000000},
+-	{0x000081f0, 0x00000000},
+-	{0x000081f4, 0x00000000},
+-	{0x000081f8, 0x00000000},
+-	{0x000081fc, 0x00000000},
+-	{0x00008240, 0x00100000},
+-	{0x00008244, 0x0010f400},
+-	{0x00008248, 0x00000800},
+-	{0x0000824c, 0x0001e800},
+-	{0x00008250, 0x00000000},
+-	{0x00008254, 0x00000000},
+-	{0x00008258, 0x00000000},
+-	{0x0000825c, 0x40000000},
+-	{0x00008260, 0x00080922},
+-	{0x00008264, 0x99c00010},
+-	{0x00008268, 0xffffffff},
+-	{0x0000826c, 0x0000ffff},
+-	{0x00008270, 0x00000000},
+-	{0x00008274, 0x40000000},
+-	{0x00008278, 0x003e4180},
+-	{0x0000827c, 0x00000004},
+-	{0x00008284, 0x0000002c},
+-	{0x00008288, 0x0000002c},
+-	{0x0000828c, 0x000000ff},
+-	{0x00008294, 0x00000000},
+-	{0x00008298, 0x00000000},
+-	{0x0000829c, 0x00000000},
+-	{0x00008300, 0x00000140},
+-	{0x00008314, 0x00000000},
+-	{0x0000831c, 0x0000010d},
+-	{0x00008328, 0x00000000},
+-	{0x0000832c, 0x0000001f},
+-	{0x00008330, 0x00000302},
+-	{0x00008334, 0x00000700},
+-	{0x00008338, 0xffff0000},
+-	{0x0000833c, 0x02400000},
+-	{0x00008340, 0x000107ff},
+-	{0x00008344, 0xaa48105b},
+-	{0x00008348, 0x008f0000},
+-	{0x0000835c, 0x00000000},
+-	{0x00008360, 0xffffffff},
+-	{0x00008364, 0xffffffff},
+-	{0x00008368, 0x00000000},
+-	{0x00008370, 0x00000000},
+-	{0x00008374, 0x000000ff},
+-	{0x00008378, 0x00000000},
+-	{0x0000837c, 0x00000000},
+-	{0x00008380, 0xffffffff},
+-	{0x00008384, 0xffffffff},
+-	{0x00008390, 0xffffffff},
+-	{0x00008394, 0xffffffff},
+-	{0x00008398, 0x00000000},
+-	{0x0000839c, 0x00000000},
+-	{0x000083a4, 0x0000fa14},
+-	{0x000083a8, 0x000f0c00},
+-	{0x000083ac, 0x33332210},
+-	{0x000083b0, 0x33332210},
+-	{0x000083b4, 0x33332210},
+-	{0x000083b8, 0x33332210},
+-	{0x000083bc, 0x00000000},
+-	{0x000083c0, 0x00000000},
+-	{0x000083c4, 0x00000000},
+-	{0x000083c8, 0x00000000},
+-	{0x000083cc, 0x00000200},
+-	{0x000083d0, 0x000301ff},
+-};
+-
+-static const u32 ar9480_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a398, 0x00000000},
+-	{0x0000a39c, 0x6f7f0301},
+-	{0x0000a3a0, 0xca9228ee},
+-};
+-
+-static const u32 ar9480_1p0_sys3ant[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00063280, 0x00040807},
+-	{0x00063284, 0x104ccccc},
+-};
+-
+-static const u32 ar9480_pcie_phy_clkreq_enable_L1_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00018c00, 0x10053e5e},
+-	{0x00018c04, 0x000801d8},
+-	{0x00018c08, 0x0000580c},
+-};
+-
+-static const u32 ar9480_1p0_mac_core_emulation[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00000030, 0x00060085},
+-	{0x00000044, 0x00000008},
+-	{0x0000805c, 0xffffc7ff},
+-	{0x00008344, 0xaa4a105b},
+-};
+-
+-static const u32 ar9480_common_rx_gain_table_ar9280_2p0_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x02000101},
+-	{0x0000a004, 0x02000102},
+-	{0x0000a008, 0x02000103},
+-	{0x0000a00c, 0x02000104},
+-	{0x0000a010, 0x02000200},
+-	{0x0000a014, 0x02000201},
+-	{0x0000a018, 0x02000202},
+-	{0x0000a01c, 0x02000203},
+-	{0x0000a020, 0x02000204},
+-	{0x0000a024, 0x02000205},
+-	{0x0000a028, 0x02000208},
+-	{0x0000a02c, 0x02000302},
+-	{0x0000a030, 0x02000303},
+-	{0x0000a034, 0x02000304},
+-	{0x0000a038, 0x02000400},
+-	{0x0000a03c, 0x02010300},
+-	{0x0000a040, 0x02010301},
+-	{0x0000a044, 0x02010302},
+-	{0x0000a048, 0x02000500},
+-	{0x0000a04c, 0x02010400},
+-	{0x0000a050, 0x02020300},
+-	{0x0000a054, 0x02020301},
+-	{0x0000a058, 0x02020302},
+-	{0x0000a05c, 0x02020303},
+-	{0x0000a060, 0x02020400},
+-	{0x0000a064, 0x02030300},
+-	{0x0000a068, 0x02030301},
+-	{0x0000a06c, 0x02030302},
+-	{0x0000a070, 0x02030303},
+-	{0x0000a074, 0x02030400},
+-	{0x0000a078, 0x02040300},
+-	{0x0000a07c, 0x02040301},
+-	{0x0000a080, 0x02040302},
+-	{0x0000a084, 0x02040303},
+-	{0x0000a088, 0x02030500},
+-	{0x0000a08c, 0x02040400},
+-	{0x0000a090, 0x02050203},
+-	{0x0000a094, 0x02050204},
+-	{0x0000a098, 0x02050205},
+-	{0x0000a09c, 0x02040500},
+-	{0x0000a0a0, 0x02050301},
+-	{0x0000a0a4, 0x02050302},
+-	{0x0000a0a8, 0x02050303},
+-	{0x0000a0ac, 0x02050400},
+-	{0x0000a0b0, 0x02050401},
+-	{0x0000a0b4, 0x02050402},
+-	{0x0000a0b8, 0x02050403},
+-	{0x0000a0bc, 0x02050500},
+-	{0x0000a0c0, 0x02050501},
+-	{0x0000a0c4, 0x02050502},
+-	{0x0000a0c8, 0x02050503},
+-	{0x0000a0cc, 0x02050504},
+-	{0x0000a0d0, 0x02050600},
+-	{0x0000a0d4, 0x02050601},
+-	{0x0000a0d8, 0x02050602},
+-	{0x0000a0dc, 0x02050603},
+-	{0x0000a0e0, 0x02050604},
+-	{0x0000a0e4, 0x02050700},
+-	{0x0000a0e8, 0x02050701},
+-	{0x0000a0ec, 0x02050702},
+-	{0x0000a0f0, 0x02050703},
+-	{0x0000a0f4, 0x02050704},
+-	{0x0000a0f8, 0x02050705},
+-	{0x0000a0fc, 0x02050708},
+-	{0x0000a100, 0x02050709},
+-	{0x0000a104, 0x0205070a},
+-	{0x0000a108, 0x0205070b},
+-	{0x0000a10c, 0x0205070c},
+-	{0x0000a110, 0x0205070d},
+-	{0x0000a114, 0x02050710},
+-	{0x0000a118, 0x02050711},
+-	{0x0000a11c, 0x02050712},
+-	{0x0000a120, 0x02050713},
+-	{0x0000a124, 0x02050714},
+-	{0x0000a128, 0x02050715},
+-	{0x0000a12c, 0x02050730},
+-	{0x0000a130, 0x02050731},
+-	{0x0000a134, 0x02050732},
+-	{0x0000a138, 0x02050733},
+-	{0x0000a13c, 0x02050734},
+-	{0x0000a140, 0x02050735},
+-	{0x0000a144, 0x02050750},
+-	{0x0000a148, 0x02050751},
+-	{0x0000a14c, 0x02050752},
+-	{0x0000a150, 0x02050753},
+-	{0x0000a154, 0x02050754},
+-	{0x0000a158, 0x02050755},
+-	{0x0000a15c, 0x02050770},
+-	{0x0000a160, 0x02050771},
+-	{0x0000a164, 0x02050772},
+-	{0x0000a168, 0x02050773},
+-	{0x0000a16c, 0x02050774},
+-	{0x0000a170, 0x02050775},
+-	{0x0000a174, 0x00000776},
+-	{0x0000a178, 0x00000776},
+-	{0x0000a17c, 0x00000776},
+-	{0x0000a180, 0x00000776},
+-	{0x0000a184, 0x00000776},
+-	{0x0000a188, 0x00000776},
+-	{0x0000a18c, 0x00000776},
+-	{0x0000a190, 0x00000776},
+-	{0x0000a194, 0x00000776},
+-	{0x0000a198, 0x00000776},
+-	{0x0000a19c, 0x00000776},
+-	{0x0000a1a0, 0x00000776},
+-	{0x0000a1a4, 0x00000776},
+-	{0x0000a1a8, 0x00000776},
+-	{0x0000a1ac, 0x00000776},
+-	{0x0000a1b0, 0x00000776},
+-	{0x0000a1b4, 0x00000776},
+-	{0x0000a1b8, 0x00000776},
+-	{0x0000a1bc, 0x00000776},
+-	{0x0000a1c0, 0x00000776},
+-	{0x0000a1c4, 0x00000776},
+-	{0x0000a1c8, 0x00000776},
+-	{0x0000a1cc, 0x00000776},
+-	{0x0000a1d0, 0x00000776},
+-	{0x0000a1d4, 0x00000776},
+-	{0x0000a1d8, 0x00000776},
+-	{0x0000a1dc, 0x00000776},
+-	{0x0000a1e0, 0x00000776},
+-	{0x0000a1e4, 0x00000776},
+-	{0x0000a1e8, 0x00000776},
+-	{0x0000a1ec, 0x00000776},
+-	{0x0000a1f0, 0x00000776},
+-	{0x0000a1f4, 0x00000776},
+-	{0x0000a1f8, 0x00000776},
+-	{0x0000a1fc, 0x00000776},
+-	{0x0000b000, 0x02000101},
+-	{0x0000b004, 0x02000102},
+-	{0x0000b008, 0x02000103},
+-	{0x0000b00c, 0x02000104},
+-	{0x0000b010, 0x02000200},
+-	{0x0000b014, 0x02000201},
+-	{0x0000b018, 0x02000202},
+-	{0x0000b01c, 0x02000203},
+-	{0x0000b020, 0x02000204},
+-	{0x0000b024, 0x02000205},
+-	{0x0000b028, 0x02000208},
+-	{0x0000b02c, 0x02000302},
+-	{0x0000b030, 0x02000303},
+-	{0x0000b034, 0x02000304},
+-	{0x0000b038, 0x02000400},
+-	{0x0000b03c, 0x02010300},
+-	{0x0000b040, 0x02010301},
+-	{0x0000b044, 0x02010302},
+-	{0x0000b048, 0x02000500},
+-	{0x0000b04c, 0x02010400},
+-	{0x0000b050, 0x02020300},
+-	{0x0000b054, 0x02020301},
+-	{0x0000b058, 0x02020302},
+-	{0x0000b05c, 0x02020303},
+-	{0x0000b060, 0x02020400},
+-	{0x0000b064, 0x02030300},
+-	{0x0000b068, 0x02030301},
+-	{0x0000b06c, 0x02030302},
+-	{0x0000b070, 0x02030303},
+-	{0x0000b074, 0x02030400},
+-	{0x0000b078, 0x02040300},
+-	{0x0000b07c, 0x02040301},
+-	{0x0000b080, 0x02040302},
+-	{0x0000b084, 0x02040303},
+-	{0x0000b088, 0x02030500},
+-	{0x0000b08c, 0x02040400},
+-	{0x0000b090, 0x02050203},
+-	{0x0000b094, 0x02050204},
+-	{0x0000b098, 0x02050205},
+-	{0x0000b09c, 0x02040500},
+-	{0x0000b0a0, 0x02050301},
+-	{0x0000b0a4, 0x02050302},
+-	{0x0000b0a8, 0x02050303},
+-	{0x0000b0ac, 0x02050400},
+-	{0x0000b0b0, 0x02050401},
+-	{0x0000b0b4, 0x02050402},
+-	{0x0000b0b8, 0x02050403},
+-	{0x0000b0bc, 0x02050500},
+-	{0x0000b0c0, 0x02050501},
+-	{0x0000b0c4, 0x02050502},
+-	{0x0000b0c8, 0x02050503},
+-	{0x0000b0cc, 0x02050504},
+-	{0x0000b0d0, 0x02050600},
+-	{0x0000b0d4, 0x02050601},
+-	{0x0000b0d8, 0x02050602},
+-	{0x0000b0dc, 0x02050603},
+-	{0x0000b0e0, 0x02050604},
+-	{0x0000b0e4, 0x02050700},
+-	{0x0000b0e8, 0x02050701},
+-	{0x0000b0ec, 0x02050702},
+-	{0x0000b0f0, 0x02050703},
+-	{0x0000b0f4, 0x02050704},
+-	{0x0000b0f8, 0x02050705},
+-	{0x0000b0fc, 0x02050708},
+-	{0x0000b100, 0x02050709},
+-	{0x0000b104, 0x0205070a},
+-	{0x0000b108, 0x0205070b},
+-	{0x0000b10c, 0x0205070c},
+-	{0x0000b110, 0x0205070d},
+-	{0x0000b114, 0x02050710},
+-	{0x0000b118, 0x02050711},
+-	{0x0000b11c, 0x02050712},
+-	{0x0000b120, 0x02050713},
+-	{0x0000b124, 0x02050714},
+-	{0x0000b128, 0x02050715},
+-	{0x0000b12c, 0x02050730},
+-	{0x0000b130, 0x02050731},
+-	{0x0000b134, 0x02050732},
+-	{0x0000b138, 0x02050733},
+-	{0x0000b13c, 0x02050734},
+-	{0x0000b140, 0x02050735},
+-	{0x0000b144, 0x02050750},
+-	{0x0000b148, 0x02050751},
+-	{0x0000b14c, 0x02050752},
+-	{0x0000b150, 0x02050753},
+-	{0x0000b154, 0x02050754},
+-	{0x0000b158, 0x02050755},
+-	{0x0000b15c, 0x02050770},
+-	{0x0000b160, 0x02050771},
+-	{0x0000b164, 0x02050772},
+-	{0x0000b168, 0x02050773},
+-	{0x0000b16c, 0x02050774},
+-	{0x0000b170, 0x02050775},
+-	{0x0000b174, 0x00000776},
+-	{0x0000b178, 0x00000776},
+-	{0x0000b17c, 0x00000776},
+-	{0x0000b180, 0x00000776},
+-	{0x0000b184, 0x00000776},
+-	{0x0000b188, 0x00000776},
+-	{0x0000b18c, 0x00000776},
+-	{0x0000b190, 0x00000776},
+-	{0x0000b194, 0x00000776},
+-	{0x0000b198, 0x00000776},
+-	{0x0000b19c, 0x00000776},
+-	{0x0000b1a0, 0x00000776},
+-	{0x0000b1a4, 0x00000776},
+-	{0x0000b1a8, 0x00000776},
+-	{0x0000b1ac, 0x00000776},
+-	{0x0000b1b0, 0x00000776},
+-	{0x0000b1b4, 0x00000776},
+-	{0x0000b1b8, 0x00000776},
+-	{0x0000b1bc, 0x00000776},
+-	{0x0000b1c0, 0x00000776},
+-	{0x0000b1c4, 0x00000776},
+-	{0x0000b1c8, 0x00000776},
+-	{0x0000b1cc, 0x00000776},
+-	{0x0000b1d0, 0x00000776},
+-	{0x0000b1d4, 0x00000776},
+-	{0x0000b1d8, 0x00000776},
+-	{0x0000b1dc, 0x00000776},
+-	{0x0000b1e0, 0x00000776},
+-	{0x0000b1e4, 0x00000776},
+-	{0x0000b1e8, 0x00000776},
+-	{0x0000b1ec, 0x00000776},
+-	{0x0000b1f0, 0x00000776},
+-	{0x0000b1f4, 0x00000776},
+-	{0x0000b1f8, 0x00000776},
+-	{0x0000b1fc, 0x00000776},
+-};
+-
+-static const u32 ar9200_ar9280_2p0_radio_core_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00007800, 0x00040000},
+-	{0x00007804, 0xdb005012},
+-	{0x00007808, 0x04924914},
+-	{0x0000780c, 0x21084210},
+-	{0x00007810, 0x6d801300},
+-	{0x00007814, 0x0019beff},
+-	{0x00007818, 0x07e41000},
+-	{0x0000781c, 0x00392000},
+-	{0x00007820, 0x92592480},
+-	{0x00007824, 0x00040000},
+-	{0x00007828, 0xdb005012},
+-	{0x0000782c, 0x04924914},
+-	{0x00007830, 0x21084210},
+-	{0x00007834, 0x6d801300},
+-	{0x00007838, 0x0019beff},
+-	{0x0000783c, 0x07e40000},
+-	{0x00007840, 0x00392000},
+-	{0x00007844, 0x92592480},
+-	{0x00007848, 0x00100000},
+-	{0x0000784c, 0x773f0567},
+-	{0x00007850, 0x54214514},
+-	{0x00007854, 0x12035828},
+-	{0x00007858, 0x92592692},
+-	{0x0000785c, 0x00000000},
+-	{0x00007860, 0x56400000},
+-	{0x00007864, 0x0a8e370e},
+-	{0x00007868, 0xc0102850},
+-	{0x0000786c, 0x812d4000},
+-	{0x00007870, 0x807ec400},
+-	{0x00007874, 0x001b6db0},
+-	{0x00007878, 0x00376b63},
+-	{0x0000787c, 0x06db6db6},
+-	{0x00007880, 0x006d8000},
+-	{0x00007884, 0xffeffffe},
+-	{0x00007888, 0xffeffffe},
+-	{0x0000788c, 0x00010000},
+-	{0x00007890, 0x02060aeb},
+-	{0x00007894, 0x5a108000},
+-};
+-
+-static const u32 ar9480_1p0_baseband_postamble_emulation[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
+-	{0x00009e44, 0x005c0000, 0x005c0000, 0x005c0000, 0x005c0000},
+-	{0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
+-	{0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
+-	{0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
+-	{0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
+-	{0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
+-	{0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
+-	{0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
+-	{0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
+-	{0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
+-	{0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
+-	{0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
+-	{0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
+-	{0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
+-	{0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
+-	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-};
+-
+-static const u32 ar9480_pcie_phy_pll_on_clkreq_disable_L1_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00018c00, 0x10012e5e},
+-	{0x00018c04, 0x000801d8},
+-	{0x00018c08, 0x0000580c},
+-};
+-
+-static const u32 ar9480_common_rx_gain_table_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x00010000},
+-	{0x0000a004, 0x00030002},
+-	{0x0000a008, 0x00050004},
+-	{0x0000a00c, 0x00810080},
+-	{0x0000a010, 0x00830082},
+-	{0x0000a014, 0x01810180},
+-	{0x0000a018, 0x01830182},
+-	{0x0000a01c, 0x01850184},
+-	{0x0000a020, 0x01890188},
+-	{0x0000a024, 0x018b018a},
+-	{0x0000a028, 0x018d018c},
+-	{0x0000a02c, 0x01910190},
+-	{0x0000a030, 0x01930192},
+-	{0x0000a034, 0x01950194},
+-	{0x0000a038, 0x038a0196},
+-	{0x0000a03c, 0x038c038b},
+-	{0x0000a040, 0x0390038d},
+-	{0x0000a044, 0x03920391},
+-	{0x0000a048, 0x03940393},
+-	{0x0000a04c, 0x03960395},
+-	{0x0000a050, 0x00000000},
+-	{0x0000a054, 0x00000000},
+-	{0x0000a058, 0x00000000},
+-	{0x0000a05c, 0x00000000},
+-	{0x0000a060, 0x00000000},
+-	{0x0000a064, 0x00000000},
+-	{0x0000a068, 0x00000000},
+-	{0x0000a06c, 0x00000000},
+-	{0x0000a070, 0x00000000},
+-	{0x0000a074, 0x00000000},
+-	{0x0000a078, 0x00000000},
+-	{0x0000a07c, 0x00000000},
+-	{0x0000a080, 0x22222229},
+-	{0x0000a084, 0x1d1d1d1d},
+-	{0x0000a088, 0x1d1d1d1d},
+-	{0x0000a08c, 0x1d1d1d1d},
+-	{0x0000a090, 0x171d1d1d},
+-	{0x0000a094, 0x11111717},
+-	{0x0000a098, 0x00030311},
+-	{0x0000a09c, 0x00000000},
+-	{0x0000a0a0, 0x00000000},
+-	{0x0000a0a4, 0x00000000},
+-	{0x0000a0a8, 0x00000000},
+-	{0x0000a0ac, 0x00000000},
+-	{0x0000a0b0, 0x00000000},
+-	{0x0000a0b4, 0x00000000},
+-	{0x0000a0b8, 0x00000000},
+-	{0x0000a0bc, 0x00000000},
+-	{0x0000a0c0, 0x001f0000},
+-	{0x0000a0c4, 0x01000101},
+-	{0x0000a0c8, 0x011e011f},
+-	{0x0000a0cc, 0x011c011d},
+-	{0x0000a0d0, 0x02030204},
+-	{0x0000a0d4, 0x02010202},
+-	{0x0000a0d8, 0x021f0200},
+-	{0x0000a0dc, 0x0302021e},
+-	{0x0000a0e0, 0x03000301},
+-	{0x0000a0e4, 0x031e031f},
+-	{0x0000a0e8, 0x0402031d},
+-	{0x0000a0ec, 0x04000401},
+-	{0x0000a0f0, 0x041e041f},
+-	{0x0000a0f4, 0x0502041d},
+-	{0x0000a0f8, 0x05000501},
+-	{0x0000a0fc, 0x051e051f},
+-	{0x0000a100, 0x06010602},
+-	{0x0000a104, 0x061f0600},
+-	{0x0000a108, 0x061d061e},
+-	{0x0000a10c, 0x07020703},
+-	{0x0000a110, 0x07000701},
+-	{0x0000a114, 0x00000000},
+-	{0x0000a118, 0x00000000},
+-	{0x0000a11c, 0x00000000},
+-	{0x0000a120, 0x00000000},
+-	{0x0000a124, 0x00000000},
+-	{0x0000a128, 0x00000000},
+-	{0x0000a12c, 0x00000000},
+-	{0x0000a130, 0x00000000},
+-	{0x0000a134, 0x00000000},
+-	{0x0000a138, 0x00000000},
+-	{0x0000a13c, 0x00000000},
+-	{0x0000a140, 0x001f0000},
+-	{0x0000a144, 0x01000101},
+-	{0x0000a148, 0x011e011f},
+-	{0x0000a14c, 0x011c011d},
+-	{0x0000a150, 0x02030204},
+-	{0x0000a154, 0x02010202},
+-	{0x0000a158, 0x021f0200},
+-	{0x0000a15c, 0x0302021e},
+-	{0x0000a160, 0x03000301},
+-	{0x0000a164, 0x031e031f},
+-	{0x0000a168, 0x0402031d},
+-	{0x0000a16c, 0x04000401},
+-	{0x0000a170, 0x041e041f},
+-	{0x0000a174, 0x0502041d},
+-	{0x0000a178, 0x05000501},
+-	{0x0000a17c, 0x051e051f},
+-	{0x0000a180, 0x06010602},
+-	{0x0000a184, 0x061f0600},
+-	{0x0000a188, 0x061d061e},
+-	{0x0000a18c, 0x07020703},
+-	{0x0000a190, 0x07000701},
+-	{0x0000a194, 0x00000000},
+-	{0x0000a198, 0x00000000},
+-	{0x0000a19c, 0x00000000},
+-	{0x0000a1a0, 0x00000000},
+-	{0x0000a1a4, 0x00000000},
+-	{0x0000a1a8, 0x00000000},
+-	{0x0000a1ac, 0x00000000},
+-	{0x0000a1b0, 0x00000000},
+-	{0x0000a1b4, 0x00000000},
+-	{0x0000a1b8, 0x00000000},
+-	{0x0000a1bc, 0x00000000},
+-	{0x0000a1c0, 0x00000000},
+-	{0x0000a1c4, 0x00000000},
+-	{0x0000a1c8, 0x00000000},
+-	{0x0000a1cc, 0x00000000},
+-	{0x0000a1d0, 0x00000000},
+-	{0x0000a1d4, 0x00000000},
+-	{0x0000a1d8, 0x00000000},
+-	{0x0000a1dc, 0x00000000},
+-	{0x0000a1e0, 0x00000000},
+-	{0x0000a1e4, 0x00000000},
+-	{0x0000a1e8, 0x00000000},
+-	{0x0000a1ec, 0x00000000},
+-	{0x0000a1f0, 0x00000396},
+-	{0x0000a1f4, 0x00000396},
+-	{0x0000a1f8, 0x00000396},
+-	{0x0000a1fc, 0x00000196},
+-	{0x0000b000, 0x00010000},
+-	{0x0000b004, 0x00030002},
+-	{0x0000b008, 0x00050004},
+-	{0x0000b00c, 0x00810080},
+-	{0x0000b010, 0x00830082},
+-	{0x0000b014, 0x01810180},
+-	{0x0000b018, 0x01830182},
+-	{0x0000b01c, 0x01850184},
+-	{0x0000b020, 0x02810280},
+-	{0x0000b024, 0x02830282},
+-	{0x0000b028, 0x02850284},
+-	{0x0000b02c, 0x02890288},
+-	{0x0000b030, 0x028b028a},
+-	{0x0000b034, 0x0388028c},
+-	{0x0000b038, 0x038a0389},
+-	{0x0000b03c, 0x038c038b},
+-	{0x0000b040, 0x0390038d},
+-	{0x0000b044, 0x03920391},
+-	{0x0000b048, 0x03940393},
+-	{0x0000b04c, 0x03960395},
+-	{0x0000b050, 0x00000000},
+-	{0x0000b054, 0x00000000},
+-	{0x0000b058, 0x00000000},
+-	{0x0000b05c, 0x00000000},
+-	{0x0000b060, 0x00000000},
+-	{0x0000b064, 0x00000000},
+-	{0x0000b068, 0x00000000},
+-	{0x0000b06c, 0x00000000},
+-	{0x0000b070, 0x00000000},
+-	{0x0000b074, 0x00000000},
+-	{0x0000b078, 0x00000000},
+-	{0x0000b07c, 0x00000000},
+-	{0x0000b080, 0x2a2d2f32},
+-	{0x0000b084, 0x21232328},
+-	{0x0000b088, 0x19191c1e},
+-	{0x0000b08c, 0x12141417},
+-	{0x0000b090, 0x07070e0e},
+-	{0x0000b094, 0x03030305},
+-	{0x0000b098, 0x00000003},
+-	{0x0000b09c, 0x00000000},
+-	{0x0000b0a0, 0x00000000},
+-	{0x0000b0a4, 0x00000000},
+-	{0x0000b0a8, 0x00000000},
+-	{0x0000b0ac, 0x00000000},
+-	{0x0000b0b0, 0x00000000},
+-	{0x0000b0b4, 0x00000000},
+-	{0x0000b0b8, 0x00000000},
+-	{0x0000b0bc, 0x00000000},
+-	{0x0000b0c0, 0x003f0020},
+-	{0x0000b0c4, 0x00400041},
+-	{0x0000b0c8, 0x0140005f},
+-	{0x0000b0cc, 0x0160015f},
+-	{0x0000b0d0, 0x017e017f},
+-	{0x0000b0d4, 0x02410242},
+-	{0x0000b0d8, 0x025f0240},
+-	{0x0000b0dc, 0x027f0260},
+-	{0x0000b0e0, 0x0341027e},
+-	{0x0000b0e4, 0x035f0340},
+-	{0x0000b0e8, 0x037f0360},
+-	{0x0000b0ec, 0x04400441},
+-	{0x0000b0f0, 0x0460045f},
+-	{0x0000b0f4, 0x0541047f},
+-	{0x0000b0f8, 0x055f0540},
+-	{0x0000b0fc, 0x057f0560},
+-	{0x0000b100, 0x06400641},
+-	{0x0000b104, 0x0660065f},
+-	{0x0000b108, 0x067e067f},
+-	{0x0000b10c, 0x07410742},
+-	{0x0000b110, 0x075f0740},
+-	{0x0000b114, 0x077f0760},
+-	{0x0000b118, 0x07800781},
+-	{0x0000b11c, 0x07a0079f},
+-	{0x0000b120, 0x07c107bf},
+-	{0x0000b124, 0x000007c0},
+-	{0x0000b128, 0x00000000},
+-	{0x0000b12c, 0x00000000},
+-	{0x0000b130, 0x00000000},
+-	{0x0000b134, 0x00000000},
+-	{0x0000b138, 0x00000000},
+-	{0x0000b13c, 0x00000000},
+-	{0x0000b140, 0x003f0020},
+-	{0x0000b144, 0x00400041},
+-	{0x0000b148, 0x0140005f},
+-	{0x0000b14c, 0x0160015f},
+-	{0x0000b150, 0x017e017f},
+-	{0x0000b154, 0x02410242},
+-	{0x0000b158, 0x025f0240},
+-	{0x0000b15c, 0x027f0260},
+-	{0x0000b160, 0x0341027e},
+-	{0x0000b164, 0x035f0340},
+-	{0x0000b168, 0x037f0360},
+-	{0x0000b16c, 0x04400441},
+-	{0x0000b170, 0x0460045f},
+-	{0x0000b174, 0x0541047f},
+-	{0x0000b178, 0x055f0540},
+-	{0x0000b17c, 0x057f0560},
+-	{0x0000b180, 0x06400641},
+-	{0x0000b184, 0x0660065f},
+-	{0x0000b188, 0x067e067f},
+-	{0x0000b18c, 0x07410742},
+-	{0x0000b190, 0x075f0740},
+-	{0x0000b194, 0x077f0760},
+-	{0x0000b198, 0x07800781},
+-	{0x0000b19c, 0x07a0079f},
+-	{0x0000b1a0, 0x07c107bf},
+-	{0x0000b1a4, 0x000007c0},
+-	{0x0000b1a8, 0x00000000},
+-	{0x0000b1ac, 0x00000000},
+-	{0x0000b1b0, 0x00000000},
+-	{0x0000b1b4, 0x00000000},
+-	{0x0000b1b8, 0x00000000},
+-	{0x0000b1bc, 0x00000000},
+-	{0x0000b1c0, 0x00000000},
+-	{0x0000b1c4, 0x00000000},
+-	{0x0000b1c8, 0x00000000},
+-	{0x0000b1cc, 0x00000000},
+-	{0x0000b1d0, 0x00000000},
+-	{0x0000b1d4, 0x00000000},
+-	{0x0000b1d8, 0x00000000},
+-	{0x0000b1dc, 0x00000000},
+-	{0x0000b1e0, 0x00000000},
+-	{0x0000b1e4, 0x00000000},
+-	{0x0000b1e8, 0x00000000},
+-	{0x0000b1ec, 0x00000000},
+-	{0x0000b1f0, 0x00000396},
+-	{0x0000b1f4, 0x00000396},
+-	{0x0000b1f8, 0x00000396},
+-	{0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9480_modes_high_ob_db_tx_gain_table_1p0[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+-	{0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+-	{0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+-	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+-	{0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
+-	{0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
+-	{0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
+-	{0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
+-	{0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
+-	{0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
+-	{0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
+-	{0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
+-	{0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
+-	{0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
+-	{0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
+-	{0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
+-	{0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
+-	{0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
+-	{0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
+-	{0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
+-	{0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
+-	{0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
+-	{0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
+-	{0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
+-	{0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
+-	{0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
+-	{0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
+-	{0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
+-	{0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+-	{0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+-	{0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+-	{0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+-	{0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+-	{0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+-	{0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+-	{0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+-	{0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+-	{0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+-	{0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
+-	{0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+-	{0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
+-};
+-
+-static const u32 ar9480_common_wo_xlna_rx_gain_table_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x00010000},
+-	{0x0000a004, 0x00030002},
+-	{0x0000a008, 0x00050004},
+-	{0x0000a00c, 0x00810080},
+-	{0x0000a010, 0x00830082},
+-	{0x0000a014, 0x01810180},
+-	{0x0000a018, 0x01830182},
+-	{0x0000a01c, 0x01850184},
+-	{0x0000a020, 0x01890188},
+-	{0x0000a024, 0x018b018a},
+-	{0x0000a028, 0x018d018c},
+-	{0x0000a02c, 0x03820190},
+-	{0x0000a030, 0x03840383},
+-	{0x0000a034, 0x03880385},
+-	{0x0000a038, 0x038a0389},
+-	{0x0000a03c, 0x038c038b},
+-	{0x0000a040, 0x0390038d},
+-	{0x0000a044, 0x03920391},
+-	{0x0000a048, 0x03940393},
+-	{0x0000a04c, 0x03960395},
+-	{0x0000a050, 0x00000000},
+-	{0x0000a054, 0x00000000},
+-	{0x0000a058, 0x00000000},
+-	{0x0000a05c, 0x00000000},
+-	{0x0000a060, 0x00000000},
+-	{0x0000a064, 0x00000000},
+-	{0x0000a068, 0x00000000},
+-	{0x0000a06c, 0x00000000},
+-	{0x0000a070, 0x00000000},
+-	{0x0000a074, 0x00000000},
+-	{0x0000a078, 0x00000000},
+-	{0x0000a07c, 0x00000000},
+-	{0x0000a080, 0x29292929},
+-	{0x0000a084, 0x29292929},
+-	{0x0000a088, 0x29292929},
+-	{0x0000a08c, 0x29292929},
+-	{0x0000a090, 0x22292929},
+-	{0x0000a094, 0x1d1d2222},
+-	{0x0000a098, 0x0c111117},
+-	{0x0000a09c, 0x00030303},
+-	{0x0000a0a0, 0x00000000},
+-	{0x0000a0a4, 0x00000000},
+-	{0x0000a0a8, 0x00000000},
+-	{0x0000a0ac, 0x00000000},
+-	{0x0000a0b0, 0x00000000},
+-	{0x0000a0b4, 0x00000000},
+-	{0x0000a0b8, 0x00000000},
+-	{0x0000a0bc, 0x00000000},
+-	{0x0000a0c0, 0x001f0000},
+-	{0x0000a0c4, 0x01000101},
+-	{0x0000a0c8, 0x011e011f},
+-	{0x0000a0cc, 0x011c011d},
+-	{0x0000a0d0, 0x02030204},
+-	{0x0000a0d4, 0x02010202},
+-	{0x0000a0d8, 0x021f0200},
+-	{0x0000a0dc, 0x0302021e},
+-	{0x0000a0e0, 0x03000301},
+-	{0x0000a0e4, 0x031e031f},
+-	{0x0000a0e8, 0x0402031d},
+-	{0x0000a0ec, 0x04000401},
+-	{0x0000a0f0, 0x041e041f},
+-	{0x0000a0f4, 0x0502041d},
+-	{0x0000a0f8, 0x05000501},
+-	{0x0000a0fc, 0x051e051f},
+-	{0x0000a100, 0x06010602},
+-	{0x0000a104, 0x061f0600},
+-	{0x0000a108, 0x061d061e},
+-	{0x0000a10c, 0x07020703},
+-	{0x0000a110, 0x07000701},
+-	{0x0000a114, 0x00000000},
+-	{0x0000a118, 0x00000000},
+-	{0x0000a11c, 0x00000000},
+-	{0x0000a120, 0x00000000},
+-	{0x0000a124, 0x00000000},
+-	{0x0000a128, 0x00000000},
+-	{0x0000a12c, 0x00000000},
+-	{0x0000a130, 0x00000000},
+-	{0x0000a134, 0x00000000},
+-	{0x0000a138, 0x00000000},
+-	{0x0000a13c, 0x00000000},
+-	{0x0000a140, 0x001f0000},
+-	{0x0000a144, 0x01000101},
+-	{0x0000a148, 0x011e011f},
+-	{0x0000a14c, 0x011c011d},
+-	{0x0000a150, 0x02030204},
+-	{0x0000a154, 0x02010202},
+-	{0x0000a158, 0x021f0200},
+-	{0x0000a15c, 0x0302021e},
+-	{0x0000a160, 0x03000301},
+-	{0x0000a164, 0x031e031f},
+-	{0x0000a168, 0x0402031d},
+-	{0x0000a16c, 0x04000401},
+-	{0x0000a170, 0x041e041f},
+-	{0x0000a174, 0x0502041d},
+-	{0x0000a178, 0x05000501},
+-	{0x0000a17c, 0x051e051f},
+-	{0x0000a180, 0x06010602},
+-	{0x0000a184, 0x061f0600},
+-	{0x0000a188, 0x061d061e},
+-	{0x0000a18c, 0x07020703},
+-	{0x0000a190, 0x07000701},
+-	{0x0000a194, 0x00000000},
+-	{0x0000a198, 0x00000000},
+-	{0x0000a19c, 0x00000000},
+-	{0x0000a1a0, 0x00000000},
+-	{0x0000a1a4, 0x00000000},
+-	{0x0000a1a8, 0x00000000},
+-	{0x0000a1ac, 0x00000000},
+-	{0x0000a1b0, 0x00000000},
+-	{0x0000a1b4, 0x00000000},
+-	{0x0000a1b8, 0x00000000},
+-	{0x0000a1bc, 0x00000000},
+-	{0x0000a1c0, 0x00000000},
+-	{0x0000a1c4, 0x00000000},
+-	{0x0000a1c8, 0x00000000},
+-	{0x0000a1cc, 0x00000000},
+-	{0x0000a1d0, 0x00000000},
+-	{0x0000a1d4, 0x00000000},
+-	{0x0000a1d8, 0x00000000},
+-	{0x0000a1dc, 0x00000000},
+-	{0x0000a1e0, 0x00000000},
+-	{0x0000a1e4, 0x00000000},
+-	{0x0000a1e8, 0x00000000},
+-	{0x0000a1ec, 0x00000000},
+-	{0x0000a1f0, 0x00000396},
+-	{0x0000a1f4, 0x00000396},
+-	{0x0000a1f8, 0x00000396},
+-	{0x0000a1fc, 0x00000196},
+-	{0x0000b000, 0x00010000},
+-	{0x0000b004, 0x00030002},
+-	{0x0000b008, 0x00050004},
+-	{0x0000b00c, 0x00810080},
+-	{0x0000b010, 0x00830082},
+-	{0x0000b014, 0x01810180},
+-	{0x0000b018, 0x01830182},
+-	{0x0000b01c, 0x01850184},
+-	{0x0000b020, 0x02810280},
+-	{0x0000b024, 0x02830282},
+-	{0x0000b028, 0x02850284},
+-	{0x0000b02c, 0x02890288},
+-	{0x0000b030, 0x028b028a},
+-	{0x0000b034, 0x0388028c},
+-	{0x0000b038, 0x038a0389},
+-	{0x0000b03c, 0x038c038b},
+-	{0x0000b040, 0x0390038d},
+-	{0x0000b044, 0x03920391},
+-	{0x0000b048, 0x03940393},
+-	{0x0000b04c, 0x03960395},
+-	{0x0000b050, 0x00000000},
+-	{0x0000b054, 0x00000000},
+-	{0x0000b058, 0x00000000},
+-	{0x0000b05c, 0x00000000},
+-	{0x0000b060, 0x00000000},
+-	{0x0000b064, 0x00000000},
+-	{0x0000b068, 0x00000000},
+-	{0x0000b06c, 0x00000000},
+-	{0x0000b070, 0x00000000},
+-	{0x0000b074, 0x00000000},
+-	{0x0000b078, 0x00000000},
+-	{0x0000b07c, 0x00000000},
+-	{0x0000b080, 0x32323232},
+-	{0x0000b084, 0x2f2f3232},
+-	{0x0000b088, 0x23282a2d},
+-	{0x0000b08c, 0x1c1e2123},
+-	{0x0000b090, 0x14171919},
+-	{0x0000b094, 0x0e0e1214},
+-	{0x0000b098, 0x03050707},
+-	{0x0000b09c, 0x00030303},
+-	{0x0000b0a0, 0x00000000},
+-	{0x0000b0a4, 0x00000000},
+-	{0x0000b0a8, 0x00000000},
+-	{0x0000b0ac, 0x00000000},
+-	{0x0000b0b0, 0x00000000},
+-	{0x0000b0b4, 0x00000000},
+-	{0x0000b0b8, 0x00000000},
+-	{0x0000b0bc, 0x00000000},
+-	{0x0000b0c0, 0x003f0020},
+-	{0x0000b0c4, 0x00400041},
+-	{0x0000b0c8, 0x0140005f},
+-	{0x0000b0cc, 0x0160015f},
+-	{0x0000b0d0, 0x017e017f},
+-	{0x0000b0d4, 0x02410242},
+-	{0x0000b0d8, 0x025f0240},
+-	{0x0000b0dc, 0x027f0260},
+-	{0x0000b0e0, 0x0341027e},
+-	{0x0000b0e4, 0x035f0340},
+-	{0x0000b0e8, 0x037f0360},
+-	{0x0000b0ec, 0x04400441},
+-	{0x0000b0f0, 0x0460045f},
+-	{0x0000b0f4, 0x0541047f},
+-	{0x0000b0f8, 0x055f0540},
+-	{0x0000b0fc, 0x057f0560},
+-	{0x0000b100, 0x06400641},
+-	{0x0000b104, 0x0660065f},
+-	{0x0000b108, 0x067e067f},
+-	{0x0000b10c, 0x07410742},
+-	{0x0000b110, 0x075f0740},
+-	{0x0000b114, 0x077f0760},
+-	{0x0000b118, 0x07800781},
+-	{0x0000b11c, 0x07a0079f},
+-	{0x0000b120, 0x07c107bf},
+-	{0x0000b124, 0x000007c0},
+-	{0x0000b128, 0x00000000},
+-	{0x0000b12c, 0x00000000},
+-	{0x0000b130, 0x00000000},
+-	{0x0000b134, 0x00000000},
+-	{0x0000b138, 0x00000000},
+-	{0x0000b13c, 0x00000000},
+-	{0x0000b140, 0x003f0020},
+-	{0x0000b144, 0x00400041},
+-	{0x0000b148, 0x0140005f},
+-	{0x0000b14c, 0x0160015f},
+-	{0x0000b150, 0x017e017f},
+-	{0x0000b154, 0x02410242},
+-	{0x0000b158, 0x025f0240},
+-	{0x0000b15c, 0x027f0260},
+-	{0x0000b160, 0x0341027e},
+-	{0x0000b164, 0x035f0340},
+-	{0x0000b168, 0x037f0360},
+-	{0x0000b16c, 0x04400441},
+-	{0x0000b170, 0x0460045f},
+-	{0x0000b174, 0x0541047f},
+-	{0x0000b178, 0x055f0540},
+-	{0x0000b17c, 0x057f0560},
+-	{0x0000b180, 0x06400641},
+-	{0x0000b184, 0x0660065f},
+-	{0x0000b188, 0x067e067f},
+-	{0x0000b18c, 0x07410742},
+-	{0x0000b190, 0x075f0740},
+-	{0x0000b194, 0x077f0760},
+-	{0x0000b198, 0x07800781},
+-	{0x0000b19c, 0x07a0079f},
+-	{0x0000b1a0, 0x07c107bf},
+-	{0x0000b1a4, 0x000007c0},
+-	{0x0000b1a8, 0x00000000},
+-	{0x0000b1ac, 0x00000000},
+-	{0x0000b1b0, 0x00000000},
+-	{0x0000b1b4, 0x00000000},
+-	{0x0000b1b8, 0x00000000},
+-	{0x0000b1bc, 0x00000000},
+-	{0x0000b1c0, 0x00000000},
+-	{0x0000b1c4, 0x00000000},
+-	{0x0000b1c8, 0x00000000},
+-	{0x0000b1cc, 0x00000000},
+-	{0x0000b1d0, 0x00000000},
+-	{0x0000b1d4, 0x00000000},
+-	{0x0000b1d8, 0x00000000},
+-	{0x0000b1dc, 0x00000000},
+-	{0x0000b1e0, 0x00000000},
+-	{0x0000b1e4, 0x00000000},
+-	{0x0000b1e8, 0x00000000},
+-	{0x0000b1ec, 0x00000000},
+-	{0x0000b1f0, 0x00000396},
+-	{0x0000b1f4, 0x00000396},
+-	{0x0000b1f8, 0x00000396},
+-	{0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9480_1p0_mac_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+-	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+-	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+-	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+-	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+-	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+-	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+-	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+-};
+-
+-static const u32 ar9480_1p0_mac_postamble_emulation[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
+-	{0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
+-};
+-
+-static const u32 ar9480_1p0_tx_gain_table_baseband_postamble_emulation[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
+-	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
+-	{0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
+-	{0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
+-	{0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
+-	{0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
+-	{0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
+-	{0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
+-	{0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
+-	{0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
+-	{0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
+-	{0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
+-	{0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
+-};
+-
+-static const u32 ar9480_1p0_radio_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
+-	{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24646c08, 0x24646c08},
+-	{0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
+-	{0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+-	{0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+-	{0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+-	{0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
+-};
+-
+-static const u32 ar9480_1p0_soc_postamble_emulation[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00007010, 0x00001133, 0x00001133, 0x00001133, 0x00001133},
+-};
+-
+-static const u32 ar9480_1p0_baseband_core[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00009800, 0xafe68e30},
+-	{0x00009804, 0xfd14e000},
+-	{0x00009808, 0x9c0a9f6b},
+-	{0x0000980c, 0x04900000},
+-	{0x00009814, 0x9280c00a},
+-	{0x00009818, 0x00000000},
+-	{0x0000981c, 0x00020028},
+-	{0x00009834, 0x6400a290},
+-	{0x00009838, 0x0108ecff},
+-	{0x0000983c, 0x0d000600},
+-	{0x00009880, 0x201fff00},
+-	{0x00009884, 0x00001042},
+-	{0x000098a4, 0x00200400},
+-	{0x000098b0, 0x32840bbe},
+-	{0x000098d0, 0x004b6a8e},
+-	{0x000098d4, 0x00000820},
+-	{0x000098dc, 0x00000000},
+-	{0x000098e4, 0x01ffffff},
+-	{0x000098e8, 0x01ffffff},
+-	{0x000098ec, 0x01ffffff},
+-	{0x000098f0, 0x00000000},
+-	{0x000098f4, 0x00000000},
+-	{0x00009c04, 0xff55ff55},
+-	{0x00009c08, 0x0320ff55},
+-	{0x00009c0c, 0x00000000},
+-	{0x00009c10, 0x00000000},
+-	{0x00009c14, 0x00046384},
+-	{0x00009c18, 0x05b6b440},
+-	{0x00009c1c, 0x00b6b440},
+-	{0x00009d00, 0xc080a333},
+-	{0x00009d04, 0x40206c10},
+-	{0x00009d08, 0x009c4060},
+-	{0x00009d0c, 0x9883800a},
+-	{0x00009d10, 0x01834061},
+-	{0x00009d14, 0x00c0040b},
+-	{0x00009d18, 0x00000000},
+-	{0x00009e08, 0x0038230c},
+-	{0x00009e24, 0x990bb514},
+-	{0x00009e28, 0x0c6f0000},
+-	{0x00009e30, 0x06336f77},
+-	{0x00009e34, 0x6af6532f},
+-	{0x00009e38, 0x0cc80c00},
+-	{0x00009e40, 0x0d261820},
+-	{0x00009e4c, 0x00001004},
+-	{0x00009e50, 0x00ff03f1},
+-	{0x00009e54, 0x64c355c7},
+-	{0x00009e58, 0xfd897735},
+-	{0x00009e5c, 0xe9198724},
+-	{0x00009fc0, 0x803e4788},
+-	{0x00009fc4, 0x0001efb5},
+-	{0x00009fcc, 0x40000014},
+-	{0x00009fd0, 0x01193b93},
+-	{0x0000a20c, 0x00000000},
+-	{0x0000a220, 0x00000000},
+-	{0x0000a224, 0x00000000},
+-	{0x0000a228, 0x10002310},
+-	{0x0000a23c, 0x00000000},
+-	{0x0000a244, 0x0c000000},
+-	{0x0000a2a0, 0x00000001},
+-	{0x0000a2c0, 0x00000001},
+-	{0x0000a2c8, 0x00000000},
+-	{0x0000a2cc, 0x18c43433},
+-	{0x0000a2d4, 0x00000000},
+-	{0x0000a2ec, 0x00000000},
+-	{0x0000a2f0, 0x00000000},
+-	{0x0000a2f4, 0x00000000},
+-	{0x0000a2f8, 0x00000000},
+-	{0x0000a344, 0x00000000},
+-	{0x0000a34c, 0x00000000},
+-	{0x0000a350, 0x0000a000},
+-	{0x0000a364, 0x00000000},
+-	{0x0000a370, 0x00000000},
+-	{0x0000a390, 0x00000001},
+-	{0x0000a394, 0x00000444},
+-	{0x0000a398, 0x001f0e0f},
+-	{0x0000a39c, 0x0075393f},
+-	{0x0000a3a0, 0xb79f6427},
+-	{0x0000a3a4, 0x00000000},
+-	{0x0000a3a8, 0xaaaaaaaa},
+-	{0x0000a3ac, 0x3c466478},
+-	{0x0000a3c0, 0x20202020},
+-	{0x0000a3c4, 0x22222220},
+-	{0x0000a3c8, 0x20200020},
+-	{0x0000a3cc, 0x20202020},
+-	{0x0000a3d0, 0x20202020},
+-	{0x0000a3d4, 0x20202020},
+-	{0x0000a3d8, 0x20202020},
+-	{0x0000a3dc, 0x20202020},
+-	{0x0000a3e0, 0x20202020},
+-	{0x0000a3e4, 0x20202020},
+-	{0x0000a3e8, 0x20202020},
+-	{0x0000a3ec, 0x20202020},
+-	{0x0000a3f0, 0x00000000},
+-	{0x0000a3f4, 0x00000006},
+-	{0x0000a3f8, 0x0c9bd380},
+-	{0x0000a3fc, 0x000f0f01},
+-	{0x0000a400, 0x8fa91f01},
+-	{0x0000a404, 0x00000000},
+-	{0x0000a408, 0x0e79e5c6},
+-	{0x0000a40c, 0x00820820},
+-	{0x0000a414, 0x1ce739ce},
+-	{0x0000a418, 0x2d001dce},
+-	{0x0000a41c, 0x1ce739ce},
+-	{0x0000a420, 0x000001ce},
+-	{0x0000a424, 0x1ce739ce},
+-	{0x0000a428, 0x000001ce},
+-	{0x0000a42c, 0x1ce739ce},
+-	{0x0000a430, 0x1ce739ce},
+-	{0x0000a434, 0x00000000},
+-	{0x0000a438, 0x00001801},
+-	{0x0000a43c, 0x00100000},
+-	{0x0000a440, 0x00000000},
+-	{0x0000a444, 0x00000000},
+-	{0x0000a448, 0x05000080},
+-	{0x0000a44c, 0x00000001},
+-	{0x0000a450, 0x00010000},
+-	{0x0000a458, 0x00000000},
+-	{0x0000a644, 0xbfad9d74},
+-	{0x0000a648, 0x0048060a},
+-	{0x0000a64c, 0x00003c37},
+-	{0x0000a670, 0x03020100},
+-	{0x0000a674, 0x09080504},
+-	{0x0000a678, 0x0d0c0b0a},
+-	{0x0000a67c, 0x13121110},
+-	{0x0000a680, 0x31301514},
+-	{0x0000a684, 0x35343332},
+-	{0x0000a688, 0x00000036},
+-	{0x0000a690, 0x00000838},
+-	{0x0000a6b0, 0x0000000a},
+-	{0x0000a6b4, 0x28f12c01},
+-	{0x0000a7c0, 0x00000000},
+-	{0x0000a7c4, 0xfffffffc},
+-	{0x0000a7c8, 0x00000000},
+-	{0x0000a7cc, 0x00000000},
+-	{0x0000a7d0, 0x00000000},
+-	{0x0000a7d4, 0x00000004},
+-	{0x0000a7dc, 0x00000001},
+-	{0x0000a8d0, 0x004b6a8e},
+-	{0x0000a8d4, 0x00000820},
+-	{0x0000a8dc, 0x00000000},
+-	{0x0000a8f0, 0x00000000},
+-	{0x0000a8f4, 0x00000000},
+-	{0x0000b2d0, 0x00000080},
+-	{0x0000b2d4, 0x00000000},
+-	{0x0000b2ec, 0x00000000},
+-	{0x0000b2f0, 0x00000000},
+-	{0x0000b2f4, 0x00000000},
+-	{0x0000b2f8, 0x00000000},
+-	{0x0000b408, 0x0e79e5c0},
+-	{0x0000b40c, 0x00820820},
+-	{0x0000b420, 0x00000000},
+-	{0x0000b6b0, 0x0000000a},
+-	{0x0000b6b4, 0x00c00001},
+-};
+-
+-static const u32 ar9480_1p0_baseband_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
+-	{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
+-	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
+-	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
+-	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
+-	{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
+-	{0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
+-	{0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
+-	{0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
+-	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
+-	{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
+-	{0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e},
+-	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
+-	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
+-	{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
+-	{0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
+-	{0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},
+-	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
+-	{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
+-	{0x0000a204, 0x0131b7c0, 0x0131b7c4, 0x0131b7c4, 0x0131b7c0},
+-	{0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
+-	{0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
+-	{0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
+-	{0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
+-	{0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
+-	{0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
+-	{0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
+-	{0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
+-	{0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
+-	{0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
+-	{0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
+-	{0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
+-	{0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
+-	{0x0000a288, 0x00000110, 0x00000110, 0x00100110, 0x00100110},
+-	{0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
+-	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+-	{0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
+-	{0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
+-	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+-	{0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
+-	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+-	{0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
+-	{0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
+-};
+-
+-static const u32 ar9480_modes_fast_clock_1p0[][3] = {
+-	/* Addr      5G_HT20     5G_HT40   */
+-	{0x00001030, 0x00000268, 0x000004d0},
+-	{0x00001070, 0x0000018c, 0x00000318},
+-	{0x000010b0, 0x00000fd0, 0x00001fa0},
+-	{0x00008014, 0x044c044c, 0x08980898},
+-	{0x0000801c, 0x148ec02b, 0x148ec057},
+-	{0x00008318, 0x000044c0, 0x00008980},
+-	{0x00009e00, 0x0372131c, 0x0372131c},
+-	{0x0000a230, 0x0000400b, 0x00004016},
+-	{0x0000a254, 0x00000898, 0x00001130},
+-};
+-
+-static const u32 ar9480_modes_low_ob_db_tx_gain_table_1p0[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+-	{0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+-	{0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+-	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+-	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+-	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+-	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+-	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
+-	{0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
+-	{0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
+-	{0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
+-	{0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
+-	{0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
+-	{0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
+-	{0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
+-	{0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
+-	{0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
+-	{0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
+-	{0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
+-	{0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
+-	{0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
+-	{0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
+-	{0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
+-	{0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
+-	{0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
+-	{0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
+-	{0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
+-	{0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
+-	{0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
+-	{0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
+-	{0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
+-	{0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
+-	{0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
+-	{0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
+-	{0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+-	{0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+-	{0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+-	{0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
+-	{0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+-	{0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
+-};
+-
+-static const u32 ar9480_1p0_soc_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
+-};
+-
+-static const u32 ar9480_common_mixed_rx_gain_table_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x00010000},
+-	{0x0000a004, 0x00030002},
+-	{0x0000a008, 0x00050004},
+-	{0x0000a00c, 0x00810080},
+-	{0x0000a010, 0x00830082},
+-	{0x0000a014, 0x01810180},
+-	{0x0000a018, 0x01830182},
+-	{0x0000a01c, 0x01850184},
+-	{0x0000a020, 0x01890188},
+-	{0x0000a024, 0x018b018a},
+-	{0x0000a028, 0x018d018c},
+-	{0x0000a02c, 0x03820190},
+-	{0x0000a030, 0x03840383},
+-	{0x0000a034, 0x03880385},
+-	{0x0000a038, 0x038a0389},
+-	{0x0000a03c, 0x038c038b},
+-	{0x0000a040, 0x0390038d},
+-	{0x0000a044, 0x03920391},
+-	{0x0000a048, 0x03940393},
+-	{0x0000a04c, 0x03960395},
+-	{0x0000a050, 0x00000000},
+-	{0x0000a054, 0x00000000},
+-	{0x0000a058, 0x00000000},
+-	{0x0000a05c, 0x00000000},
+-	{0x0000a060, 0x00000000},
+-	{0x0000a064, 0x00000000},
+-	{0x0000a068, 0x00000000},
+-	{0x0000a06c, 0x00000000},
+-	{0x0000a070, 0x00000000},
+-	{0x0000a074, 0x00000000},
+-	{0x0000a078, 0x00000000},
+-	{0x0000a07c, 0x00000000},
+-	{0x0000a080, 0x29292929},
+-	{0x0000a084, 0x29292929},
+-	{0x0000a088, 0x29292929},
+-	{0x0000a08c, 0x29292929},
+-	{0x0000a090, 0x22292929},
+-	{0x0000a094, 0x1d1d2222},
+-	{0x0000a098, 0x0c111117},
+-	{0x0000a09c, 0x00030303},
+-	{0x0000a0a0, 0x00000000},
+-	{0x0000a0a4, 0x00000000},
+-	{0x0000a0a8, 0x00000000},
+-	{0x0000a0ac, 0x00000000},
+-	{0x0000a0b0, 0x00000000},
+-	{0x0000a0b4, 0x00000000},
+-	{0x0000a0b8, 0x00000000},
+-	{0x0000a0bc, 0x00000000},
+-	{0x0000a0c0, 0x001f0000},
+-	{0x0000a0c4, 0x01000101},
+-	{0x0000a0c8, 0x011e011f},
+-	{0x0000a0cc, 0x011c011d},
+-	{0x0000a0d0, 0x02030204},
+-	{0x0000a0d4, 0x02010202},
+-	{0x0000a0d8, 0x021f0200},
+-	{0x0000a0dc, 0x0302021e},
+-	{0x0000a0e0, 0x03000301},
+-	{0x0000a0e4, 0x031e031f},
+-	{0x0000a0e8, 0x0402031d},
+-	{0x0000a0ec, 0x04000401},
+-	{0x0000a0f0, 0x041e041f},
+-	{0x0000a0f4, 0x0502041d},
+-	{0x0000a0f8, 0x05000501},
+-	{0x0000a0fc, 0x051e051f},
+-	{0x0000a100, 0x06010602},
+-	{0x0000a104, 0x061f0600},
+-	{0x0000a108, 0x061d061e},
+-	{0x0000a10c, 0x07020703},
+-	{0x0000a110, 0x07000701},
+-	{0x0000a114, 0x00000000},
+-	{0x0000a118, 0x00000000},
+-	{0x0000a11c, 0x00000000},
+-	{0x0000a120, 0x00000000},
+-	{0x0000a124, 0x00000000},
+-	{0x0000a128, 0x00000000},
+-	{0x0000a12c, 0x00000000},
+-	{0x0000a130, 0x00000000},
+-	{0x0000a134, 0x00000000},
+-	{0x0000a138, 0x00000000},
+-	{0x0000a13c, 0x00000000},
+-	{0x0000a140, 0x001f0000},
+-	{0x0000a144, 0x01000101},
+-	{0x0000a148, 0x011e011f},
+-	{0x0000a14c, 0x011c011d},
+-	{0x0000a150, 0x02030204},
+-	{0x0000a154, 0x02010202},
+-	{0x0000a158, 0x021f0200},
+-	{0x0000a15c, 0x0302021e},
+-	{0x0000a160, 0x03000301},
+-	{0x0000a164, 0x031e031f},
+-	{0x0000a168, 0x0402031d},
+-	{0x0000a16c, 0x04000401},
+-	{0x0000a170, 0x041e041f},
+-	{0x0000a174, 0x0502041d},
+-	{0x0000a178, 0x05000501},
+-	{0x0000a17c, 0x051e051f},
+-	{0x0000a180, 0x06010602},
+-	{0x0000a184, 0x061f0600},
+-	{0x0000a188, 0x061d061e},
+-	{0x0000a18c, 0x07020703},
+-	{0x0000a190, 0x07000701},
+-	{0x0000a194, 0x00000000},
+-	{0x0000a198, 0x00000000},
+-	{0x0000a19c, 0x00000000},
+-	{0x0000a1a0, 0x00000000},
+-	{0x0000a1a4, 0x00000000},
+-	{0x0000a1a8, 0x00000000},
+-	{0x0000a1ac, 0x00000000},
+-	{0x0000a1b0, 0x00000000},
+-	{0x0000a1b4, 0x00000000},
+-	{0x0000a1b8, 0x00000000},
+-	{0x0000a1bc, 0x00000000},
+-	{0x0000a1c0, 0x00000000},
+-	{0x0000a1c4, 0x00000000},
+-	{0x0000a1c8, 0x00000000},
+-	{0x0000a1cc, 0x00000000},
+-	{0x0000a1d0, 0x00000000},
+-	{0x0000a1d4, 0x00000000},
+-	{0x0000a1d8, 0x00000000},
+-	{0x0000a1dc, 0x00000000},
+-	{0x0000a1e0, 0x00000000},
+-	{0x0000a1e4, 0x00000000},
+-	{0x0000a1e8, 0x00000000},
+-	{0x0000a1ec, 0x00000000},
+-	{0x0000a1f0, 0x00000396},
+-	{0x0000a1f4, 0x00000396},
+-	{0x0000a1f8, 0x00000396},
+-	{0x0000a1fc, 0x00000196},
+-	{0x0000b000, 0x00010000},
+-	{0x0000b004, 0x00030002},
+-	{0x0000b008, 0x00050004},
+-	{0x0000b00c, 0x00810080},
+-	{0x0000b010, 0x00830082},
+-	{0x0000b014, 0x01810180},
+-	{0x0000b018, 0x01830182},
+-	{0x0000b01c, 0x01850184},
+-	{0x0000b020, 0x02810280},
+-	{0x0000b024, 0x02830282},
+-	{0x0000b028, 0x02850284},
+-	{0x0000b02c, 0x02890288},
+-	{0x0000b030, 0x028b028a},
+-	{0x0000b034, 0x0388028c},
+-	{0x0000b038, 0x038a0389},
+-	{0x0000b03c, 0x038c038b},
+-	{0x0000b040, 0x0390038d},
+-	{0x0000b044, 0x03920391},
+-	{0x0000b048, 0x03940393},
+-	{0x0000b04c, 0x03960395},
+-	{0x0000b050, 0x00000000},
+-	{0x0000b054, 0x00000000},
+-	{0x0000b058, 0x00000000},
+-	{0x0000b05c, 0x00000000},
+-	{0x0000b060, 0x00000000},
+-	{0x0000b064, 0x00000000},
+-	{0x0000b068, 0x00000000},
+-	{0x0000b06c, 0x00000000},
+-	{0x0000b070, 0x00000000},
+-	{0x0000b074, 0x00000000},
+-	{0x0000b078, 0x00000000},
+-	{0x0000b07c, 0x00000000},
+-	{0x0000b080, 0x2a2d2f32},
+-	{0x0000b084, 0x21232328},
+-	{0x0000b088, 0x19191c1e},
+-	{0x0000b08c, 0x12141417},
+-	{0x0000b090, 0x07070e0e},
+-	{0x0000b094, 0x03030305},
+-	{0x0000b098, 0x00000003},
+-	{0x0000b09c, 0x00000000},
+-	{0x0000b0a0, 0x00000000},
+-	{0x0000b0a4, 0x00000000},
+-	{0x0000b0a8, 0x00000000},
+-	{0x0000b0ac, 0x00000000},
+-	{0x0000b0b0, 0x00000000},
+-	{0x0000b0b4, 0x00000000},
+-	{0x0000b0b8, 0x00000000},
+-	{0x0000b0bc, 0x00000000},
+-	{0x0000b0c0, 0x003f0020},
+-	{0x0000b0c4, 0x00400041},
+-	{0x0000b0c8, 0x0140005f},
+-	{0x0000b0cc, 0x0160015f},
+-	{0x0000b0d0, 0x017e017f},
+-	{0x0000b0d4, 0x02410242},
+-	{0x0000b0d8, 0x025f0240},
+-	{0x0000b0dc, 0x027f0260},
+-	{0x0000b0e0, 0x0341027e},
+-	{0x0000b0e4, 0x035f0340},
+-	{0x0000b0e8, 0x037f0360},
+-	{0x0000b0ec, 0x04400441},
+-	{0x0000b0f0, 0x0460045f},
+-	{0x0000b0f4, 0x0541047f},
+-	{0x0000b0f8, 0x055f0540},
+-	{0x0000b0fc, 0x057f0560},
+-	{0x0000b100, 0x06400641},
+-	{0x0000b104, 0x0660065f},
+-	{0x0000b108, 0x067e067f},
+-	{0x0000b10c, 0x07410742},
+-	{0x0000b110, 0x075f0740},
+-	{0x0000b114, 0x077f0760},
+-	{0x0000b118, 0x07800781},
+-	{0x0000b11c, 0x07a0079f},
+-	{0x0000b120, 0x07c107bf},
+-	{0x0000b124, 0x000007c0},
+-	{0x0000b128, 0x00000000},
+-	{0x0000b12c, 0x00000000},
+-	{0x0000b130, 0x00000000},
+-	{0x0000b134, 0x00000000},
+-	{0x0000b138, 0x00000000},
+-	{0x0000b13c, 0x00000000},
+-	{0x0000b140, 0x003f0020},
+-	{0x0000b144, 0x00400041},
+-	{0x0000b148, 0x0140005f},
+-	{0x0000b14c, 0x0160015f},
+-	{0x0000b150, 0x017e017f},
+-	{0x0000b154, 0x02410242},
+-	{0x0000b158, 0x025f0240},
+-	{0x0000b15c, 0x027f0260},
+-	{0x0000b160, 0x0341027e},
+-	{0x0000b164, 0x035f0340},
+-	{0x0000b168, 0x037f0360},
+-	{0x0000b16c, 0x04400441},
+-	{0x0000b170, 0x0460045f},
+-	{0x0000b174, 0x0541047f},
+-	{0x0000b178, 0x055f0540},
+-	{0x0000b17c, 0x057f0560},
+-	{0x0000b180, 0x06400641},
+-	{0x0000b184, 0x0660065f},
+-	{0x0000b188, 0x067e067f},
+-	{0x0000b18c, 0x07410742},
+-	{0x0000b190, 0x075f0740},
+-	{0x0000b194, 0x077f0760},
+-	{0x0000b198, 0x07800781},
+-	{0x0000b19c, 0x07a0079f},
+-	{0x0000b1a0, 0x07c107bf},
+-	{0x0000b1a4, 0x000007c0},
+-	{0x0000b1a8, 0x00000000},
+-	{0x0000b1ac, 0x00000000},
+-	{0x0000b1b0, 0x00000000},
+-	{0x0000b1b4, 0x00000000},
+-	{0x0000b1b8, 0x00000000},
+-	{0x0000b1bc, 0x00000000},
+-	{0x0000b1c0, 0x00000000},
+-	{0x0000b1c4, 0x00000000},
+-	{0x0000b1c8, 0x00000000},
+-	{0x0000b1cc, 0x00000000},
+-	{0x0000b1d0, 0x00000000},
+-	{0x0000b1d4, 0x00000000},
+-	{0x0000b1d8, 0x00000000},
+-	{0x0000b1dc, 0x00000000},
+-	{0x0000b1e0, 0x00000000},
+-	{0x0000b1e4, 0x00000000},
+-	{0x0000b1e8, 0x00000000},
+-	{0x0000b1ec, 0x00000000},
+-	{0x0000b1f0, 0x00000396},
+-	{0x0000b1f4, 0x00000396},
+-	{0x0000b1f8, 0x00000396},
+-	{0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9480_pcie_phy_clkreq_disable_L1_1p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00018c00, 0x10013e5e},
+-	{0x00018c04, 0x000801d8},
+-	{0x00018c08, 0x0000580c},
+-};
+-
+-static const u32 ar9480_1p0_baseband_core_emulation[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00009800, 0xafa68e30},
+-	{0x00009884, 0x00002842},
+-	{0x00009c04, 0xff55ff55},
+-	{0x00009c08, 0x0320ff55},
+-	{0x00009e50, 0x00000000},
+-	{0x00009fcc, 0x00000014},
+-	{0x0000a344, 0x00000010},
+-	{0x0000a398, 0x00000000},
+-	{0x0000a39c, 0x71733d01},
+-	{0x0000a3a0, 0xd0ad5c12},
+-	{0x0000a3c0, 0x22222220},
+-	{0x0000a3c4, 0x22222222},
+-	{0x0000a404, 0x00418a11},
+-	{0x0000a418, 0x050001ce},
+-	{0x0000a438, 0x00001800},
+-	{0x0000a458, 0x01444452},
+-	{0x0000a644, 0x3fad9d74},
+-	{0x0000a690, 0x00000038},
+-};
+-
+-static const u32 ar9480_1p0_radio_core[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00016000, 0x36db6db6},
+-	{0x00016004, 0x6db6db40},
+-	{0x00016008, 0x73f00000},
+-	{0x0001600c, 0x00000000},
+-	{0x00016010, 0x6d820001},
+-	{0x00016040, 0x7f80fff8},
+-	{0x0001604c, 0x2699e04f},
+-	{0x00016050, 0x6db6db6c},
+-	{0x00016054, 0x6db60000},
+-	{0x00016058, 0x6c200000},
+-	{0x00016080, 0x00040000},
+-	{0x00016084, 0x9a68048c},
+-	{0x00016088, 0x54214514},
+-	{0x0001608c, 0x12030409},
+-	{0x00016090, 0x24926490},
+-	{0x00016098, 0xd2888888},
+-	{0x000160a0, 0x0a108ffe},
+-	{0x000160a4, 0x812fc490},
+-	{0x000160a8, 0x423c8000},
+-	{0x000160b4, 0x92000000},
+-	{0x000160b8, 0x0285dddc},
+-	{0x000160bc, 0x02908888},
+-	{0x000160c0, 0x00adb6d0},
+-	{0x000160c4, 0x6db6db60},
+-	{0x000160c8, 0x6db6db6c},
+-	{0x000160cc, 0x0de6c1b0},
+-	{0x00016100, 0x3fffbe04},
+-	{0x00016104, 0xfff80000},
+-	{0x00016108, 0x00200400},
+-	{0x00016110, 0x00000000},
+-	{0x00016144, 0x02084080},
+-	{0x00016148, 0x000080c0},
+-	{0x00016280, 0x050a0001},
+-	{0x00016284, 0x3d841400},
+-	{0x00016288, 0x00000000},
+-	{0x0001628c, 0xe3000000},
+-	{0x00016290, 0xa1005080},
+-	{0x00016294, 0x00000020},
+-	{0x00016298, 0x50a02900},
+-	{0x00016340, 0x121e4276},
+-	{0x00016344, 0x00300000},
+-	{0x00016400, 0x36db6db6},
+-	{0x00016404, 0x6db6db40},
+-	{0x00016408, 0x73f00000},
+-	{0x0001640c, 0x00000000},
+-	{0x00016410, 0x6c800001},
+-	{0x00016440, 0x7f80fff8},
+-	{0x0001644c, 0x4699e04f},
+-	{0x00016450, 0x6db6db6c},
+-	{0x00016454, 0x6db60000},
+-	{0x00016500, 0x3fffbe04},
+-	{0x00016504, 0xfff80000},
+-	{0x00016508, 0x00200400},
+-	{0x00016510, 0x00000000},
+-	{0x00016544, 0x02084080},
+-	{0x00016548, 0x000080c0},
+-};
+-
+-static const u32 ar9480_1p0_soc_preamble[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00007020, 0x00000000},
+-	{0x00007034, 0x00000002},
+-	{0x00007038, 0x000004c2},
+-};
+-
+-static const u32 ar9480_1p0_sys2ant[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00063120, 0x00801980},
+-};
+-
+-#endif /* INITVALS_9480_1P0_H */
+--- a/drivers/net/wireless/ath/ath9k/ar9480_2p0_initvals.h
++++ /dev/null
+@@ -1,1928 +0,0 @@
+-/*
+- * Copyright (c) 2010 Atheros Communications Inc.
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
 -
- void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
- {
- 	struct ath_hw_ops *ops = ath9k_hw_ops(hw);
-@@ -472,15 +402,8 @@ void ar9003_hw_attach_mac_ops(struct ath
- 	ops->rx_enable = ar9003_hw_rx_enable;
- 	ops->set_desc_link = ar9003_hw_set_desc_link;
- 	ops->get_isr = ar9003_hw_get_isr;
--	ops->fill_txdesc = ar9003_hw_fill_txdesc;
-+	ops->set_txdesc = ar9003_set_txdesc;
- 	ops->proc_txdesc = ar9003_hw_proc_txdesc;
--	ops->set11n_txdesc = ar9003_hw_set11n_txdesc;
--	ops->set11n_ratescenario = ar9003_hw_set11n_ratescenario;
--	ops->set11n_aggr_first = ar9003_hw_set11n_aggr_first;
--	ops->set11n_aggr_middle = ar9003_hw_set11n_aggr_middle;
--	ops->set11n_aggr_last = ar9003_hw_set11n_aggr_last;
--	ops->clr11n_aggr = ar9003_hw_clr11n_aggr;
--	ops->set_clrdmask = ar9003_hw_set_clrdmask;
- }
- 
- void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
+-#ifndef INITVALS_9480_2P0_H
+-#define INITVALS_9480_2P0_H
+-
+-/* AR9480 2.0 */
+-
+-static const u32 ar9480_modes_fast_clock_2p0[][3] = {
+-	/* Addr      5G_HT20     5G_HT40   */
+-	{0x00001030, 0x00000268, 0x000004d0},
+-	{0x00001070, 0x0000018c, 0x00000318},
+-	{0x000010b0, 0x00000fd0, 0x00001fa0},
+-	{0x00008014, 0x044c044c, 0x08980898},
+-	{0x0000801c, 0x148ec02b, 0x148ec057},
+-	{0x00008318, 0x000044c0, 0x00008980},
+-	{0x00009e00, 0x0372131c, 0x0372131c},
+-	{0x0000a230, 0x0000400b, 0x00004016},
+-	{0x0000a254, 0x00000898, 0x00001130},
+-};
+-
+-static const u32 ar9480_pciephy_clkreq_enable_L1_2p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00018c00, 0x18253ede},
+-	{0x00018c04, 0x000801d8},
+-	{0x00018c08, 0x0003580c},
+-};
+-
+-static const u32 ar9480_2p0_baseband_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
+-	{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
+-	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
+-	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
+-	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
+-	{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
+-	{0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
+-	{0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
+-	{0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
+-	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
+-	{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
+-	{0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3039605e, 0x33795d5e},
+-	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
+-	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
+-	{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
+-	{0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
+-	{0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
+-	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
+-	{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
+-	{0x0000a204, 0x013187c0, 0x013187c4, 0x013187c4, 0x013187c0},
+-	{0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
+-	{0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
+-	{0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
+-	{0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
+-	{0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
+-	{0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
+-	{0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
+-	{0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
+-	{0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
+-	{0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
+-	{0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
+-	{0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
+-	{0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
+-	{0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
+-	{0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
+-	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+-	{0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
+-	{0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
+-	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+-	{0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
+-	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
+-	{0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
+-	{0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
+-};
+-
+-static const u32 ar9480_2p0_mac_core_emulation[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00000030, 0x000e0085},
+-	{0x00000044, 0x00000008},
+-	{0x0000805c, 0xffffc7ff},
+-	{0x00008344, 0xaa4a105b},
+-};
+-
+-static const u32 ar9480_common_rx_gain_table_2p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x00010000},
+-	{0x0000a004, 0x00030002},
+-	{0x0000a008, 0x00050004},
+-	{0x0000a00c, 0x00810080},
+-	{0x0000a010, 0x00830082},
+-	{0x0000a014, 0x01810180},
+-	{0x0000a018, 0x01830182},
+-	{0x0000a01c, 0x01850184},
+-	{0x0000a020, 0x01890188},
+-	{0x0000a024, 0x018b018a},
+-	{0x0000a028, 0x018d018c},
+-	{0x0000a02c, 0x01910190},
+-	{0x0000a030, 0x01930192},
+-	{0x0000a034, 0x01950194},
+-	{0x0000a038, 0x038a0196},
+-	{0x0000a03c, 0x038c038b},
+-	{0x0000a040, 0x0390038d},
+-	{0x0000a044, 0x03920391},
+-	{0x0000a048, 0x03940393},
+-	{0x0000a04c, 0x03960395},
+-	{0x0000a050, 0x00000000},
+-	{0x0000a054, 0x00000000},
+-	{0x0000a058, 0x00000000},
+-	{0x0000a05c, 0x00000000},
+-	{0x0000a060, 0x00000000},
+-	{0x0000a064, 0x00000000},
+-	{0x0000a068, 0x00000000},
+-	{0x0000a06c, 0x00000000},
+-	{0x0000a070, 0x00000000},
+-	{0x0000a074, 0x00000000},
+-	{0x0000a078, 0x00000000},
+-	{0x0000a07c, 0x00000000},
+-	{0x0000a080, 0x22222229},
+-	{0x0000a084, 0x1d1d1d1d},
+-	{0x0000a088, 0x1d1d1d1d},
+-	{0x0000a08c, 0x1d1d1d1d},
+-	{0x0000a090, 0x171d1d1d},
+-	{0x0000a094, 0x11111717},
+-	{0x0000a098, 0x00030311},
+-	{0x0000a09c, 0x00000000},
+-	{0x0000a0a0, 0x00000000},
+-	{0x0000a0a4, 0x00000000},
+-	{0x0000a0a8, 0x00000000},
+-	{0x0000a0ac, 0x00000000},
+-	{0x0000a0b0, 0x00000000},
+-	{0x0000a0b4, 0x00000000},
+-	{0x0000a0b8, 0x00000000},
+-	{0x0000a0bc, 0x00000000},
+-	{0x0000a0c0, 0x001f0000},
+-	{0x0000a0c4, 0x01000101},
+-	{0x0000a0c8, 0x011e011f},
+-	{0x0000a0cc, 0x011c011d},
+-	{0x0000a0d0, 0x02030204},
+-	{0x0000a0d4, 0x02010202},
+-	{0x0000a0d8, 0x021f0200},
+-	{0x0000a0dc, 0x0302021e},
+-	{0x0000a0e0, 0x03000301},
+-	{0x0000a0e4, 0x031e031f},
+-	{0x0000a0e8, 0x0402031d},
+-	{0x0000a0ec, 0x04000401},
+-	{0x0000a0f0, 0x041e041f},
+-	{0x0000a0f4, 0x0502041d},
+-	{0x0000a0f8, 0x05000501},
+-	{0x0000a0fc, 0x051e051f},
+-	{0x0000a100, 0x06010602},
+-	{0x0000a104, 0x061f0600},
+-	{0x0000a108, 0x061d061e},
+-	{0x0000a10c, 0x07020703},
+-	{0x0000a110, 0x07000701},
+-	{0x0000a114, 0x00000000},
+-	{0x0000a118, 0x00000000},
+-	{0x0000a11c, 0x00000000},
+-	{0x0000a120, 0x00000000},
+-	{0x0000a124, 0x00000000},
+-	{0x0000a128, 0x00000000},
+-	{0x0000a12c, 0x00000000},
+-	{0x0000a130, 0x00000000},
+-	{0x0000a134, 0x00000000},
+-	{0x0000a138, 0x00000000},
+-	{0x0000a13c, 0x00000000},
+-	{0x0000a140, 0x001f0000},
+-	{0x0000a144, 0x01000101},
+-	{0x0000a148, 0x011e011f},
+-	{0x0000a14c, 0x011c011d},
+-	{0x0000a150, 0x02030204},
+-	{0x0000a154, 0x02010202},
+-	{0x0000a158, 0x021f0200},
+-	{0x0000a15c, 0x0302021e},
+-	{0x0000a160, 0x03000301},
+-	{0x0000a164, 0x031e031f},
+-	{0x0000a168, 0x0402031d},
+-	{0x0000a16c, 0x04000401},
+-	{0x0000a170, 0x041e041f},
+-	{0x0000a174, 0x0502041d},
+-	{0x0000a178, 0x05000501},
+-	{0x0000a17c, 0x051e051f},
+-	{0x0000a180, 0x06010602},
+-	{0x0000a184, 0x061f0600},
+-	{0x0000a188, 0x061d061e},
+-	{0x0000a18c, 0x07020703},
+-	{0x0000a190, 0x07000701},
+-	{0x0000a194, 0x00000000},
+-	{0x0000a198, 0x00000000},
+-	{0x0000a19c, 0x00000000},
+-	{0x0000a1a0, 0x00000000},
+-	{0x0000a1a4, 0x00000000},
+-	{0x0000a1a8, 0x00000000},
+-	{0x0000a1ac, 0x00000000},
+-	{0x0000a1b0, 0x00000000},
+-	{0x0000a1b4, 0x00000000},
+-	{0x0000a1b8, 0x00000000},
+-	{0x0000a1bc, 0x00000000},
+-	{0x0000a1c0, 0x00000000},
+-	{0x0000a1c4, 0x00000000},
+-	{0x0000a1c8, 0x00000000},
+-	{0x0000a1cc, 0x00000000},
+-	{0x0000a1d0, 0x00000000},
+-	{0x0000a1d4, 0x00000000},
+-	{0x0000a1d8, 0x00000000},
+-	{0x0000a1dc, 0x00000000},
+-	{0x0000a1e0, 0x00000000},
+-	{0x0000a1e4, 0x00000000},
+-	{0x0000a1e8, 0x00000000},
+-	{0x0000a1ec, 0x00000000},
+-	{0x0000a1f0, 0x00000396},
+-	{0x0000a1f4, 0x00000396},
+-	{0x0000a1f8, 0x00000396},
+-	{0x0000a1fc, 0x00000196},
+-	{0x0000b000, 0x00010000},
+-	{0x0000b004, 0x00030002},
+-	{0x0000b008, 0x00050004},
+-	{0x0000b00c, 0x00810080},
+-	{0x0000b010, 0x00830082},
+-	{0x0000b014, 0x01810180},
+-	{0x0000b018, 0x01830182},
+-	{0x0000b01c, 0x01850184},
+-	{0x0000b020, 0x02810280},
+-	{0x0000b024, 0x02830282},
+-	{0x0000b028, 0x02850284},
+-	{0x0000b02c, 0x02890288},
+-	{0x0000b030, 0x028b028a},
+-	{0x0000b034, 0x0388028c},
+-	{0x0000b038, 0x038a0389},
+-	{0x0000b03c, 0x038c038b},
+-	{0x0000b040, 0x0390038d},
+-	{0x0000b044, 0x03920391},
+-	{0x0000b048, 0x03940393},
+-	{0x0000b04c, 0x03960395},
+-	{0x0000b050, 0x00000000},
+-	{0x0000b054, 0x00000000},
+-	{0x0000b058, 0x00000000},
+-	{0x0000b05c, 0x00000000},
+-	{0x0000b060, 0x00000000},
+-	{0x0000b064, 0x00000000},
+-	{0x0000b068, 0x00000000},
+-	{0x0000b06c, 0x00000000},
+-	{0x0000b070, 0x00000000},
+-	{0x0000b074, 0x00000000},
+-	{0x0000b078, 0x00000000},
+-	{0x0000b07c, 0x00000000},
+-	{0x0000b080, 0x2a2d2f32},
+-	{0x0000b084, 0x21232328},
+-	{0x0000b088, 0x19191c1e},
+-	{0x0000b08c, 0x12141417},
+-	{0x0000b090, 0x07070e0e},
+-	{0x0000b094, 0x03030305},
+-	{0x0000b098, 0x00000003},
+-	{0x0000b09c, 0x00000000},
+-	{0x0000b0a0, 0x00000000},
+-	{0x0000b0a4, 0x00000000},
+-	{0x0000b0a8, 0x00000000},
+-	{0x0000b0ac, 0x00000000},
+-	{0x0000b0b0, 0x00000000},
+-	{0x0000b0b4, 0x00000000},
+-	{0x0000b0b8, 0x00000000},
+-	{0x0000b0bc, 0x00000000},
+-	{0x0000b0c0, 0x003f0020},
+-	{0x0000b0c4, 0x00400041},
+-	{0x0000b0c8, 0x0140005f},
+-	{0x0000b0cc, 0x0160015f},
+-	{0x0000b0d0, 0x017e017f},
+-	{0x0000b0d4, 0x02410242},
+-	{0x0000b0d8, 0x025f0240},
+-	{0x0000b0dc, 0x027f0260},
+-	{0x0000b0e0, 0x0341027e},
+-	{0x0000b0e4, 0x035f0340},
+-	{0x0000b0e8, 0x037f0360},
+-	{0x0000b0ec, 0x04400441},
+-	{0x0000b0f0, 0x0460045f},
+-	{0x0000b0f4, 0x0541047f},
+-	{0x0000b0f8, 0x055f0540},
+-	{0x0000b0fc, 0x057f0560},
+-	{0x0000b100, 0x06400641},
+-	{0x0000b104, 0x0660065f},
+-	{0x0000b108, 0x067e067f},
+-	{0x0000b10c, 0x07410742},
+-	{0x0000b110, 0x075f0740},
+-	{0x0000b114, 0x077f0760},
+-	{0x0000b118, 0x07800781},
+-	{0x0000b11c, 0x07a0079f},
+-	{0x0000b120, 0x07c107bf},
+-	{0x0000b124, 0x000007c0},
+-	{0x0000b128, 0x00000000},
+-	{0x0000b12c, 0x00000000},
+-	{0x0000b130, 0x00000000},
+-	{0x0000b134, 0x00000000},
+-	{0x0000b138, 0x00000000},
+-	{0x0000b13c, 0x00000000},
+-	{0x0000b140, 0x003f0020},
+-	{0x0000b144, 0x00400041},
+-	{0x0000b148, 0x0140005f},
+-	{0x0000b14c, 0x0160015f},
+-	{0x0000b150, 0x017e017f},
+-	{0x0000b154, 0x02410242},
+-	{0x0000b158, 0x025f0240},
+-	{0x0000b15c, 0x027f0260},
+-	{0x0000b160, 0x0341027e},
+-	{0x0000b164, 0x035f0340},
+-	{0x0000b168, 0x037f0360},
+-	{0x0000b16c, 0x04400441},
+-	{0x0000b170, 0x0460045f},
+-	{0x0000b174, 0x0541047f},
+-	{0x0000b178, 0x055f0540},
+-	{0x0000b17c, 0x057f0560},
+-	{0x0000b180, 0x06400641},
+-	{0x0000b184, 0x0660065f},
+-	{0x0000b188, 0x067e067f},
+-	{0x0000b18c, 0x07410742},
+-	{0x0000b190, 0x075f0740},
+-	{0x0000b194, 0x077f0760},
+-	{0x0000b198, 0x07800781},
+-	{0x0000b19c, 0x07a0079f},
+-	{0x0000b1a0, 0x07c107bf},
+-	{0x0000b1a4, 0x000007c0},
+-	{0x0000b1a8, 0x00000000},
+-	{0x0000b1ac, 0x00000000},
+-	{0x0000b1b0, 0x00000000},
+-	{0x0000b1b4, 0x00000000},
+-	{0x0000b1b8, 0x00000000},
+-	{0x0000b1bc, 0x00000000},
+-	{0x0000b1c0, 0x00000000},
+-	{0x0000b1c4, 0x00000000},
+-	{0x0000b1c8, 0x00000000},
+-	{0x0000b1cc, 0x00000000},
+-	{0x0000b1d0, 0x00000000},
+-	{0x0000b1d4, 0x00000000},
+-	{0x0000b1d8, 0x00000000},
+-	{0x0000b1dc, 0x00000000},
+-	{0x0000b1e0, 0x00000000},
+-	{0x0000b1e4, 0x00000000},
+-	{0x0000b1e8, 0x00000000},
+-	{0x0000b1ec, 0x00000000},
+-	{0x0000b1f0, 0x00000396},
+-	{0x0000b1f4, 0x00000396},
+-	{0x0000b1f8, 0x00000396},
+-	{0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9480_pciephy_clkreq_disable_L1_2p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00018c00, 0x18213ede},
+-	{0x00018c04, 0x000801d8},
+-	{0x00018c08, 0x0003580c},
+-};
+-
+-static const u32 ar9480_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00018c00, 0x18212ede},
+-	{0x00018c04, 0x000801d8},
+-	{0x00018c08, 0x0003580c},
+-};
+-
+-static const u32 ar9480_2p0_sys3ant[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00063280, 0x00040807},
+-	{0x00063284, 0x104ccccc},
+-};
+-
+-static const u32 ar9480_common_rx_gain_table_ar9280_2p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x02000101},
+-	{0x0000a004, 0x02000102},
+-	{0x0000a008, 0x02000103},
+-	{0x0000a00c, 0x02000104},
+-	{0x0000a010, 0x02000200},
+-	{0x0000a014, 0x02000201},
+-	{0x0000a018, 0x02000202},
+-	{0x0000a01c, 0x02000203},
+-	{0x0000a020, 0x02000204},
+-	{0x0000a024, 0x02000205},
+-	{0x0000a028, 0x02000208},
+-	{0x0000a02c, 0x02000302},
+-	{0x0000a030, 0x02000303},
+-	{0x0000a034, 0x02000304},
+-	{0x0000a038, 0x02000400},
+-	{0x0000a03c, 0x02010300},
+-	{0x0000a040, 0x02010301},
+-	{0x0000a044, 0x02010302},
+-	{0x0000a048, 0x02000500},
+-	{0x0000a04c, 0x02010400},
+-	{0x0000a050, 0x02020300},
+-	{0x0000a054, 0x02020301},
+-	{0x0000a058, 0x02020302},
+-	{0x0000a05c, 0x02020303},
+-	{0x0000a060, 0x02020400},
+-	{0x0000a064, 0x02030300},
+-	{0x0000a068, 0x02030301},
+-	{0x0000a06c, 0x02030302},
+-	{0x0000a070, 0x02030303},
+-	{0x0000a074, 0x02030400},
+-	{0x0000a078, 0x02040300},
+-	{0x0000a07c, 0x02040301},
+-	{0x0000a080, 0x02040302},
+-	{0x0000a084, 0x02040303},
+-	{0x0000a088, 0x02030500},
+-	{0x0000a08c, 0x02040400},
+-	{0x0000a090, 0x02050203},
+-	{0x0000a094, 0x02050204},
+-	{0x0000a098, 0x02050205},
+-	{0x0000a09c, 0x02040500},
+-	{0x0000a0a0, 0x02050301},
+-	{0x0000a0a4, 0x02050302},
+-	{0x0000a0a8, 0x02050303},
+-	{0x0000a0ac, 0x02050400},
+-	{0x0000a0b0, 0x02050401},
+-	{0x0000a0b4, 0x02050402},
+-	{0x0000a0b8, 0x02050403},
+-	{0x0000a0bc, 0x02050500},
+-	{0x0000a0c0, 0x02050501},
+-	{0x0000a0c4, 0x02050502},
+-	{0x0000a0c8, 0x02050503},
+-	{0x0000a0cc, 0x02050504},
+-	{0x0000a0d0, 0x02050600},
+-	{0x0000a0d4, 0x02050601},
+-	{0x0000a0d8, 0x02050602},
+-	{0x0000a0dc, 0x02050603},
+-	{0x0000a0e0, 0x02050604},
+-	{0x0000a0e4, 0x02050700},
+-	{0x0000a0e8, 0x02050701},
+-	{0x0000a0ec, 0x02050702},
+-	{0x0000a0f0, 0x02050703},
+-	{0x0000a0f4, 0x02050704},
+-	{0x0000a0f8, 0x02050705},
+-	{0x0000a0fc, 0x02050708},
+-	{0x0000a100, 0x02050709},
+-	{0x0000a104, 0x0205070a},
+-	{0x0000a108, 0x0205070b},
+-	{0x0000a10c, 0x0205070c},
+-	{0x0000a110, 0x0205070d},
+-	{0x0000a114, 0x02050710},
+-	{0x0000a118, 0x02050711},
+-	{0x0000a11c, 0x02050712},
+-	{0x0000a120, 0x02050713},
+-	{0x0000a124, 0x02050714},
+-	{0x0000a128, 0x02050715},
+-	{0x0000a12c, 0x02050730},
+-	{0x0000a130, 0x02050731},
+-	{0x0000a134, 0x02050732},
+-	{0x0000a138, 0x02050733},
+-	{0x0000a13c, 0x02050734},
+-	{0x0000a140, 0x02050735},
+-	{0x0000a144, 0x02050750},
+-	{0x0000a148, 0x02050751},
+-	{0x0000a14c, 0x02050752},
+-	{0x0000a150, 0x02050753},
+-	{0x0000a154, 0x02050754},
+-	{0x0000a158, 0x02050755},
+-	{0x0000a15c, 0x02050770},
+-	{0x0000a160, 0x02050771},
+-	{0x0000a164, 0x02050772},
+-	{0x0000a168, 0x02050773},
+-	{0x0000a16c, 0x02050774},
+-	{0x0000a170, 0x02050775},
+-	{0x0000a174, 0x00000776},
+-	{0x0000a178, 0x00000776},
+-	{0x0000a17c, 0x00000776},
+-	{0x0000a180, 0x00000776},
+-	{0x0000a184, 0x00000776},
+-	{0x0000a188, 0x00000776},
+-	{0x0000a18c, 0x00000776},
+-	{0x0000a190, 0x00000776},
+-	{0x0000a194, 0x00000776},
+-	{0x0000a198, 0x00000776},
+-	{0x0000a19c, 0x00000776},
+-	{0x0000a1a0, 0x00000776},
+-	{0x0000a1a4, 0x00000776},
+-	{0x0000a1a8, 0x00000776},
+-	{0x0000a1ac, 0x00000776},
+-	{0x0000a1b0, 0x00000776},
+-	{0x0000a1b4, 0x00000776},
+-	{0x0000a1b8, 0x00000776},
+-	{0x0000a1bc, 0x00000776},
+-	{0x0000a1c0, 0x00000776},
+-	{0x0000a1c4, 0x00000776},
+-	{0x0000a1c8, 0x00000776},
+-	{0x0000a1cc, 0x00000776},
+-	{0x0000a1d0, 0x00000776},
+-	{0x0000a1d4, 0x00000776},
+-	{0x0000a1d8, 0x00000776},
+-	{0x0000a1dc, 0x00000776},
+-	{0x0000a1e0, 0x00000776},
+-	{0x0000a1e4, 0x00000776},
+-	{0x0000a1e8, 0x00000776},
+-	{0x0000a1ec, 0x00000776},
+-	{0x0000a1f0, 0x00000776},
+-	{0x0000a1f4, 0x00000776},
+-	{0x0000a1f8, 0x00000776},
+-	{0x0000a1fc, 0x00000776},
+-	{0x0000b000, 0x02000101},
+-	{0x0000b004, 0x02000102},
+-	{0x0000b008, 0x02000103},
+-	{0x0000b00c, 0x02000104},
+-	{0x0000b010, 0x02000200},
+-	{0x0000b014, 0x02000201},
+-	{0x0000b018, 0x02000202},
+-	{0x0000b01c, 0x02000203},
+-	{0x0000b020, 0x02000204},
+-	{0x0000b024, 0x02000205},
+-	{0x0000b028, 0x02000208},
+-	{0x0000b02c, 0x02000302},
+-	{0x0000b030, 0x02000303},
+-	{0x0000b034, 0x02000304},
+-	{0x0000b038, 0x02000400},
+-	{0x0000b03c, 0x02010300},
+-	{0x0000b040, 0x02010301},
+-	{0x0000b044, 0x02010302},
+-	{0x0000b048, 0x02000500},
+-	{0x0000b04c, 0x02010400},
+-	{0x0000b050, 0x02020300},
+-	{0x0000b054, 0x02020301},
+-	{0x0000b058, 0x02020302},
+-	{0x0000b05c, 0x02020303},
+-	{0x0000b060, 0x02020400},
+-	{0x0000b064, 0x02030300},
+-	{0x0000b068, 0x02030301},
+-	{0x0000b06c, 0x02030302},
+-	{0x0000b070, 0x02030303},
+-	{0x0000b074, 0x02030400},
+-	{0x0000b078, 0x02040300},
+-	{0x0000b07c, 0x02040301},
+-	{0x0000b080, 0x02040302},
+-	{0x0000b084, 0x02040303},
+-	{0x0000b088, 0x02030500},
+-	{0x0000b08c, 0x02040400},
+-	{0x0000b090, 0x02050203},
+-	{0x0000b094, 0x02050204},
+-	{0x0000b098, 0x02050205},
+-	{0x0000b09c, 0x02040500},
+-	{0x0000b0a0, 0x02050301},
+-	{0x0000b0a4, 0x02050302},
+-	{0x0000b0a8, 0x02050303},
+-	{0x0000b0ac, 0x02050400},
+-	{0x0000b0b0, 0x02050401},
+-	{0x0000b0b4, 0x02050402},
+-	{0x0000b0b8, 0x02050403},
+-	{0x0000b0bc, 0x02050500},
+-	{0x0000b0c0, 0x02050501},
+-	{0x0000b0c4, 0x02050502},
+-	{0x0000b0c8, 0x02050503},
+-	{0x0000b0cc, 0x02050504},
+-	{0x0000b0d0, 0x02050600},
+-	{0x0000b0d4, 0x02050601},
+-	{0x0000b0d8, 0x02050602},
+-	{0x0000b0dc, 0x02050603},
+-	{0x0000b0e0, 0x02050604},
+-	{0x0000b0e4, 0x02050700},
+-	{0x0000b0e8, 0x02050701},
+-	{0x0000b0ec, 0x02050702},
+-	{0x0000b0f0, 0x02050703},
+-	{0x0000b0f4, 0x02050704},
+-	{0x0000b0f8, 0x02050705},
+-	{0x0000b0fc, 0x02050708},
+-	{0x0000b100, 0x02050709},
+-	{0x0000b104, 0x0205070a},
+-	{0x0000b108, 0x0205070b},
+-	{0x0000b10c, 0x0205070c},
+-	{0x0000b110, 0x0205070d},
+-	{0x0000b114, 0x02050710},
+-	{0x0000b118, 0x02050711},
+-	{0x0000b11c, 0x02050712},
+-	{0x0000b120, 0x02050713},
+-	{0x0000b124, 0x02050714},
+-	{0x0000b128, 0x02050715},
+-	{0x0000b12c, 0x02050730},
+-	{0x0000b130, 0x02050731},
+-	{0x0000b134, 0x02050732},
+-	{0x0000b138, 0x02050733},
+-	{0x0000b13c, 0x02050734},
+-	{0x0000b140, 0x02050735},
+-	{0x0000b144, 0x02050750},
+-	{0x0000b148, 0x02050751},
+-	{0x0000b14c, 0x02050752},
+-	{0x0000b150, 0x02050753},
+-	{0x0000b154, 0x02050754},
+-	{0x0000b158, 0x02050755},
+-	{0x0000b15c, 0x02050770},
+-	{0x0000b160, 0x02050771},
+-	{0x0000b164, 0x02050772},
+-	{0x0000b168, 0x02050773},
+-	{0x0000b16c, 0x02050774},
+-	{0x0000b170, 0x02050775},
+-	{0x0000b174, 0x00000776},
+-	{0x0000b178, 0x00000776},
+-	{0x0000b17c, 0x00000776},
+-	{0x0000b180, 0x00000776},
+-	{0x0000b184, 0x00000776},
+-	{0x0000b188, 0x00000776},
+-	{0x0000b18c, 0x00000776},
+-	{0x0000b190, 0x00000776},
+-	{0x0000b194, 0x00000776},
+-	{0x0000b198, 0x00000776},
+-	{0x0000b19c, 0x00000776},
+-	{0x0000b1a0, 0x00000776},
+-	{0x0000b1a4, 0x00000776},
+-	{0x0000b1a8, 0x00000776},
+-	{0x0000b1ac, 0x00000776},
+-	{0x0000b1b0, 0x00000776},
+-	{0x0000b1b4, 0x00000776},
+-	{0x0000b1b8, 0x00000776},
+-	{0x0000b1bc, 0x00000776},
+-	{0x0000b1c0, 0x00000776},
+-	{0x0000b1c4, 0x00000776},
+-	{0x0000b1c8, 0x00000776},
+-	{0x0000b1cc, 0x00000776},
+-	{0x0000b1d0, 0x00000776},
+-	{0x0000b1d4, 0x00000776},
+-	{0x0000b1d8, 0x00000776},
+-	{0x0000b1dc, 0x00000776},
+-	{0x0000b1e0, 0x00000776},
+-	{0x0000b1e4, 0x00000776},
+-	{0x0000b1e8, 0x00000776},
+-	{0x0000b1ec, 0x00000776},
+-	{0x0000b1f0, 0x00000776},
+-	{0x0000b1f4, 0x00000776},
+-	{0x0000b1f8, 0x00000776},
+-	{0x0000b1fc, 0x00000776},
+-};
+-
+-static const u32 ar9200_ar9280_2p0_radio_core[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00007800, 0x00040000},
+-	{0x00007804, 0xdb005012},
+-	{0x00007808, 0x04924914},
+-	{0x0000780c, 0x21084210},
+-	{0x00007810, 0x6d801300},
+-	{0x00007814, 0x0019beff},
+-	{0x00007818, 0x07e41000},
+-	{0x0000781c, 0x00392000},
+-	{0x00007820, 0x92592480},
+-	{0x00007824, 0x00040000},
+-	{0x00007828, 0xdb005012},
+-	{0x0000782c, 0x04924914},
+-	{0x00007830, 0x21084210},
+-	{0x00007834, 0x6d801300},
+-	{0x00007838, 0x0019beff},
+-	{0x0000783c, 0x07e40000},
+-	{0x00007840, 0x00392000},
+-	{0x00007844, 0x92592480},
+-	{0x00007848, 0x00100000},
+-	{0x0000784c, 0x773f0567},
+-	{0x00007850, 0x54214514},
+-	{0x00007854, 0x12035828},
+-	{0x00007858, 0x92592692},
+-	{0x0000785c, 0x00000000},
+-	{0x00007860, 0x56400000},
+-	{0x00007864, 0x0a8e370e},
+-	{0x00007868, 0xc0102850},
+-	{0x0000786c, 0x812d4000},
+-	{0x00007870, 0x807ec400},
+-	{0x00007874, 0x001b6db0},
+-	{0x00007878, 0x00376b63},
+-	{0x0000787c, 0x06db6db6},
+-	{0x00007880, 0x006d8000},
+-	{0x00007884, 0xffeffffe},
+-	{0x00007888, 0xffeffffe},
+-	{0x0000788c, 0x00010000},
+-	{0x00007890, 0x02060aeb},
+-	{0x00007894, 0x5a108000},
+-};
+-
+-static const u32 ar9480_2p0_mac_postamble_emulation[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
+-	{0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
+-};
+-
+-static const u32 ar9480_2p0_radio_postamble_sys3ant[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
+-	{0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
+-	{0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
+-};
+-
+-static const u32 ar9480_2p0_baseband_postamble_emulation[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
+-	{0x00009e44, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000},
+-	{0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
+-	{0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
+-	{0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
+-	{0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
+-	{0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
+-	{0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
+-	{0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
+-	{0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
+-	{0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
+-	{0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
+-	{0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
+-	{0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
+-	{0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
+-	{0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
+-	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-};
+-
+-static const u32 ar9480_2p0_radio_postamble_sys2ant[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
+-	{0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
+-	{0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
+-};
+-
+-static const u32 ar9480_common_wo_xlna_rx_gain_table_2p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x00010000},
+-	{0x0000a004, 0x00030002},
+-	{0x0000a008, 0x00050004},
+-	{0x0000a00c, 0x00810080},
+-	{0x0000a010, 0x00830082},
+-	{0x0000a014, 0x01810180},
+-	{0x0000a018, 0x01830182},
+-	{0x0000a01c, 0x01850184},
+-	{0x0000a020, 0x01890188},
+-	{0x0000a024, 0x018b018a},
+-	{0x0000a028, 0x018d018c},
+-	{0x0000a02c, 0x03820190},
+-	{0x0000a030, 0x03840383},
+-	{0x0000a034, 0x03880385},
+-	{0x0000a038, 0x038a0389},
+-	{0x0000a03c, 0x038c038b},
+-	{0x0000a040, 0x0390038d},
+-	{0x0000a044, 0x03920391},
+-	{0x0000a048, 0x03940393},
+-	{0x0000a04c, 0x03960395},
+-	{0x0000a050, 0x00000000},
+-	{0x0000a054, 0x00000000},
+-	{0x0000a058, 0x00000000},
+-	{0x0000a05c, 0x00000000},
+-	{0x0000a060, 0x00000000},
+-	{0x0000a064, 0x00000000},
+-	{0x0000a068, 0x00000000},
+-	{0x0000a06c, 0x00000000},
+-	{0x0000a070, 0x00000000},
+-	{0x0000a074, 0x00000000},
+-	{0x0000a078, 0x00000000},
+-	{0x0000a07c, 0x00000000},
+-	{0x0000a080, 0x29292929},
+-	{0x0000a084, 0x29292929},
+-	{0x0000a088, 0x29292929},
+-	{0x0000a08c, 0x29292929},
+-	{0x0000a090, 0x22292929},
+-	{0x0000a094, 0x1d1d2222},
+-	{0x0000a098, 0x0c111117},
+-	{0x0000a09c, 0x00030303},
+-	{0x0000a0a0, 0x00000000},
+-	{0x0000a0a4, 0x00000000},
+-	{0x0000a0a8, 0x00000000},
+-	{0x0000a0ac, 0x00000000},
+-	{0x0000a0b0, 0x00000000},
+-	{0x0000a0b4, 0x00000000},
+-	{0x0000a0b8, 0x00000000},
+-	{0x0000a0bc, 0x00000000},
+-	{0x0000a0c0, 0x001f0000},
+-	{0x0000a0c4, 0x01000101},
+-	{0x0000a0c8, 0x011e011f},
+-	{0x0000a0cc, 0x011c011d},
+-	{0x0000a0d0, 0x02030204},
+-	{0x0000a0d4, 0x02010202},
+-	{0x0000a0d8, 0x021f0200},
+-	{0x0000a0dc, 0x0302021e},
+-	{0x0000a0e0, 0x03000301},
+-	{0x0000a0e4, 0x031e031f},
+-	{0x0000a0e8, 0x0402031d},
+-	{0x0000a0ec, 0x04000401},
+-	{0x0000a0f0, 0x041e041f},
+-	{0x0000a0f4, 0x0502041d},
+-	{0x0000a0f8, 0x05000501},
+-	{0x0000a0fc, 0x051e051f},
+-	{0x0000a100, 0x06010602},
+-	{0x0000a104, 0x061f0600},
+-	{0x0000a108, 0x061d061e},
+-	{0x0000a10c, 0x07020703},
+-	{0x0000a110, 0x07000701},
+-	{0x0000a114, 0x00000000},
+-	{0x0000a118, 0x00000000},
+-	{0x0000a11c, 0x00000000},
+-	{0x0000a120, 0x00000000},
+-	{0x0000a124, 0x00000000},
+-	{0x0000a128, 0x00000000},
+-	{0x0000a12c, 0x00000000},
+-	{0x0000a130, 0x00000000},
+-	{0x0000a134, 0x00000000},
+-	{0x0000a138, 0x00000000},
+-	{0x0000a13c, 0x00000000},
+-	{0x0000a140, 0x001f0000},
+-	{0x0000a144, 0x01000101},
+-	{0x0000a148, 0x011e011f},
+-	{0x0000a14c, 0x011c011d},
+-	{0x0000a150, 0x02030204},
+-	{0x0000a154, 0x02010202},
+-	{0x0000a158, 0x021f0200},
+-	{0x0000a15c, 0x0302021e},
+-	{0x0000a160, 0x03000301},
+-	{0x0000a164, 0x031e031f},
+-	{0x0000a168, 0x0402031d},
+-	{0x0000a16c, 0x04000401},
+-	{0x0000a170, 0x041e041f},
+-	{0x0000a174, 0x0502041d},
+-	{0x0000a178, 0x05000501},
+-	{0x0000a17c, 0x051e051f},
+-	{0x0000a180, 0x06010602},
+-	{0x0000a184, 0x061f0600},
+-	{0x0000a188, 0x061d061e},
+-	{0x0000a18c, 0x07020703},
+-	{0x0000a190, 0x07000701},
+-	{0x0000a194, 0x00000000},
+-	{0x0000a198, 0x00000000},
+-	{0x0000a19c, 0x00000000},
+-	{0x0000a1a0, 0x00000000},
+-	{0x0000a1a4, 0x00000000},
+-	{0x0000a1a8, 0x00000000},
+-	{0x0000a1ac, 0x00000000},
+-	{0x0000a1b0, 0x00000000},
+-	{0x0000a1b4, 0x00000000},
+-	{0x0000a1b8, 0x00000000},
+-	{0x0000a1bc, 0x00000000},
+-	{0x0000a1c0, 0x00000000},
+-	{0x0000a1c4, 0x00000000},
+-	{0x0000a1c8, 0x00000000},
+-	{0x0000a1cc, 0x00000000},
+-	{0x0000a1d0, 0x00000000},
+-	{0x0000a1d4, 0x00000000},
+-	{0x0000a1d8, 0x00000000},
+-	{0x0000a1dc, 0x00000000},
+-	{0x0000a1e0, 0x00000000},
+-	{0x0000a1e4, 0x00000000},
+-	{0x0000a1e8, 0x00000000},
+-	{0x0000a1ec, 0x00000000},
+-	{0x0000a1f0, 0x00000396},
+-	{0x0000a1f4, 0x00000396},
+-	{0x0000a1f8, 0x00000396},
+-	{0x0000a1fc, 0x00000196},
+-	{0x0000b000, 0x00010000},
+-	{0x0000b004, 0x00030002},
+-	{0x0000b008, 0x00050004},
+-	{0x0000b00c, 0x00810080},
+-	{0x0000b010, 0x00830082},
+-	{0x0000b014, 0x01810180},
+-	{0x0000b018, 0x01830182},
+-	{0x0000b01c, 0x01850184},
+-	{0x0000b020, 0x02810280},
+-	{0x0000b024, 0x02830282},
+-	{0x0000b028, 0x02850284},
+-	{0x0000b02c, 0x02890288},
+-	{0x0000b030, 0x028b028a},
+-	{0x0000b034, 0x0388028c},
+-	{0x0000b038, 0x038a0389},
+-	{0x0000b03c, 0x038c038b},
+-	{0x0000b040, 0x0390038d},
+-	{0x0000b044, 0x03920391},
+-	{0x0000b048, 0x03940393},
+-	{0x0000b04c, 0x03960395},
+-	{0x0000b050, 0x00000000},
+-	{0x0000b054, 0x00000000},
+-	{0x0000b058, 0x00000000},
+-	{0x0000b05c, 0x00000000},
+-	{0x0000b060, 0x00000000},
+-	{0x0000b064, 0x00000000},
+-	{0x0000b068, 0x00000000},
+-	{0x0000b06c, 0x00000000},
+-	{0x0000b070, 0x00000000},
+-	{0x0000b074, 0x00000000},
+-	{0x0000b078, 0x00000000},
+-	{0x0000b07c, 0x00000000},
+-	{0x0000b080, 0x32323232},
+-	{0x0000b084, 0x2f2f3232},
+-	{0x0000b088, 0x23282a2d},
+-	{0x0000b08c, 0x1c1e2123},
+-	{0x0000b090, 0x14171919},
+-	{0x0000b094, 0x0e0e1214},
+-	{0x0000b098, 0x03050707},
+-	{0x0000b09c, 0x00030303},
+-	{0x0000b0a0, 0x00000000},
+-	{0x0000b0a4, 0x00000000},
+-	{0x0000b0a8, 0x00000000},
+-	{0x0000b0ac, 0x00000000},
+-	{0x0000b0b0, 0x00000000},
+-	{0x0000b0b4, 0x00000000},
+-	{0x0000b0b8, 0x00000000},
+-	{0x0000b0bc, 0x00000000},
+-	{0x0000b0c0, 0x003f0020},
+-	{0x0000b0c4, 0x00400041},
+-	{0x0000b0c8, 0x0140005f},
+-	{0x0000b0cc, 0x0160015f},
+-	{0x0000b0d0, 0x017e017f},
+-	{0x0000b0d4, 0x02410242},
+-	{0x0000b0d8, 0x025f0240},
+-	{0x0000b0dc, 0x027f0260},
+-	{0x0000b0e0, 0x0341027e},
+-	{0x0000b0e4, 0x035f0340},
+-	{0x0000b0e8, 0x037f0360},
+-	{0x0000b0ec, 0x04400441},
+-	{0x0000b0f0, 0x0460045f},
+-	{0x0000b0f4, 0x0541047f},
+-	{0x0000b0f8, 0x055f0540},
+-	{0x0000b0fc, 0x057f0560},
+-	{0x0000b100, 0x06400641},
+-	{0x0000b104, 0x0660065f},
+-	{0x0000b108, 0x067e067f},
+-	{0x0000b10c, 0x07410742},
+-	{0x0000b110, 0x075f0740},
+-	{0x0000b114, 0x077f0760},
+-	{0x0000b118, 0x07800781},
+-	{0x0000b11c, 0x07a0079f},
+-	{0x0000b120, 0x07c107bf},
+-	{0x0000b124, 0x000007c0},
+-	{0x0000b128, 0x00000000},
+-	{0x0000b12c, 0x00000000},
+-	{0x0000b130, 0x00000000},
+-	{0x0000b134, 0x00000000},
+-	{0x0000b138, 0x00000000},
+-	{0x0000b13c, 0x00000000},
+-	{0x0000b140, 0x003f0020},
+-	{0x0000b144, 0x00400041},
+-	{0x0000b148, 0x0140005f},
+-	{0x0000b14c, 0x0160015f},
+-	{0x0000b150, 0x017e017f},
+-	{0x0000b154, 0x02410242},
+-	{0x0000b158, 0x025f0240},
+-	{0x0000b15c, 0x027f0260},
+-	{0x0000b160, 0x0341027e},
+-	{0x0000b164, 0x035f0340},
+-	{0x0000b168, 0x037f0360},
+-	{0x0000b16c, 0x04400441},
+-	{0x0000b170, 0x0460045f},
+-	{0x0000b174, 0x0541047f},
+-	{0x0000b178, 0x055f0540},
+-	{0x0000b17c, 0x057f0560},
+-	{0x0000b180, 0x06400641},
+-	{0x0000b184, 0x0660065f},
+-	{0x0000b188, 0x067e067f},
+-	{0x0000b18c, 0x07410742},
+-	{0x0000b190, 0x075f0740},
+-	{0x0000b194, 0x077f0760},
+-	{0x0000b198, 0x07800781},
+-	{0x0000b19c, 0x07a0079f},
+-	{0x0000b1a0, 0x07c107bf},
+-	{0x0000b1a4, 0x000007c0},
+-	{0x0000b1a8, 0x00000000},
+-	{0x0000b1ac, 0x00000000},
+-	{0x0000b1b0, 0x00000000},
+-	{0x0000b1b4, 0x00000000},
+-	{0x0000b1b8, 0x00000000},
+-	{0x0000b1bc, 0x00000000},
+-	{0x0000b1c0, 0x00000000},
+-	{0x0000b1c4, 0x00000000},
+-	{0x0000b1c8, 0x00000000},
+-	{0x0000b1cc, 0x00000000},
+-	{0x0000b1d0, 0x00000000},
+-	{0x0000b1d4, 0x00000000},
+-	{0x0000b1d8, 0x00000000},
+-	{0x0000b1dc, 0x00000000},
+-	{0x0000b1e0, 0x00000000},
+-	{0x0000b1e4, 0x00000000},
+-	{0x0000b1e8, 0x00000000},
+-	{0x0000b1ec, 0x00000000},
+-	{0x0000b1f0, 0x00000396},
+-	{0x0000b1f4, 0x00000396},
+-	{0x0000b1f8, 0x00000396},
+-	{0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9480_2p0_baseband_core_txfir_coeff_japan_2484[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a398, 0x00000000},
+-	{0x0000a39c, 0x6f7f0301},
+-	{0x0000a3a0, 0xca9228ee},
+-};
+-
+-static const u32 ar9480_modes_low_ob_db_tx_gain_table_2p0[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+-	{0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+-	{0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+-	{0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+-	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+-	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+-	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+-	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+-	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
+-	{0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
+-	{0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
+-	{0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
+-	{0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
+-	{0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
+-	{0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
+-	{0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
+-	{0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
+-	{0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
+-	{0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
+-	{0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
+-	{0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
+-	{0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
+-	{0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
+-	{0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
+-	{0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
+-	{0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
+-	{0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
+-	{0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
+-	{0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
+-	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
+-	{0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
+-	{0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
+-	{0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
+-	{0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
+-	{0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
+-	{0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
+-	{0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
+-	{0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
+-	{0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
+-	{0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+-	{0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
+-	{0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-	{0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
+-	{0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
+-	{0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-};
+-
+-static const u32 ar9480_2p0_soc_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
+-};
+-
+-static const u32 ar9480_2p0_baseband_core[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00009800, 0xafe68e30},
+-	{0x00009804, 0xfd14e000},
+-	{0x00009808, 0x9c0a9f6b},
+-	{0x0000980c, 0x04900000},
+-	{0x00009814, 0x9280c00a},
+-	{0x00009818, 0x00000000},
+-	{0x0000981c, 0x00020028},
+-	{0x00009834, 0x6400a290},
+-	{0x00009838, 0x0108ecff},
+-	{0x0000983c, 0x0d000600},
+-	{0x00009880, 0x201fff00},
+-	{0x00009884, 0x00001042},
+-	{0x000098a4, 0x00200400},
+-	{0x000098b0, 0x32440bbe},
+-	{0x000098d0, 0x004b6a8e},
+-	{0x000098d4, 0x00000820},
+-	{0x000098dc, 0x00000000},
+-	{0x000098e4, 0x01ffffff},
+-	{0x000098e8, 0x01ffffff},
+-	{0x000098ec, 0x01ffffff},
+-	{0x000098f0, 0x00000000},
+-	{0x000098f4, 0x00000000},
+-	{0x00009bf0, 0x80000000},
+-	{0x00009c04, 0xff55ff55},
+-	{0x00009c08, 0x0320ff55},
+-	{0x00009c0c, 0x00000000},
+-	{0x00009c10, 0x00000000},
+-	{0x00009c14, 0x00046384},
+-	{0x00009c18, 0x05b6b440},
+-	{0x00009c1c, 0x00b6b440},
+-	{0x00009d00, 0xc080a333},
+-	{0x00009d04, 0x40206c10},
+-	{0x00009d08, 0x009c4060},
+-	{0x00009d0c, 0x9883800a},
+-	{0x00009d10, 0x01834061},
+-	{0x00009d14, 0x00c0040b},
+-	{0x00009d18, 0x00000000},
+-	{0x00009e08, 0x0038230c},
+-	{0x00009e24, 0x990bb515},
+-	{0x00009e28, 0x0c6f0000},
+-	{0x00009e30, 0x06336f77},
+-	{0x00009e34, 0x6af6532f},
+-	{0x00009e38, 0x0cc80c00},
+-	{0x00009e40, 0x0d261820},
+-	{0x00009e4c, 0x00001004},
+-	{0x00009e50, 0x00ff03f1},
+-	{0x00009e54, 0xe4c355c7},
+-	{0x00009e58, 0xfd897735},
+-	{0x00009e5c, 0xe9198724},
+-	{0x00009fc0, 0x803e4788},
+-	{0x00009fc4, 0x0001efb5},
+-	{0x00009fcc, 0x40000014},
+-	{0x00009fd0, 0x01193b93},
+-	{0x0000a20c, 0x00000000},
+-	{0x0000a220, 0x00000000},
+-	{0x0000a224, 0x00000000},
+-	{0x0000a228, 0x10002310},
+-	{0x0000a23c, 0x00000000},
+-	{0x0000a244, 0x0c000000},
+-	{0x0000a2a0, 0x00000001},
+-	{0x0000a2c0, 0x00000001},
+-	{0x0000a2c8, 0x00000000},
+-	{0x0000a2cc, 0x18c43433},
+-	{0x0000a2d4, 0x00000000},
+-	{0x0000a2ec, 0x00000000},
+-	{0x0000a2f0, 0x00000000},
+-	{0x0000a2f4, 0x00000000},
+-	{0x0000a2f8, 0x00000000},
+-	{0x0000a344, 0x00000000},
+-	{0x0000a34c, 0x00000000},
+-	{0x0000a350, 0x0000a000},
+-	{0x0000a364, 0x00000000},
+-	{0x0000a370, 0x00000000},
+-	{0x0000a390, 0x00000001},
+-	{0x0000a394, 0x00000444},
+-	{0x0000a398, 0x001f0e0f},
+-	{0x0000a39c, 0x0075393f},
+-	{0x0000a3a0, 0xb79f6427},
+-	{0x0000a3a4, 0x00000000},
+-	{0x0000a3a8, 0xaaaaaaaa},
+-	{0x0000a3ac, 0x3c466478},
+-	{0x0000a3c0, 0x20202020},
+-	{0x0000a3c4, 0x22222220},
+-	{0x0000a3c8, 0x20200020},
+-	{0x0000a3cc, 0x20202020},
+-	{0x0000a3d0, 0x20202020},
+-	{0x0000a3d4, 0x20202020},
+-	{0x0000a3d8, 0x20202020},
+-	{0x0000a3dc, 0x20202020},
+-	{0x0000a3e0, 0x20202020},
+-	{0x0000a3e4, 0x20202020},
+-	{0x0000a3e8, 0x20202020},
+-	{0x0000a3ec, 0x20202020},
+-	{0x0000a3f0, 0x00000000},
+-	{0x0000a3f4, 0x00000006},
+-	{0x0000a3f8, 0x0c9bd380},
+-	{0x0000a3fc, 0x000f0f01},
+-	{0x0000a400, 0x8fa91f01},
+-	{0x0000a404, 0x00000000},
+-	{0x0000a408, 0x0e79e5c6},
+-	{0x0000a40c, 0x00820820},
+-	{0x0000a414, 0x1ce739ce},
+-	{0x0000a418, 0x2d001dce},
+-	{0x0000a41c, 0x1ce739ce},
+-	{0x0000a420, 0x000001ce},
+-	{0x0000a424, 0x1ce739ce},
+-	{0x0000a428, 0x000001ce},
+-	{0x0000a42c, 0x1ce739ce},
+-	{0x0000a430, 0x1ce739ce},
+-	{0x0000a434, 0x00000000},
+-	{0x0000a438, 0x00001801},
+-	{0x0000a43c, 0x00100000},
+-	{0x0000a444, 0x00000000},
+-	{0x0000a448, 0x05000080},
+-	{0x0000a44c, 0x00000001},
+-	{0x0000a450, 0x00010000},
+-	{0x0000a454, 0x07000000},
+-	{0x0000a644, 0xbfad9d74},
+-	{0x0000a648, 0x0048060a},
+-	{0x0000a64c, 0x00002037},
+-	{0x0000a670, 0x03020100},
+-	{0x0000a674, 0x09080504},
+-	{0x0000a678, 0x0d0c0b0a},
+-	{0x0000a67c, 0x13121110},
+-	{0x0000a680, 0x31301514},
+-	{0x0000a684, 0x35343332},
+-	{0x0000a688, 0x00000036},
+-	{0x0000a690, 0x00000838},
+-	{0x0000a6b0, 0x0000000a},
+-	{0x0000a6b4, 0x00512c01},
+-	{0x0000a7c0, 0x00000000},
+-	{0x0000a7c4, 0xfffffffc},
+-	{0x0000a7c8, 0x00000000},
+-	{0x0000a7cc, 0x00000000},
+-	{0x0000a7d0, 0x00000000},
+-	{0x0000a7d4, 0x00000004},
+-	{0x0000a7dc, 0x00000001},
+-	{0x0000a7f0, 0x80000000},
+-	{0x0000a8d0, 0x004b6a8e},
+-	{0x0000a8d4, 0x00000820},
+-	{0x0000a8dc, 0x00000000},
+-	{0x0000a8f0, 0x00000000},
+-	{0x0000a8f4, 0x00000000},
+-	{0x0000abf0, 0x80000000},
+-	{0x0000b2d0, 0x00000080},
+-	{0x0000b2d4, 0x00000000},
+-	{0x0000b2ec, 0x00000000},
+-	{0x0000b2f0, 0x00000000},
+-	{0x0000b2f4, 0x00000000},
+-	{0x0000b2f8, 0x00000000},
+-	{0x0000b408, 0x0e79e5c0},
+-	{0x0000b40c, 0x00820820},
+-	{0x0000b420, 0x00000000},
+-	{0x0000b6b0, 0x0000000a},
+-	{0x0000b6b4, 0x00000001},
+-};
+-
+-static const u32 ar9480_2p0_radio_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
+-	{0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
+-	{0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+-	{0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
+-};
+-
+-static const u32 ar9480_modes_high_ob_db_tx_gain_table_2p0[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+-	{0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+-	{0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+-	{0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+-	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+-	{0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
+-	{0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
+-	{0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
+-	{0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
+-	{0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
+-	{0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
+-	{0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
+-	{0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
+-	{0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
+-	{0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
+-	{0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
+-	{0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
+-	{0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
+-	{0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
+-	{0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
+-	{0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
+-	{0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
+-	{0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
+-	{0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
+-	{0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
+-	{0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
+-	{0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
+-	{0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
+-	{0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
+-	{0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+-	{0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+-	{0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+-	{0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+-	{0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+-	{0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+-	{0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+-	{0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+-	{0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+-	{0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+-	{0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
+-	{0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-	{0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+-	{0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
+-	{0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
+-};
+-
+-static const u32 ar9480_2p0_radio_core[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00016000, 0x36db6db6},
+-	{0x00016004, 0x6db6db40},
+-	{0x00016008, 0x73f00000},
+-	{0x0001600c, 0x00000000},
+-	{0x00016010, 0x6d820001},
+-	{0x00016040, 0x7f80fff8},
+-	{0x0001604c, 0x2699e04f},
+-	{0x00016050, 0x6db6db6c},
+-	{0x00016058, 0x6c200000},
+-	{0x00016080, 0x00040000},
+-	{0x00016084, 0x9a68048c},
+-	{0x00016088, 0x54214514},
+-	{0x0001608c, 0x1203040b},
+-	{0x00016090, 0x24926490},
+-	{0x00016098, 0xd2888888},
+-	{0x000160a0, 0x0a108ffe},
+-	{0x000160a4, 0x812fc491},
+-	{0x000160a8, 0x423c8000},
+-	{0x000160b4, 0x92000000},
+-	{0x000160b8, 0x0285dddc},
+-	{0x000160bc, 0x02908888},
+-	{0x000160c0, 0x00adb6d0},
+-	{0x000160c4, 0x6db6db60},
+-	{0x000160c8, 0x6db6db6c},
+-	{0x000160cc, 0x0de6c1b0},
+-	{0x00016100, 0x3fffbe04},
+-	{0x00016104, 0xfff80000},
+-	{0x00016108, 0x00200400},
+-	{0x00016110, 0x00000000},
+-	{0x00016144, 0x02084080},
+-	{0x00016148, 0x000080c0},
+-	{0x00016280, 0x050a0001},
+-	{0x00016284, 0x3d841400},
+-	{0x00016288, 0x00000000},
+-	{0x0001628c, 0xe3000000},
+-	{0x00016290, 0xa1005080},
+-	{0x00016294, 0x00000020},
+-	{0x00016298, 0x54a82900},
+-	{0x00016340, 0x121e4276},
+-	{0x00016344, 0x00300000},
+-	{0x00016400, 0x36db6db6},
+-	{0x00016404, 0x6db6db40},
+-	{0x00016408, 0x73f00000},
+-	{0x0001640c, 0x00000000},
+-	{0x00016410, 0x6c800001},
+-	{0x00016440, 0x7f80fff8},
+-	{0x0001644c, 0x4699e04f},
+-	{0x00016450, 0x6db6db6c},
+-	{0x00016500, 0x3fffbe04},
+-	{0x00016504, 0xfff80000},
+-	{0x00016508, 0x00200400},
+-	{0x00016510, 0x00000000},
+-	{0x00016544, 0x02084080},
+-	{0x00016548, 0x000080c0},
+-};
+-
+-static const u32 ar9480_2p0_tx_gain_table_baseband_postamble_emulation[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
+-	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
+-	{0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
+-	{0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
+-	{0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
+-	{0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
+-	{0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
+-	{0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
+-	{0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
+-	{0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
+-	{0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
+-	{0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
+-	{0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
+-};
+-
+-static const u32 ar9480_2p0_soc_preamble[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00007020, 0x00000000},
+-	{0x00007034, 0x00000002},
+-	{0x00007038, 0x000004c2},
+-};
+-
+-static const u32 ar9480_2p0_sys2ant[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00063120, 0x00801980},
+-};
+-
+-static const u32 ar9480_2p0_mac_core[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00000008, 0x00000000},
+-	{0x00000030, 0x000e0085},
+-	{0x00000034, 0x00000005},
+-	{0x00000040, 0x00000000},
+-	{0x00000044, 0x00000000},
+-	{0x00000048, 0x00000008},
+-	{0x0000004c, 0x00000010},
+-	{0x00000050, 0x00000000},
+-	{0x00001040, 0x002ffc0f},
+-	{0x00001044, 0x002ffc0f},
+-	{0x00001048, 0x002ffc0f},
+-	{0x0000104c, 0x002ffc0f},
+-	{0x00001050, 0x002ffc0f},
+-	{0x00001054, 0x002ffc0f},
+-	{0x00001058, 0x002ffc0f},
+-	{0x0000105c, 0x002ffc0f},
+-	{0x00001060, 0x002ffc0f},
+-	{0x00001064, 0x002ffc0f},
+-	{0x000010f0, 0x00000100},
+-	{0x00001270, 0x00000000},
+-	{0x000012b0, 0x00000000},
+-	{0x000012f0, 0x00000000},
+-	{0x0000143c, 0x00000000},
+-	{0x0000147c, 0x00000000},
+-	{0x00001810, 0x0f000003},
+-	{0x00008000, 0x00000000},
+-	{0x00008004, 0x00000000},
+-	{0x00008008, 0x00000000},
+-	{0x0000800c, 0x00000000},
+-	{0x00008018, 0x00000000},
+-	{0x00008020, 0x00000000},
+-	{0x00008038, 0x00000000},
+-	{0x0000803c, 0x00080000},
+-	{0x00008040, 0x00000000},
+-	{0x00008044, 0x00000000},
+-	{0x00008048, 0x00000000},
+-	{0x0000804c, 0xffffffff},
+-	{0x00008050, 0xffffffff},
+-	{0x00008054, 0x00000000},
+-	{0x00008058, 0x00000000},
+-	{0x0000805c, 0x000fc78f},
+-	{0x00008060, 0x0000000f},
+-	{0x00008064, 0x00000000},
+-	{0x00008070, 0x00000310},
+-	{0x00008074, 0x00000020},
+-	{0x00008078, 0x00000000},
+-	{0x0000809c, 0x0000000f},
+-	{0x000080a0, 0x00000000},
+-	{0x000080a4, 0x02ff0000},
+-	{0x000080a8, 0x0e070605},
+-	{0x000080ac, 0x0000000d},
+-	{0x000080b0, 0x00000000},
+-	{0x000080b4, 0x00000000},
+-	{0x000080b8, 0x00000000},
+-	{0x000080bc, 0x00000000},
+-	{0x000080c0, 0x2a800000},
+-	{0x000080c4, 0x06900168},
+-	{0x000080c8, 0x13881c20},
+-	{0x000080cc, 0x01f40000},
+-	{0x000080d0, 0x00252500},
+-	{0x000080d4, 0x00b00005},
+-	{0x000080d8, 0x00400002},
+-	{0x000080dc, 0x00000000},
+-	{0x000080e0, 0xffffffff},
+-	{0x000080e4, 0x0000ffff},
+-	{0x000080e8, 0x3f3f3f3f},
+-	{0x000080ec, 0x00000000},
+-	{0x000080f0, 0x00000000},
+-	{0x000080f4, 0x00000000},
+-	{0x000080fc, 0x00020000},
+-	{0x00008100, 0x00000000},
+-	{0x00008108, 0x00000052},
+-	{0x0000810c, 0x00000000},
+-	{0x00008110, 0x00000000},
+-	{0x00008114, 0x000007ff},
+-	{0x00008118, 0x000000aa},
+-	{0x0000811c, 0x00003210},
+-	{0x00008124, 0x00000000},
+-	{0x00008128, 0x00000000},
+-	{0x0000812c, 0x00000000},
+-	{0x00008130, 0x00000000},
+-	{0x00008134, 0x00000000},
+-	{0x00008138, 0x00000000},
+-	{0x0000813c, 0x0000ffff},
+-	{0x00008144, 0xffffffff},
+-	{0x00008168, 0x00000000},
+-	{0x0000816c, 0x00000000},
+-	{0x00008170, 0x18486e00},
+-	{0x00008174, 0x33332210},
+-	{0x00008178, 0x00000000},
+-	{0x0000817c, 0x00020000},
+-	{0x000081c4, 0x33332210},
+-	{0x000081c8, 0x00000000},
+-	{0x000081cc, 0x00000000},
+-	{0x000081d4, 0x00000000},
+-	{0x000081ec, 0x00000000},
+-	{0x000081f0, 0x00000000},
+-	{0x000081f4, 0x00000000},
+-	{0x000081f8, 0x00000000},
+-	{0x000081fc, 0x00000000},
+-	{0x00008240, 0x00100000},
+-	{0x00008244, 0x0010f400},
+-	{0x00008248, 0x00000800},
+-	{0x0000824c, 0x0001e800},
+-	{0x00008250, 0x00000000},
+-	{0x00008254, 0x00000000},
+-	{0x00008258, 0x00000000},
+-	{0x0000825c, 0x40000000},
+-	{0x00008260, 0x00080922},
+-	{0x00008264, 0x99c00010},
+-	{0x00008268, 0xffffffff},
+-	{0x0000826c, 0x0000ffff},
+-	{0x00008270, 0x00000000},
+-	{0x00008274, 0x40000000},
+-	{0x00008278, 0x003e4180},
+-	{0x0000827c, 0x00000004},
+-	{0x00008284, 0x0000002c},
+-	{0x00008288, 0x0000002c},
+-	{0x0000828c, 0x000000ff},
+-	{0x00008294, 0x00000000},
+-	{0x00008298, 0x00000000},
+-	{0x0000829c, 0x00000000},
+-	{0x00008300, 0x00000140},
+-	{0x00008314, 0x00000000},
+-	{0x0000831c, 0x0000010d},
+-	{0x00008328, 0x00000000},
+-	{0x0000832c, 0x0000001f},
+-	{0x00008330, 0x00000302},
+-	{0x00008334, 0x00000700},
+-	{0x00008338, 0xffff0000},
+-	{0x0000833c, 0x02400000},
+-	{0x00008340, 0x000107ff},
+-	{0x00008344, 0xaa48105b},
+-	{0x00008348, 0x008f0000},
+-	{0x0000835c, 0x00000000},
+-	{0x00008360, 0xffffffff},
+-	{0x00008364, 0xffffffff},
+-	{0x00008368, 0x00000000},
+-	{0x00008370, 0x00000000},
+-	{0x00008374, 0x000000ff},
+-	{0x00008378, 0x00000000},
+-	{0x0000837c, 0x00000000},
+-	{0x00008380, 0xffffffff},
+-	{0x00008384, 0xffffffff},
+-	{0x00008390, 0xffffffff},
+-	{0x00008394, 0xffffffff},
+-	{0x00008398, 0x00000000},
+-	{0x0000839c, 0x00000000},
+-	{0x000083a4, 0x0000fa14},
+-	{0x000083a8, 0x000f0c00},
+-	{0x000083ac, 0x33332210},
+-	{0x000083b0, 0x33332210},
+-	{0x000083b4, 0x33332210},
+-	{0x000083b8, 0x33332210},
+-	{0x000083bc, 0x00000000},
+-	{0x000083c0, 0x00000000},
+-	{0x000083c4, 0x00000000},
+-	{0x000083c8, 0x00000000},
+-	{0x000083cc, 0x00000200},
+-	{0x000083d0, 0x000301ff},
+-};
+-
+-static const u32 ar9480_2p0_mac_postamble[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+-	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+-	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+-	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+-	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+-	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+-	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+-	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+-};
+-
+-static const u32 ar9480_common_mixed_rx_gain_table_2p0[][2] = {
+-	/* Addr      allmodes  */
+-	{0x0000a000, 0x00010000},
+-	{0x0000a004, 0x00030002},
+-	{0x0000a008, 0x00050004},
+-	{0x0000a00c, 0x00810080},
+-	{0x0000a010, 0x00830082},
+-	{0x0000a014, 0x01810180},
+-	{0x0000a018, 0x01830182},
+-	{0x0000a01c, 0x01850184},
+-	{0x0000a020, 0x01890188},
+-	{0x0000a024, 0x018b018a},
+-	{0x0000a028, 0x018d018c},
+-	{0x0000a02c, 0x03820190},
+-	{0x0000a030, 0x03840383},
+-	{0x0000a034, 0x03880385},
+-	{0x0000a038, 0x038a0389},
+-	{0x0000a03c, 0x038c038b},
+-	{0x0000a040, 0x0390038d},
+-	{0x0000a044, 0x03920391},
+-	{0x0000a048, 0x03940393},
+-	{0x0000a04c, 0x03960395},
+-	{0x0000a050, 0x00000000},
+-	{0x0000a054, 0x00000000},
+-	{0x0000a058, 0x00000000},
+-	{0x0000a05c, 0x00000000},
+-	{0x0000a060, 0x00000000},
+-	{0x0000a064, 0x00000000},
+-	{0x0000a068, 0x00000000},
+-	{0x0000a06c, 0x00000000},
+-	{0x0000a070, 0x00000000},
+-	{0x0000a074, 0x00000000},
+-	{0x0000a078, 0x00000000},
+-	{0x0000a07c, 0x00000000},
+-	{0x0000a080, 0x29292929},
+-	{0x0000a084, 0x29292929},
+-	{0x0000a088, 0x29292929},
+-	{0x0000a08c, 0x29292929},
+-	{0x0000a090, 0x22292929},
+-	{0x0000a094, 0x1d1d2222},
+-	{0x0000a098, 0x0c111117},
+-	{0x0000a09c, 0x00030303},
+-	{0x0000a0a0, 0x00000000},
+-	{0x0000a0a4, 0x00000000},
+-	{0x0000a0a8, 0x00000000},
+-	{0x0000a0ac, 0x00000000},
+-	{0x0000a0b0, 0x00000000},
+-	{0x0000a0b4, 0x00000000},
+-	{0x0000a0b8, 0x00000000},
+-	{0x0000a0bc, 0x00000000},
+-	{0x0000a0c0, 0x001f0000},
+-	{0x0000a0c4, 0x01000101},
+-	{0x0000a0c8, 0x011e011f},
+-	{0x0000a0cc, 0x011c011d},
+-	{0x0000a0d0, 0x02030204},
+-	{0x0000a0d4, 0x02010202},
+-	{0x0000a0d8, 0x021f0200},
+-	{0x0000a0dc, 0x0302021e},
+-	{0x0000a0e0, 0x03000301},
+-	{0x0000a0e4, 0x031e031f},
+-	{0x0000a0e8, 0x0402031d},
+-	{0x0000a0ec, 0x04000401},
+-	{0x0000a0f0, 0x041e041f},
+-	{0x0000a0f4, 0x0502041d},
+-	{0x0000a0f8, 0x05000501},
+-	{0x0000a0fc, 0x051e051f},
+-	{0x0000a100, 0x06010602},
+-	{0x0000a104, 0x061f0600},
+-	{0x0000a108, 0x061d061e},
+-	{0x0000a10c, 0x07020703},
+-	{0x0000a110, 0x07000701},
+-	{0x0000a114, 0x00000000},
+-	{0x0000a118, 0x00000000},
+-	{0x0000a11c, 0x00000000},
+-	{0x0000a120, 0x00000000},
+-	{0x0000a124, 0x00000000},
+-	{0x0000a128, 0x00000000},
+-	{0x0000a12c, 0x00000000},
+-	{0x0000a130, 0x00000000},
+-	{0x0000a134, 0x00000000},
+-	{0x0000a138, 0x00000000},
+-	{0x0000a13c, 0x00000000},
+-	{0x0000a140, 0x001f0000},
+-	{0x0000a144, 0x01000101},
+-	{0x0000a148, 0x011e011f},
+-	{0x0000a14c, 0x011c011d},
+-	{0x0000a150, 0x02030204},
+-	{0x0000a154, 0x02010202},
+-	{0x0000a158, 0x021f0200},
+-	{0x0000a15c, 0x0302021e},
+-	{0x0000a160, 0x03000301},
+-	{0x0000a164, 0x031e031f},
+-	{0x0000a168, 0x0402031d},
+-	{0x0000a16c, 0x04000401},
+-	{0x0000a170, 0x041e041f},
+-	{0x0000a174, 0x0502041d},
+-	{0x0000a178, 0x05000501},
+-	{0x0000a17c, 0x051e051f},
+-	{0x0000a180, 0x06010602},
+-	{0x0000a184, 0x061f0600},
+-	{0x0000a188, 0x061d061e},
+-	{0x0000a18c, 0x07020703},
+-	{0x0000a190, 0x07000701},
+-	{0x0000a194, 0x00000000},
+-	{0x0000a198, 0x00000000},
+-	{0x0000a19c, 0x00000000},
+-	{0x0000a1a0, 0x00000000},
+-	{0x0000a1a4, 0x00000000},
+-	{0x0000a1a8, 0x00000000},
+-	{0x0000a1ac, 0x00000000},
+-	{0x0000a1b0, 0x00000000},
+-	{0x0000a1b4, 0x00000000},
+-	{0x0000a1b8, 0x00000000},
+-	{0x0000a1bc, 0x00000000},
+-	{0x0000a1c0, 0x00000000},
+-	{0x0000a1c4, 0x00000000},
+-	{0x0000a1c8, 0x00000000},
+-	{0x0000a1cc, 0x00000000},
+-	{0x0000a1d0, 0x00000000},
+-	{0x0000a1d4, 0x00000000},
+-	{0x0000a1d8, 0x00000000},
+-	{0x0000a1dc, 0x00000000},
+-	{0x0000a1e0, 0x00000000},
+-	{0x0000a1e4, 0x00000000},
+-	{0x0000a1e8, 0x00000000},
+-	{0x0000a1ec, 0x00000000},
+-	{0x0000a1f0, 0x00000396},
+-	{0x0000a1f4, 0x00000396},
+-	{0x0000a1f8, 0x00000396},
+-	{0x0000a1fc, 0x00000196},
+-	{0x0000b000, 0x00010000},
+-	{0x0000b004, 0x00030002},
+-	{0x0000b008, 0x00050004},
+-	{0x0000b00c, 0x00810080},
+-	{0x0000b010, 0x00830082},
+-	{0x0000b014, 0x01810180},
+-	{0x0000b018, 0x01830182},
+-	{0x0000b01c, 0x01850184},
+-	{0x0000b020, 0x02810280},
+-	{0x0000b024, 0x02830282},
+-	{0x0000b028, 0x02850284},
+-	{0x0000b02c, 0x02890288},
+-	{0x0000b030, 0x028b028a},
+-	{0x0000b034, 0x0388028c},
+-	{0x0000b038, 0x038a0389},
+-	{0x0000b03c, 0x038c038b},
+-	{0x0000b040, 0x0390038d},
+-	{0x0000b044, 0x03920391},
+-	{0x0000b048, 0x03940393},
+-	{0x0000b04c, 0x03960395},
+-	{0x0000b050, 0x00000000},
+-	{0x0000b054, 0x00000000},
+-	{0x0000b058, 0x00000000},
+-	{0x0000b05c, 0x00000000},
+-	{0x0000b060, 0x00000000},
+-	{0x0000b064, 0x00000000},
+-	{0x0000b068, 0x00000000},
+-	{0x0000b06c, 0x00000000},
+-	{0x0000b070, 0x00000000},
+-	{0x0000b074, 0x00000000},
+-	{0x0000b078, 0x00000000},
+-	{0x0000b07c, 0x00000000},
+-	{0x0000b080, 0x2a2d2f32},
+-	{0x0000b084, 0x21232328},
+-	{0x0000b088, 0x19191c1e},
+-	{0x0000b08c, 0x12141417},
+-	{0x0000b090, 0x07070e0e},
+-	{0x0000b094, 0x03030305},
+-	{0x0000b098, 0x00000003},
+-	{0x0000b09c, 0x00000000},
+-	{0x0000b0a0, 0x00000000},
+-	{0x0000b0a4, 0x00000000},
+-	{0x0000b0a8, 0x00000000},
+-	{0x0000b0ac, 0x00000000},
+-	{0x0000b0b0, 0x00000000},
+-	{0x0000b0b4, 0x00000000},
+-	{0x0000b0b8, 0x00000000},
+-	{0x0000b0bc, 0x00000000},
+-	{0x0000b0c0, 0x003f0020},
+-	{0x0000b0c4, 0x00400041},
+-	{0x0000b0c8, 0x0140005f},
+-	{0x0000b0cc, 0x0160015f},
+-	{0x0000b0d0, 0x017e017f},
+-	{0x0000b0d4, 0x02410242},
+-	{0x0000b0d8, 0x025f0240},
+-	{0x0000b0dc, 0x027f0260},
+-	{0x0000b0e0, 0x0341027e},
+-	{0x0000b0e4, 0x035f0340},
+-	{0x0000b0e8, 0x037f0360},
+-	{0x0000b0ec, 0x04400441},
+-	{0x0000b0f0, 0x0460045f},
+-	{0x0000b0f4, 0x0541047f},
+-	{0x0000b0f8, 0x055f0540},
+-	{0x0000b0fc, 0x057f0560},
+-	{0x0000b100, 0x06400641},
+-	{0x0000b104, 0x0660065f},
+-	{0x0000b108, 0x067e067f},
+-	{0x0000b10c, 0x07410742},
+-	{0x0000b110, 0x075f0740},
+-	{0x0000b114, 0x077f0760},
+-	{0x0000b118, 0x07800781},
+-	{0x0000b11c, 0x07a0079f},
+-	{0x0000b120, 0x07c107bf},
+-	{0x0000b124, 0x000007c0},
+-	{0x0000b128, 0x00000000},
+-	{0x0000b12c, 0x00000000},
+-	{0x0000b130, 0x00000000},
+-	{0x0000b134, 0x00000000},
+-	{0x0000b138, 0x00000000},
+-	{0x0000b13c, 0x00000000},
+-	{0x0000b140, 0x003f0020},
+-	{0x0000b144, 0x00400041},
+-	{0x0000b148, 0x0140005f},
+-	{0x0000b14c, 0x0160015f},
+-	{0x0000b150, 0x017e017f},
+-	{0x0000b154, 0x02410242},
+-	{0x0000b158, 0x025f0240},
+-	{0x0000b15c, 0x027f0260},
+-	{0x0000b160, 0x0341027e},
+-	{0x0000b164, 0x035f0340},
+-	{0x0000b168, 0x037f0360},
+-	{0x0000b16c, 0x04400441},
+-	{0x0000b170, 0x0460045f},
+-	{0x0000b174, 0x0541047f},
+-	{0x0000b178, 0x055f0540},
+-	{0x0000b17c, 0x057f0560},
+-	{0x0000b180, 0x06400641},
+-	{0x0000b184, 0x0660065f},
+-	{0x0000b188, 0x067e067f},
+-	{0x0000b18c, 0x07410742},
+-	{0x0000b190, 0x075f0740},
+-	{0x0000b194, 0x077f0760},
+-	{0x0000b198, 0x07800781},
+-	{0x0000b19c, 0x07a0079f},
+-	{0x0000b1a0, 0x07c107bf},
+-	{0x0000b1a4, 0x000007c0},
+-	{0x0000b1a8, 0x00000000},
+-	{0x0000b1ac, 0x00000000},
+-	{0x0000b1b0, 0x00000000},
+-	{0x0000b1b4, 0x00000000},
+-	{0x0000b1b8, 0x00000000},
+-	{0x0000b1bc, 0x00000000},
+-	{0x0000b1c0, 0x00000000},
+-	{0x0000b1c4, 0x00000000},
+-	{0x0000b1c8, 0x00000000},
+-	{0x0000b1cc, 0x00000000},
+-	{0x0000b1d0, 0x00000000},
+-	{0x0000b1d4, 0x00000000},
+-	{0x0000b1d8, 0x00000000},
+-	{0x0000b1dc, 0x00000000},
+-	{0x0000b1e0, 0x00000000},
+-	{0x0000b1e4, 0x00000000},
+-	{0x0000b1e8, 0x00000000},
+-	{0x0000b1ec, 0x00000000},
+-	{0x0000b1f0, 0x00000396},
+-	{0x0000b1f4, 0x00000396},
+-	{0x0000b1f8, 0x00000396},
+-	{0x0000b1fc, 0x00000196},
+-};
+-
+-static const u32 ar9480_modes_green_ob_db_tx_gain_table_2p0[][5] = {
+-	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+-	{0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+-	{0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+-	{0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+-	{0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+-	{0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
+-	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
+-	{0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
+-	{0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
+-	{0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
+-	{0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
+-	{0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
+-	{0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
+-	{0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
+-	{0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
+-	{0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
+-	{0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
+-	{0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
+-	{0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
+-	{0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
+-	{0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
+-	{0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
+-	{0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
+-	{0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
+-	{0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
+-	{0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
+-	{0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
+-	{0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
+-	{0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
+-	{0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
+-	{0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
+-	{0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
+-	{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+-	{0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
+-	{0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
+-	{0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
+-	{0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
+-	{0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
+-	{0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
+-	{0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
+-	{0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
+-	{0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
+-	{0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
+-	{0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
+-	{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+-	{0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+-	{0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
+-	{0x00016054, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
+-	{0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
+-	{0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
+-	{0x00016454, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
+-};
+-
+-static const u32 ar9480_2p0_BTCOEX_MAX_TXPWR_table[][2] = {
+-	/* Addr      allmodes  */
+-	{0x000018c0, 0x10101010},
+-	{0x000018c4, 0x10101010},
+-	{0x000018c8, 0x10101010},
+-	{0x000018cc, 0x10101010},
+-	{0x000018d0, 0x10101010},
+-	{0x000018d4, 0x10101010},
+-	{0x000018d8, 0x10101010},
+-	{0x000018dc, 0x10101010},
+-};
+-
+-static const u32 ar9480_2p0_baseband_core_emulation[][2] = {
+-	/* Addr      allmodes  */
+-	{0x00009800, 0xafa68e30},
+-	{0x00009884, 0x00002842},
+-	{0x00009c04, 0xff55ff55},
+-	{0x00009c08, 0x0320ff55},
+-	{0x00009e50, 0x00000000},
+-	{0x00009fcc, 0x00000014},
+-	{0x0000a344, 0x00000010},
+-	{0x0000a398, 0x00000000},
+-	{0x0000a39c, 0x71733d01},
+-	{0x0000a3a0, 0xd0ad5c12},
+-	{0x0000a3c0, 0x22222220},
+-	{0x0000a3c4, 0x22222222},
+-	{0x0000a404, 0x00418a11},
+-	{0x0000a418, 0x050001ce},
+-	{0x0000a438, 0x00001800},
+-	{0x0000a458, 0x01444452},
+-	{0x0000a644, 0x3fad9d74},
+-	{0x0000a690, 0x00000038},
+-};
+-
+-#endif /* INITVALS_9480_2P0_H */
 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -87,17 +87,14 @@ struct ath_config {
-  * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
-  * @BUF_AGGR: Indicates whether the buffer can be aggregated
-  *	(used in aggregation scheduling)
-- * @BUF_XRETRY: To denote excessive retries of the buffer
-  */
- enum buffer_type {
- 	BUF_AMPDU		= BIT(0),
- 	BUF_AGGR		= BIT(1),
--	BUF_XRETRY		= BIT(2),
- };
- 
- #define bf_isampdu(bf)		(bf->bf_state.bf_type & BUF_AMPDU)
- #define bf_isaggr(bf)		(bf->bf_state.bf_type & BUF_AGGR)
--#define bf_isxretried(bf)	(bf->bf_state.bf_type & BUF_XRETRY)
- 
- #define ATH_TXSTATUS_RING_SIZE 64
- 
-@@ -216,6 +213,7 @@ struct ath_frame_info {
- struct ath_buf_state {
- 	u8 bf_type;
- 	u8 bfs_paprd;
-+	u8 ndelim;
- 	u16 seqno;
- 	unsigned long bfs_paprd_timestamp;
- };
-@@ -230,7 +228,6 @@ struct ath_buf {
- 	dma_addr_t bf_daddr;		/* physical addr of desc */
- 	dma_addr_t bf_buf_addr;	/* physical addr of data buffer, for DMA */
- 	bool bf_stale;
--	u16 bf_flags;
- 	struct ath_buf_state bf_state;
- };
- 
-@@ -277,8 +274,7 @@ struct ath_tx_control {
- };
- 
- #define ATH_TX_ERROR        0x01
--#define ATH_TX_XRETRY       0x02
--#define ATH_TX_BAR          0x04
-+#define ATH_TX_BAR          0x02
+@@ -458,7 +458,7 @@ void ath9k_btcoex_timer_pause(struct ath
+ #define ATH_LED_PIN_9287		8
+ #define ATH_LED_PIN_9300		10
+ #define ATH_LED_PIN_9485		6
+-#define ATH_LED_PIN_9480		0
++#define ATH_LED_PIN_9462		0
  
- /**
-  * @txq_map:  Index is mac80211 queue number.  This is
+ #ifdef CONFIG_MAC80211_LEDS
+ void ath_init_leds(struct ath_softc *sc);
 --- a/drivers/net/wireless/ath/ath9k/beacon.c
 +++ b/drivers/net/wireless/ath/ath9k/beacon.c
-@@ -73,44 +73,39 @@ static void ath_beacon_setup(struct ath_
- 	struct sk_buff *skb = bf->bf_mpdu;
- 	struct ath_hw *ah = sc->sc_ah;
- 	struct ath_common *common = ath9k_hw_common(ah);
--	struct ath_desc *ds;
--	struct ath9k_11n_rate_series series[4];
--	int flags, ctsrate = 0, ctsduration = 0;
-+	struct ath_tx_info info;
- 	struct ieee80211_supported_band *sband;
-+	u8 chainmask = ah->txchainmask;
- 	u8 rate = 0;
- 
- 	ath9k_reset_beacon_status(sc);
- 
--	ds = bf->bf_desc;
--	flags = ATH9K_TXDESC_NOACK;
--
--	ds->ds_link = 0;
--
- 	sband = &sc->sbands[common->hw->conf.channel->band];
- 	rate = sband->bitrates[rateidx].hw_value;
- 	if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
- 		rate |= sband->bitrates[rateidx].hw_value_short;
- 
--	ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN,
--			       ATH9K_PKT_TYPE_BEACON,
--			       MAX_RATE_POWER,
--			       ATH9K_TXKEYIX_INVALID,
--			       ATH9K_KEY_TYPE_CLEAR,
--			       flags);
--
--	/* NB: beacon's BufLen must be a multiple of 4 bytes */
--	ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4),
--			    true, true, ds, bf->bf_buf_addr,
--			    sc->beacon.beaconq);
--
--	memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
--	series[0].Tries = 1;
--	series[0].Rate = rate;
--	series[0].ChSel = ath_txchainmask_reduction(sc,
--			ah->txchainmask, series[0].Rate);
--	series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
--	ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration,
--				     series, 4, 0);
-+	memset(&info, 0, sizeof(info));
-+	info.pkt_len = skb->len + FCS_LEN;
-+	info.type = ATH9K_PKT_TYPE_BEACON;
-+	info.txpower = MAX_RATE_POWER;
-+	info.keyix = ATH9K_TXKEYIX_INVALID;
-+	info.keytype = ATH9K_KEY_TYPE_CLEAR;
-+	info.flags = ATH9K_TXDESC_NOACK;
-+
-+	info.buf_addr[0] = bf->bf_buf_addr;
-+	info.buf_len[0] = roundup(skb->len, 4);
-+
-+	info.is_first = true;
-+	info.is_last = true;
-+
-+	info.qcu = sc->beacon.beaconq;
-+
-+	info.rates[0].Tries = 1;
-+	info.rates[0].Rate = rate;
-+	info.rates[0].ChSel = ath_txchainmask_reduction(sc, chainmask, rate);
-+
-+	ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
+@@ -515,7 +515,7 @@ static void ath_beacon_config_ap(struct 
+ 	sc->sc_flags |= SC_OP_TSF_RESET;
+ 	ath9k_beacon_init(sc, nexttbtt, intval);
+ 	sc->beacon.bmisscnt = 0;
+-	ath9k_hw_set_interrupts(ah, ah->imask);
++	ath9k_hw_set_interrupts(ah);
+ 	ath9k_hw_enable_interrupts(ah);
  }
  
- static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
-@@ -517,6 +512,7 @@ static void ath_beacon_config_ap(struct 
- 	/* Set the computed AP beacon timers */
+@@ -643,7 +643,7 @@ static void ath_beacon_config_sta(struct
+ 	ath9k_hw_set_sta_beacon_timers(ah, &bs);
+ 	ah->imask |= ATH9K_INT_BMISS;
+ 
+-	ath9k_hw_set_interrupts(ah, ah->imask);
++	ath9k_hw_set_interrupts(ah);
+ 	ath9k_hw_enable_interrupts(ah);
+ }
  
- 	ath9k_hw_disable_interrupts(ah);
-+	sc->sc_flags |= SC_OP_TSF_RESET;
+@@ -679,7 +679,7 @@ static void ath_beacon_config_adhoc(stru
  	ath9k_beacon_init(sc, nexttbtt, intval);
  	sc->beacon.bmisscnt = 0;
- 	ath9k_hw_set_interrupts(ah, ah->imask);
---- a/drivers/net/wireless/ath/ath9k/debug.c
-+++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -826,7 +826,8 @@ static ssize_t read_file_misc(struct fil
+ 
+-	ath9k_hw_set_interrupts(ah, ah->imask);
++	ath9k_hw_set_interrupts(ah);
+ 	ath9k_hw_enable_interrupts(ah);
  }
  
- void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
--		       struct ath_tx_status *ts, struct ath_txq *txq)
-+		       struct ath_tx_status *ts, struct ath_txq *txq,
-+		       unsigned int flags)
- {
- #define TX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].ts\
- 			[sc->debug.tsidx].c)
-@@ -836,12 +837,12 @@ void ath_debug_stat_tx(struct ath_softc 
- 	sc->debug.stats.txstats[qnum].tx_bytes_all += bf->bf_mpdu->len;
- 
- 	if (bf_isampdu(bf)) {
--		if (bf_isxretried(bf))
-+		if (flags & ATH_TX_BAR)
- 			TX_STAT_INC(qnum, a_xretries);
- 		else
- 			TX_STAT_INC(qnum, a_completed);
+@@ -821,11 +821,11 @@ void ath9k_set_beaconing_status(struct a
+ 	if (status) {
+ 		/* Re-enable beaconing */
+ 		ah->imask |= ATH9K_INT_SWBA;
+-		ath9k_hw_set_interrupts(ah, ah->imask);
++		ath9k_hw_set_interrupts(ah);
  	} else {
--		if (bf_isxretried(bf))
-+		if (ts->ts_status & ATH9K_TXERR_XRETRY)
- 			TX_STAT_INC(qnum, xretries);
- 		else
- 			TX_STAT_INC(qnum, completed);
+ 		/* Disable SWBA interrupt */
+ 		ah->imask &= ~ATH9K_INT_SWBA;
+-		ath9k_hw_set_interrupts(ah, ah->imask);
++		ath9k_hw_set_interrupts(ah);
+ 		tasklet_kill(&sc->bcon_tasklet);
+ 		ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
+ 	}
+--- a/drivers/net/wireless/ath/ath9k/common.c
++++ b/drivers/net/wireless/ath/ath9k/common.c
+@@ -161,10 +161,12 @@ EXPORT_SYMBOL(ath9k_cmn_count_streams);
+ void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
+ 			    u16 new_txpow, u16 *txpower)
+ {
+-	if (cur_txpow != new_txpow) {
++	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
++
++	if (reg->power_limit != new_txpow) {
+ 		ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
+ 		/* read back in case value is clamped */
+-		*txpower = ath9k_hw_regulatory(ah)->power_limit;
++		*txpower = reg->max_power_level;
+ 	}
+ }
+ EXPORT_SYMBOL(ath9k_cmn_update_txpow);
+--- a/drivers/net/wireless/ath/ath9k/debug.c
++++ b/drivers/net/wireless/ath/ath9k/debug.c
+@@ -523,9 +523,22 @@ static ssize_t read_file_wiphy(struct fi
+ 	if (tmp & ATH9K_RX_FILTER_PHYRADAR)
+ 		len += snprintf(buf + len, sizeof(buf) - len, " PHYRADAR");
+ 	if (tmp & ATH9K_RX_FILTER_MCAST_BCAST_ALL)
+-		len += snprintf(buf + len, sizeof(buf) - len, " MCAST_BCAST_ALL\n");
+-	else
+-		len += snprintf(buf + len, sizeof(buf) - len, "\n");
++		len += snprintf(buf + len, sizeof(buf) - len, " MCAST_BCAST_ALL");
++
++	len += snprintf(buf + len, sizeof(buf) - len,
++		       "\n\nReset causes:\n"
++		       "  baseband hang: %d\n"
++		       "  baseband watchdog: %d\n"
++		       "  fatal hardware error interrupt: %d\n"
++		       "  tx hardware error: %d\n"
++		       "  tx path hang: %d\n"
++		       "  pll rx hang: %d\n",
++		       sc->debug.stats.reset[RESET_TYPE_BB_HANG],
++		       sc->debug.stats.reset[RESET_TYPE_BB_WATCHDOG],
++		       sc->debug.stats.reset[RESET_TYPE_FATAL_INT],
++		       sc->debug.stats.reset[RESET_TYPE_TX_ERROR],
++		       sc->debug.stats.reset[RESET_TYPE_TX_HANG],
++		       sc->debug.stats.reset[RESET_TYPE_PLL_HANG]);
+ 
+ 	if (len > sizeof(buf))
+ 		len = sizeof(buf);
 --- a/drivers/net/wireless/ath/ath9k/debug.h
 +++ b/drivers/net/wireless/ath/ath9k/debug.h
-@@ -230,7 +230,8 @@ int ath9k_init_debug(struct ath_hw *ah);
- void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
- void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
- void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
--		       struct ath_tx_status *ts, struct ath_txq *txq);
-+		       struct ath_tx_status *ts, struct ath_txq *txq,
-+		       unsigned int flags);
- void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
+@@ -25,8 +25,10 @@ struct ath_buf;
  
+ #ifdef CONFIG_ATH9K_DEBUGFS
+ #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
++#define RESET_STAT_INC(sc, type) sc->debug.stats.reset[type]++
  #else
-@@ -252,7 +253,8 @@ static inline void ath_debug_stat_interr
- static inline void ath_debug_stat_tx(struct ath_softc *sc,
- 				     struct ath_buf *bf,
- 				     struct ath_tx_status *ts,
--				     struct ath_txq *txq)
-+				     struct ath_txq *txq,
-+				     unsigned int flags)
- {
- }
+ #define TX_STAT_INC(q, c) do { } while (0)
++#define RESET_STAT_INC(sc, type) do { } while (0)
+ #endif
  
---- a/drivers/net/wireless/ath/ath9k/hw-ops.h
-+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
-@@ -54,13 +54,10 @@ static inline bool ath9k_hw_getisr(struc
- 	return ath9k_hw_ops(ah)->get_isr(ah, masked);
- }
+ #ifdef CONFIG_ATH9K_DEBUGFS
+@@ -171,10 +173,21 @@ struct ath_rx_stats {
+ 	u8 rs_antenna;
+ };
  
--static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen,
--				  bool is_firstseg, bool is_lastseg,
--				  const void *ds0, dma_addr_t buf_addr,
--				  unsigned int qcu)
-+static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
-+				       struct ath_tx_info *i)
- {
--	ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg,
--				      ds0, buf_addr, qcu);
-+	return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
- }
++enum ath_reset_type {
++	RESET_TYPE_BB_HANG,
++	RESET_TYPE_BB_WATCHDOG,
++	RESET_TYPE_FATAL_INT,
++	RESET_TYPE_TX_ERROR,
++	RESET_TYPE_TX_HANG,
++	RESET_TYPE_PLL_HANG,
++	__RESET_TYPE_MAX
++};
++
+ struct ath_stats {
+ 	struct ath_interrupt_stats istats;
+ 	struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
+ 	struct ath_rx_stats rxstats;
++	u32 reset[__RESET_TYPE_MAX];
+ };
  
- static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
-@@ -69,55 +66,6 @@ static inline int ath9k_hw_txprocdesc(st
- 	return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
- }
+ #define ATH_DBG_MAX_SAMPLES	10
+--- a/drivers/net/wireless/ath/ath9k/eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/eeprom.h
+@@ -108,7 +108,7 @@
+ #define EEP_RFSILENT_ENABLED_S      0
+ #define EEP_RFSILENT_POLARITY       0x0002
+ #define EEP_RFSILENT_POLARITY_S     1
+-#define EEP_RFSILENT_GPIO_SEL       (AR_SREV_9480(ah) ? 0x00fc : 0x001c)
++#define EEP_RFSILENT_GPIO_SEL       (AR_SREV_9462(ah) ? 0x00fc : 0x001c)
+ #define EEP_RFSILENT_GPIO_SEL_S     2
+ 
+ #define AR5416_OPFLAGS_11A           0x01
+@@ -220,7 +220,6 @@ enum eeprom_param {
+ 	EEP_MAC_MID,
+ 	EEP_MAC_LSW,
+ 	EEP_REG_0,
+-	EEP_REG_1,
+ 	EEP_OP_CAP,
+ 	EEP_OP_MODE,
+ 	EEP_RF_SILENT,
+@@ -248,7 +247,9 @@ enum eeprom_param {
+ 	EEP_PAPRD,
+ 	EEP_MODAL_VER,
+ 	EEP_ANT_DIV_CTL1,
+-	EEP_CHAIN_MASK_REDUCE
++	EEP_CHAIN_MASK_REDUCE,
++	EEP_ANTENNA_GAIN_2G,
++	EEP_ANTENNA_GAIN_5G
+ };
  
--static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
--					  u32 pktLen, enum ath9k_pkt_type type,
--					  u32 txPower, u32 keyIx,
--					  enum ath9k_key_type keyType,
--					  u32 flags)
--{
--	ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
--				      keyType, flags);
--}
--
--static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
--					void *lastds,
--					u32 durUpdateEn, u32 rtsctsRate,
--					u32 rtsctsDuration,
--					struct ath9k_11n_rate_series series[],
--					u32 nseries, u32 flags)
--{
--	ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
--					    rtsctsRate, rtsctsDuration, series,
--					    nseries, flags);
--}
--
--static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
--					u32 aggrLen)
--{
--	ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
--}
--
--static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
--					       u32 numDelims)
--{
--	ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
--}
--
--static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
--{
--	ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
--}
--
--static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
--{
--	ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
--}
--
--static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
--{
--	ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val);
--}
--
- static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
- 		struct ath_hw_antcomb_conf *antconf)
- {
-@@ -233,11 +181,6 @@ static inline void ath9k_hw_restore_chai
- 	return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
- }
+ enum ar5416_rates {
+@@ -652,8 +653,7 @@ struct eeprom_ops {
+ 	void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
+ 	void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
+ 			   u16 cfgCtl, u8 twiceAntennaReduction,
+-			   u8 twiceMaxRegulatoryPower, u8 powerLimit,
+-			   bool test);
++			   u8 powerLimit, bool test);
+ 	u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);
+ };
  
--static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
--{
--	return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
--}
+--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+@@ -322,8 +322,6 @@ static u32 ath9k_hw_4k_get_eeprom(struct
+ 		return get_unaligned_be16(pBase->macAddr + 4);
+ 	case EEP_REG_0:
+ 		return pBase->regDmn[0];
+-	case EEP_REG_1:
+-		return pBase->regDmn[1];
+ 	case EEP_OP_CAP:
+ 		return pBase->deviceCap;
+ 	case EEP_OP_MODE:
+@@ -350,6 +348,8 @@ static u32 ath9k_hw_4k_get_eeprom(struct
+ 		return pModal->antdiv_ctl1;
+ 	case EEP_TXGAIN_TYPE:
+ 		return pBase->txGainType;
++	case EEP_ANTENNA_GAIN_2G:
++		return pModal->antennaGainCh[0];
+ 	default:
+ 		return 0;
+ 	}
+@@ -462,8 +462,7 @@ static void ath9k_hw_set_4k_power_per_ra
+ 						 struct ath9k_channel *chan,
+ 						 int16_t *ratesArray,
+ 						 u16 cfgCtl,
+-						 u16 AntennaReduction,
+-						 u16 twiceMaxRegulatoryPower,
++						 u16 antenna_reduction,
+ 						 u16 powerLimit)
+ {
+ #define CMP_TEST_GRP \
+@@ -472,20 +471,16 @@ static void ath9k_hw_set_4k_power_per_ra
+ 	|| (((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == \
+ 	    ((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL))
+ 
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	int i;
+-	int16_t twiceLargestAntenna;
+ 	u16 twiceMinEdgePower;
+ 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
+-	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
++	u16 scaledPower = 0, minCtlPower;
+ 	u16 numCtlModes;
+ 	const u16 *pCtlMode;
+ 	u16 ctlMode, freq;
+ 	struct chan_centers centers;
+ 	struct cal_ctl_data_4k *rep;
+ 	struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
+-	static const u16 tpScaleReductionTable[5] =
+-		{ 0, 3, 6, 9, MAX_RATE_POWER };
+ 	struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
+ 		0, { 0, 0, 0, 0}
+ 	};
+@@ -503,19 +498,7 @@ static void ath9k_hw_set_4k_power_per_ra
+ 
+ 	ath9k_hw_get_channel_centers(ah, chan, &centers);
+ 
+-	twiceLargestAntenna = pEepData->modalHeader.antennaGainCh[0];
+-	twiceLargestAntenna = (int16_t)min(AntennaReduction -
+-					   twiceLargestAntenna, 0);
+-
+-	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
+-	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
+-		maxRegAllowedPower -=
+-			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
+-	}
+-
+-	scaledPower = min(powerLimit, maxRegAllowedPower);
+-	scaledPower = max((u16)0, scaledPower);
 -
- static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
- 					enum ath9k_ani_cmd cmd, int param)
++	scaledPower = powerLimit - antenna_reduction;
+ 	numCtlModes = ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40;
+ 	pCtlMode = ctlModesFor11g;
+ 
+@@ -671,7 +654,6 @@ static void ath9k_hw_4k_set_txpower(stru
+ 				    struct ath9k_channel *chan,
+ 				    u16 cfgCtl,
+ 				    u8 twiceAntennaReduction,
+-				    u8 twiceMaxRegulatoryPower,
+ 				    u8 powerLimit, bool test)
  {
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1496,14 +1496,16 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ 	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+@@ -691,7 +673,6 @@ static void ath9k_hw_4k_set_txpower(stru
+ 	ath9k_hw_set_4k_power_per_rate_table(ah, chan,
+ 					     &ratesArray[0], cfgCtl,
+ 					     twiceAntennaReduction,
+-					     twiceMaxRegulatoryPower,
+ 					     powerLimit);
+ 
+ 	ath9k_hw_set_4k_power_cal_table(ah, chan);
+--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+@@ -308,8 +308,6 @@ static u32 ath9k_hw_ar9287_get_eeprom(st
+ 		return get_unaligned_be16(pBase->macAddr + 4);
+ 	case EEP_REG_0:
+ 		return pBase->regDmn[0];
+-	case EEP_REG_1:
+-		return pBase->regDmn[1];
+ 	case EEP_OP_CAP:
+ 		return pBase->deviceCap;
+ 	case EEP_OP_MODE:
+@@ -336,6 +334,9 @@ static u32 ath9k_hw_ar9287_get_eeprom(st
+ 			return pBase->tempSensSlopePalOn;
+ 		else
+ 			return 0;
++	case EEP_ANTENNA_GAIN_2G:
++		return max_t(u8, pModal->antennaGainCh[0],
++				 pModal->antennaGainCh[1]);
+ 	default:
+ 		return 0;
  	}
- 	ah->noise = ath9k_hw_getchan_noise(ah, chan);
- 
-+	if ((AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI) ||
-+	    (AR_SREV_9300_20_OR_LATER(ah) && IS_CHAN_5GHZ(chan)))
-+		bChannelChange = false;
-+
- 	if (bChannelChange &&
- 	    (ah->chip_fullsleep != true) &&
- 	    (ah->curchan != NULL) &&
- 	    (chan->channel != ah->curchan->channel) &&
- 	    ((chan->channelFlags & CHANNEL_ALL) ==
--	     (ah->curchan->channelFlags & CHANNEL_ALL)) &&
--	    (!AR_SREV_9280(ah) || AR_DEVID_7010(ah))) {
+@@ -554,8 +555,7 @@ static void ath9k_hw_set_ar9287_power_pe
+ 						     struct ath9k_channel *chan,
+ 						     int16_t *ratesArray,
+ 						     u16 cfgCtl,
+-						     u16 AntennaReduction,
+-						     u16 twiceMaxRegulatoryPower,
++						     u16 antenna_reduction,
+ 						     u16 powerLimit)
+ {
+ #define CMP_CTL \
+@@ -569,12 +569,8 @@ static void ath9k_hw_set_ar9287_power_pe
+ #define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6
+ #define REDUCE_SCALED_POWER_BY_THREE_CHAIN   10
+ 
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
+-	static const u16 tpScaleReductionTable[5] =
+-		{ 0, 3, 6, 9, MAX_RATE_POWER };
+ 	int i;
+-	int16_t twiceLargestAntenna;
+ 	struct cal_ctl_data_ar9287 *rep;
+ 	struct cal_target_power_leg targetPowerOfdm = {0, {0, 0, 0, 0} },
+ 				    targetPowerCck = {0, {0, 0, 0, 0} };
+@@ -582,7 +578,7 @@ static void ath9k_hw_set_ar9287_power_pe
+ 				    targetPowerCckExt = {0, {0, 0, 0, 0} };
+ 	struct cal_target_power_ht targetPowerHt20,
+ 				    targetPowerHt40 = {0, {0, 0, 0, 0} };
+-	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
++	u16 scaledPower = 0, minCtlPower;
+ 	static const u16 ctlModesFor11g[] = {
+ 		CTL_11B, CTL_11G, CTL_2GHT20,
+ 		CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
+@@ -597,24 +593,7 @@ static void ath9k_hw_set_ar9287_power_pe
+ 	tx_chainmask = ah->txchainmask;
+ 
+ 	ath9k_hw_get_channel_centers(ah, chan, &centers);
+-
+-	/* Compute TxPower reduction due to Antenna Gain */
+-	twiceLargestAntenna = max(pEepData->modalHeader.antennaGainCh[0],
+-				  pEepData->modalHeader.antennaGainCh[1]);
+-	twiceLargestAntenna = (int16_t)min((AntennaReduction) -
+-					   twiceLargestAntenna, 0);
 -
-+	     (ah->curchan->channelFlags & CHANNEL_ALL))) {
- 		if (ath9k_hw_channel_change(ah, chan)) {
- 			ath9k_hw_loadnf(ah, ah->curchan);
- 			ath9k_hw_start_nfcal(ah, true);
---- a/drivers/net/wireless/ath/ath9k/hw.h
-+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -583,7 +583,6 @@ struct ath_hw_private_ops {
- 	bool (*rfbus_req)(struct ath_hw *ah);
- 	void (*rfbus_done)(struct ath_hw *ah);
- 	void (*restore_chainmask)(struct ath_hw *ah);
--	void (*set_diversity)(struct ath_hw *ah, bool value);
- 	u32 (*compute_pll_control)(struct ath_hw *ah,
- 				   struct ath9k_channel *chan);
- 	bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
-@@ -615,30 +614,10 @@ struct ath_hw_ops {
- 			  u8 rxchainmask,
- 			  bool longcal);
- 	bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked);
--	void (*fill_txdesc)(struct ath_hw *ah, void *ds, u32 seglen,
--			    bool is_firstseg, bool is_is_lastseg,
--			    const void *ds0, dma_addr_t buf_addr,
--			    unsigned int qcu);
-+	void (*set_txdesc)(struct ath_hw *ah, void *ds,
-+			   struct ath_tx_info *i);
- 	int (*proc_txdesc)(struct ath_hw *ah, void *ds,
- 			   struct ath_tx_status *ts);
--	void (*set11n_txdesc)(struct ath_hw *ah, void *ds,
--			      u32 pktLen, enum ath9k_pkt_type type,
--			      u32 txPower, u8 keyIx,
--			      enum ath9k_key_type keyType,
--			      u32 flags);
--	void (*set11n_ratescenario)(struct ath_hw *ah, void *ds,
--				void *lastds,
--				u32 durUpdateEn, u32 rtsctsRate,
--				u32 rtsctsDuration,
--				struct ath9k_11n_rate_series series[],
--				u32 nseries, u32 flags);
--	void (*set11n_aggr_first)(struct ath_hw *ah, void *ds,
--				  u32 aggrLen);
--	void (*set11n_aggr_middle)(struct ath_hw *ah, void *ds,
--				   u32 numDelims);
--	void (*set11n_aggr_last)(struct ath_hw *ah, void *ds);
--	void (*clr11n_aggr)(struct ath_hw *ah, void *ds);
--	void (*set_clrdmask)(struct ath_hw *ah, void *ds, bool val);
- 	void (*antdiv_comb_conf_get)(struct ath_hw *ah,
- 			struct ath_hw_antcomb_conf *antconf);
- 	void (*antdiv_comb_conf_set)(struct ath_hw *ah,
---- a/drivers/net/wireless/ath/ath9k/mac.c
-+++ b/drivers/net/wireless/ath/ath9k/mac.c
-@@ -62,18 +62,6 @@ void ath9k_hw_txstart(struct ath_hw *ah,
- }
- EXPORT_SYMBOL(ath9k_hw_txstart);
- 
--void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds)
--{
--	struct ar5416_desc *ads = AR5416DESC(ds);
+-	/*
+-	 * scaledPower is the minimum of the user input power level
+-	 * and the regulatory allowed power level.
+-	 */
+-	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
 -
--	ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
--	ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
--	ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
--	ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
--	ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
--}
--EXPORT_SYMBOL(ath9k_hw_cleartxdesc);
+-	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX)
+-		maxRegAllowedPower -=
+-			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
 -
- u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q)
- {
- 	u32 npend;
-@@ -596,7 +584,7 @@ int ath9k_hw_rxprocdesc(struct ath_hw *a
- 	else
- 		rs->rs_keyix = ATH9K_RXKEYIX_INVALID;
- 
--	rs->rs_rate = RXSTATUS_RATE(ah, (&ads));
-+	rs->rs_rate = MS(ads.ds_rxstatus0, AR_RxRate);
- 	rs->rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0;
+-	scaledPower = min(powerLimit, maxRegAllowedPower);
++	scaledPower = powerLimit - antenna_reduction;
  
- 	rs->rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0;
---- a/drivers/net/wireless/ath/ath9k/mac.h
-+++ b/drivers/net/wireless/ath/ath9k/mac.h
-@@ -17,10 +17,6 @@
- #ifndef MAC_H
- #define MAC_H
- 
--#define RXSTATUS_RATE(ah, ads) (AR_SREV_5416_20_OR_LATER(ah) ?		\
--				MS(ads->ds_rxstatus0, AR_RxRate) :	\
--				(ads->ds_rxstatus3 >> 2) & 0xFF)
+ 	/*
+ 	 * Reduce scaled Power by number of chains active
+@@ -815,7 +794,6 @@ static void ath9k_hw_set_ar9287_power_pe
+ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,
+ 					struct ath9k_channel *chan, u16 cfgCtl,
+ 					u8 twiceAntennaReduction,
+-					u8 twiceMaxRegulatoryPower,
+ 					u8 powerLimit, bool test)
+ {
+ 	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+@@ -834,7 +812,6 @@ static void ath9k_hw_ar9287_set_txpower(
+ 	ath9k_hw_set_ar9287_power_per_rate_table(ah, chan,
+ 						 &ratesArray[0], cfgCtl,
+ 						 twiceAntennaReduction,
+-						 twiceMaxRegulatoryPower,
+ 						 powerLimit);
+ 
+ 	ath9k_hw_set_ar9287_power_cal_table(ah, chan);
+--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
++++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
+@@ -400,6 +400,7 @@ static u32 ath9k_hw_def_get_eeprom(struc
+ 	struct ar5416_eeprom_def *eep = &ah->eeprom.def;
+ 	struct modal_eep_header *pModal = eep->modalHeader;
+ 	struct base_eep_header *pBase = &eep->baseEepHeader;
++	int band = 0;
+ 
+ 	switch (param) {
+ 	case EEP_NFTHRESH_5:
+@@ -414,8 +415,6 @@ static u32 ath9k_hw_def_get_eeprom(struc
+ 		return get_unaligned_be16(pBase->macAddr + 4);
+ 	case EEP_REG_0:
+ 		return pBase->regDmn[0];
+-	case EEP_REG_1:
+-		return pBase->regDmn[1];
+ 	case EEP_OP_CAP:
+ 		return pBase->deviceCap;
+ 	case EEP_OP_MODE:
+@@ -467,6 +466,14 @@ static u32 ath9k_hw_def_get_eeprom(struc
+ 			return pBase->pwr_table_offset;
+ 		else
+ 			return AR5416_PWR_TABLE_OFFSET_DB;
++	case EEP_ANTENNA_GAIN_2G:
++		band = 1;
++		/* fall through */
++	case EEP_ANTENNA_GAIN_5G:
++		return max_t(u8, max_t(u8,
++			pModal[band].antennaGainCh[0],
++			pModal[band].antennaGainCh[1]),
++			pModal[band].antennaGainCh[2]);
+ 	default:
+ 		return 0;
+ 	}
+@@ -986,21 +993,15 @@ static void ath9k_hw_set_def_power_per_r
+ 						  struct ath9k_channel *chan,
+ 						  int16_t *ratesArray,
+ 						  u16 cfgCtl,
+-						  u16 AntennaReduction,
+-						  u16 twiceMaxRegulatoryPower,
++						  u16 antenna_reduction,
+ 						  u16 powerLimit)
+ {
+ #define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6  /* 10*log10(2)*2 */
+ #define REDUCE_SCALED_POWER_BY_THREE_CHAIN   9 /* 10*log10(3)*2 */
+ 
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	struct ar5416_eeprom_def *pEepData = &ah->eeprom.def;
+ 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
+-	static const u16 tpScaleReductionTable[5] =
+-		{ 0, 3, 6, 9, MAX_RATE_POWER };
+-
+ 	int i;
+-	int16_t twiceLargestAntenna;
+ 	struct cal_ctl_data *rep;
+ 	struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
+ 		0, { 0, 0, 0, 0}
+@@ -1012,7 +1013,7 @@ static void ath9k_hw_set_def_power_per_r
+ 	struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = {
+ 		0, {0, 0, 0, 0}
+ 	};
+-	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
++	u16 scaledPower = 0, minCtlPower;
+ 	static const u16 ctlModesFor11a[] = {
+ 		CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
+ 	};
+@@ -1031,27 +1032,7 @@ static void ath9k_hw_set_def_power_per_r
+ 
+ 	ath9k_hw_get_channel_centers(ah, chan, &centers);
+ 
+-	twiceLargestAntenna = max(
+-		pEepData->modalHeader
+-			[IS_CHAN_2GHZ(chan)].antennaGainCh[0],
+-		pEepData->modalHeader
+-			[IS_CHAN_2GHZ(chan)].antennaGainCh[1]);
+-
+-	twiceLargestAntenna = max((u8)twiceLargestAntenna,
+-				  pEepData->modalHeader
+-				  [IS_CHAN_2GHZ(chan)].antennaGainCh[2]);
+-
+-	twiceLargestAntenna = (int16_t)min(AntennaReduction -
+-					   twiceLargestAntenna, 0);
+-
+-	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
+-
+-	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
+-		maxRegAllowedPower -=
+-			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
+-	}
 -
- #define set11nTries(_series, _index) \
- 	(SM((_series)[_index].Tries, AR_XmitDataTries##_index))
+-	scaledPower = min(powerLimit, maxRegAllowedPower);
++	scaledPower = powerLimit - antenna_reduction;
+ 
+ 	switch (ar5416_get_ntxchains(tx_chainmask)) {
+ 	case 1:
+@@ -1256,7 +1237,6 @@ static void ath9k_hw_def_set_txpower(str
+ 				    struct ath9k_channel *chan,
+ 				    u16 cfgCtl,
+ 				    u8 twiceAntennaReduction,
+-				    u8 twiceMaxRegulatoryPower,
+ 				    u8 powerLimit, bool test)
+ {
+ #define RT_AR_DELTA(x) (ratesArray[x] - cck_ofdm_delta)
+@@ -1278,7 +1258,6 @@ static void ath9k_hw_def_set_txpower(str
+ 	ath9k_hw_set_def_power_per_rate_table(ah, chan,
+ 					       &ratesArray[0], cfgCtl,
+ 					       twiceAntennaReduction,
+-					       twiceMaxRegulatoryPower,
+ 					       powerLimit);
+ 
+ 	ath9k_hw_set_def_power_cal_table(ah, chan);
+--- a/drivers/net/wireless/ath/ath9k/gpio.c
++++ b/drivers/net/wireless/ath/ath9k/gpio.c
+@@ -48,8 +48,8 @@ void ath_init_leds(struct ath_softc *sc)
+ 			sc->sc_ah->led_pin = ATH_LED_PIN_9485;
+ 		else if (AR_SREV_9300(sc->sc_ah))
+ 			sc->sc_ah->led_pin = ATH_LED_PIN_9300;
+-		else if (AR_SREV_9480(sc->sc_ah))
+-			sc->sc_ah->led_pin = ATH_LED_PIN_9480;
++		else if (AR_SREV_9462(sc->sc_ah))
++			sc->sc_ah->led_pin = ATH_LED_PIN_9462;
+ 		else
+ 			sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
+ 	}
+@@ -155,7 +155,7 @@ static void ath9k_gen_timer_start(struct
+ 	if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
+ 		ath9k_hw_disable_interrupts(ah);
+ 		ah->imask |= ATH9K_INT_GENTIMER;
+-		ath9k_hw_set_interrupts(ah, ah->imask);
++		ath9k_hw_set_interrupts(ah);
+ 		ath9k_hw_enable_interrupts(ah);
+ 	}
+ }
+@@ -170,7 +170,7 @@ static void ath9k_gen_timer_stop(struct 
+ 	if (timer_table->timer_mask.val == 0) {
+ 		ath9k_hw_disable_interrupts(ah);
+ 		ah->imask &= ~ATH9K_INT_GENTIMER;
+-		ath9k_hw_set_interrupts(ah, ah->imask);
++		ath9k_hw_set_interrupts(ah);
+ 		ath9k_hw_enable_interrupts(ah);
+ 	}
+ }
+--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
++++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
+@@ -205,4 +205,11 @@ static inline void ath9k_hw_setup_calibr
+ 	ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
+ }
  
-@@ -263,7 +259,11 @@ struct ath_desc {
- #define ATH9K_TXDESC_VMF		0x0100
- #define ATH9K_TXDESC_FRAG_IS_ON 	0x0200
- #define ATH9K_TXDESC_LOWRXCHAIN		0x0400
--#define ATH9K_TXDESC_LDPC		0x00010000
-+#define ATH9K_TXDESC_LDPC		0x0800
-+#define ATH9K_TXDESC_CLRDMASK		0x1000
-+
-+#define ATH9K_TXDESC_PAPRD		0x70000
-+#define ATH9K_TXDESC_PAPRD_S		16
++static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
++					    struct ath9k_channel *chan,
++					    u8 *ini_reloaded)
++{
++	return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
++							  ini_reloaded);
++}
+ #endif /* ATH9K_HW_OPS_H */
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -285,7 +285,7 @@ static void ath9k_hw_read_revisions(stru
+ 			(val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S;
+ 		ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
  
- #define ATH9K_RXDESC_INTREQ		0x0020
+-		if (AR_SREV_9480(ah))
++		if (AR_SREV_9462(ah))
+ 			ah->is_pciexpress = true;
+ 		else
+ 			ah->is_pciexpress = (val &
+@@ -433,7 +433,6 @@ static void ath9k_hw_init_defaults(struc
  
-@@ -659,6 +659,13 @@ struct ath9k_11n_rate_series {
- 	u32 RateFlags;
- };
+ 	regulatory->country_code = CTRY_DEFAULT;
+ 	regulatory->power_limit = MAX_RATE_POWER;
+-	regulatory->tp_scale = ATH9K_TP_SCALE_MAX;
  
-+enum aggr_type {
-+	AGGR_BUF_NONE,
-+	AGGR_BUF_FIRST,
-+	AGGR_BUF_MIDDLE,
-+	AGGR_BUF_LAST,
-+};
-+
- enum ath9k_key_type {
- 	ATH9K_KEY_TYPE_CLEAR,
- 	ATH9K_KEY_TYPE_WEP,
-@@ -666,6 +673,33 @@ enum ath9k_key_type {
- 	ATH9K_KEY_TYPE_TKIP,
- };
+ 	ah->hw_version.magic = AR5416_MAGIC;
+ 	ah->hw_version.subvendorid = 0;
+@@ -542,6 +541,9 @@ static int __ath9k_hw_init(struct ath_hw
+ 		return -EIO;
+ 	}
  
-+struct ath_tx_info {
-+	u8 qcu;
-+
-+	bool is_first;
-+	bool is_last;
++	if (AR_SREV_9462(ah))
++		ah->WARegVal &= ~AR_WA_D3_L1_DISABLE;
 +
-+	enum aggr_type aggr;
-+	u8 ndelim;
-+	u16 aggr_len;
+ 	ath9k_hw_init_defaults(ah);
+ 	ath9k_hw_init_config(ah);
+ 
+@@ -585,7 +587,7 @@ static int __ath9k_hw_init(struct ath_hw
+ 	case AR_SREV_VERSION_9330:
+ 	case AR_SREV_VERSION_9485:
+ 	case AR_SREV_VERSION_9340:
+-	case AR_SREV_VERSION_9480:
++	case AR_SREV_VERSION_9462:
+ 		break;
+ 	default:
+ 		ath_err(common,
+@@ -670,7 +672,7 @@ int ath9k_hw_init(struct ath_hw *ah)
+ 	case AR9300_DEVID_AR9330:
+ 	case AR9300_DEVID_AR9340:
+ 	case AR9300_DEVID_AR9580:
+-	case AR9300_DEVID_AR9480:
++	case AR9300_DEVID_AR9462:
+ 		break;
+ 	default:
+ 		if (common->bus_ops->ath_bus_type == ATH_USB)
+@@ -1389,11 +1391,17 @@ static bool ath9k_hw_chip_reset(struct a
+ static bool ath9k_hw_channel_change(struct ath_hw *ah,
+ 				    struct ath9k_channel *chan)
+ {
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
+ 	struct ath_common *common = ath9k_hw_common(ah);
+-	struct ieee80211_channel *channel = chan->chan;
+ 	u32 qnum;
+ 	int r;
++	bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
++	bool band_switch, mode_diff;
++	u8 ini_reloaded;
 +
-+	dma_addr_t link;
-+	int pkt_len;
-+	u32 flags;
++	band_switch = (chan->channelFlags & (CHANNEL_2GHZ | CHANNEL_5GHZ)) !=
++		      (ah->curchan->channelFlags & (CHANNEL_2GHZ |
++						    CHANNEL_5GHZ));
++	mode_diff = (chan->chanmode != ah->curchan->chanmode);
+ 
+ 	for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
+ 		if (ath9k_hw_numtxpending(ah, qnum)) {
+@@ -1408,6 +1416,18 @@ static bool ath9k_hw_channel_change(stru
+ 		return false;
+ 	}
+ 
++	if (edma && (band_switch || mode_diff)) {
++		ath9k_hw_mark_phy_inactive(ah);
++		udelay(5);
 +
-+	dma_addr_t buf_addr[4];
-+	int buf_len[4];
++		ath9k_hw_init_pll(ah, NULL);
 +
-+	struct ath9k_11n_rate_series rates[4];
-+	u8 rtscts_rate;
-+	bool dur_update;
++		if (ath9k_hw_fast_chan_change(ah, chan, &ini_reloaded)) {
++			ath_err(common, "Failed to do fast channel change\n");
++			return false;
++		}
++	}
 +
-+	enum ath9k_pkt_type type;
-+	enum ath9k_key_type keytype;
-+	u8 keyix;
-+	u8 txpower;
-+};
+ 	ath9k_hw_set_channel_regs(ah, chan);
+ 
+ 	r = ath9k_hw_rf_set_freq(ah, chan);
+@@ -1416,14 +1436,7 @@ static bool ath9k_hw_channel_change(stru
+ 		return false;
+ 	}
+ 	ath9k_hw_set_clockrate(ah);
+-
+-	ah->eep_ops->set_txpower(ah, chan,
+-			     ath9k_regd_get_ctl(regulatory, chan),
+-			     channel->max_antenna_gain * 2,
+-			     channel->max_power * 2,
+-			     min((u32) MAX_RATE_POWER,
+-			     (u32) regulatory->power_limit), false);
+-
++	ath9k_hw_apply_txpower(ah, chan);
+ 	ath9k_hw_rfbus_done(ah);
+ 
+ 	if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
+@@ -1431,6 +1444,18 @@ static bool ath9k_hw_channel_change(stru
+ 
+ 	ath9k_hw_spur_mitigate_freq(ah, chan);
+ 
++	if (edma && (band_switch || mode_diff)) {
++		ah->ah_flags |= AH_FASTCC;
++		if (band_switch || ini_reloaded)
++			ah->eep_ops->set_board_values(ah, chan);
 +
- struct ath_hw;
- struct ath9k_channel;
- enum ath9k_int;
-@@ -673,7 +707,6 @@ enum ath9k_int;
- u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q);
- void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp);
- void ath9k_hw_txstart(struct ath_hw *ah, u32 q);
--void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds);
- u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q);
- bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel);
- bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q);
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -111,24 +111,29 @@ void ath9k_ps_wakeup(struct ath_softc *s
- void ath9k_ps_restore(struct ath_softc *sc)
- {
- 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-+	enum ath9k_power_mode mode;
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&sc->sc_pm_lock, flags);
- 	if (--sc->ps_usecount != 0)
- 		goto unlock;
- 
--	spin_lock(&common->cc_lock);
--	ath_hw_cycle_counters_update(common);
--	spin_unlock(&common->cc_lock);
--
- 	if (sc->ps_idle)
--		ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
-+		mode = ATH9K_PM_FULL_SLEEP;
- 	else if (sc->ps_enabled &&
- 		 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
- 			      PS_WAIT_FOR_CAB |
- 			      PS_WAIT_FOR_PSPOLL_DATA |
- 			      PS_WAIT_FOR_TX_ACK)))
--		ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
-+		mode = ATH9K_PM_NETWORK_SLEEP;
-+	else
-+		goto unlock;
++		ath9k_hw_init_bb(ah, chan);
 +
-+	spin_lock(&common->cc_lock);
-+	ath_hw_cycle_counters_update(common);
-+	spin_unlock(&common->cc_lock);
++		if (band_switch || ini_reloaded)
++			ath9k_hw_init_cal(ah, chan);
++		ah->ah_flags &= ~AH_FASTCC;
++	}
 +
-+	ath9k_hw_setpower(sc->sc_ah, mode);
+ 	return true;
+ }
  
-  unlock:
- 	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
-@@ -247,8 +252,8 @@ static bool ath_prepare_reset(struct ath
+@@ -1486,6 +1511,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ 	u32 macStaId1;
+ 	u64 tsf = 0;
+ 	int i, r;
++	bool allow_fbs = false;
  
- 	if (!flush) {
- 		if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
--			ath_rx_tasklet(sc, 0, true);
--		ath_rx_tasklet(sc, 0, false);
-+			ath_rx_tasklet(sc, 1, true);
-+		ath_rx_tasklet(sc, 1, false);
- 	} else {
- 		ath_flushrecv(sc);
+ 	if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
+ 		return -EIO;
+@@ -1504,16 +1530,22 @@ int ath9k_hw_reset(struct ath_hw *ah, st
  	}
-@@ -669,15 +674,15 @@ void ath9k_tasklet(unsigned long data)
- 	u32 status = sc->intrstatus;
- 	u32 rxmask;
+ 	ah->noise = ath9k_hw_getchan_noise(ah, chan);
  
-+	ath9k_ps_wakeup(sc);
-+	spin_lock(&sc->sc_pcu_lock);
-+
- 	if ((status & ATH9K_INT_FATAL) ||
- 	    (status & ATH9K_INT_BB_WATCHDOG)) {
- 		ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
--		return;
-+		goto out;
- 	}
+-	if ((AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI) ||
+-	    (AR_SREV_9300_20_OR_LATER(ah) && IS_CHAN_5GHZ(chan)))
++	if (AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI)
+ 		bChannelChange = false;
  
--	ath9k_ps_wakeup(sc);
--	spin_lock(&sc->sc_pcu_lock);
--
- 	/*
- 	 * Only run the baseband hang check if beacons stop working in AP or
- 	 * IBSS mode, because it has a high false positive rate. For station
-@@ -725,6 +730,7 @@ void ath9k_tasklet(unsigned long data)
- 		if (status & ATH9K_INT_GENTIMER)
- 			ath_gen_timer_isr(sc->sc_ah);
- 
-+out:
- 	/* re-enable hardware interrupt */
- 	ath9k_hw_enable_interrupts(ah);
++	if (caldata &&
++	    caldata->done_txiqcal_once &&
++	    caldata->done_txclcal_once &&
++	    caldata->rtt_hist.num_readings)
++		allow_fbs = true;
++
+ 	if (bChannelChange &&
+ 	    (ah->chip_fullsleep != true) &&
+ 	    (ah->curchan != NULL) &&
+ 	    (chan->channel != ah->curchan->channel) &&
+-	    ((chan->channelFlags & CHANNEL_ALL) ==
+-	     (ah->curchan->channelFlags & CHANNEL_ALL))) {
++	    (allow_fbs ||
++	     ((chan->channelFlags & CHANNEL_ALL) ==
++	      (ah->curchan->channelFlags & CHANNEL_ALL)))) {
+ 		if (ath9k_hw_channel_change(ah, chan)) {
+ 			ath9k_hw_loadnf(ah, ah->curchan);
+ 			ath9k_hw_start_nfcal(ah, true);
+@@ -1684,6 +1716,11 @@ int ath9k_hw_reset(struct ath_hw *ah, st
  
-@@ -2015,6 +2021,7 @@ static void ath9k_config_bss(struct ath_
- 		/* Stop ANI */
- 		sc->sc_flags &= ~SC_OP_ANI_RUN;
- 		del_timer_sync(&common->ani.timer);
-+		memset(&sc->caldata, 0, sizeof(sc->caldata));
- 	}
- }
+ 	ath9k_hw_init_bb(ah, chan);
  
---- a/drivers/net/wireless/ath/ath9k/pci.c
-+++ b/drivers/net/wireless/ath/ath9k/pci.c
-@@ -332,16 +332,16 @@ static int ath_pci_resume(struct device 
- 	if ((val & 0x0000ff00) != 0)
- 		pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
- 
-+	ath9k_ps_wakeup(sc);
- 	/* Enable LED */
- 	ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
- 			    AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
--	ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
-+	ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
- 
- 	  /*
- 	   * Reset key cache to sane defaults (all entries cleared) instead of
- 	   * semi-random values after suspend/resume.
- 	   */
--	ath9k_ps_wakeup(sc);
- 	ath9k_cmn_init_crypto(sc->sc_ah);
- 	ath9k_ps_restore(sc);
++	if (caldata) {
++		caldata->done_txiqcal_once = false;
++		caldata->done_txclcal_once = false;
++		caldata->rtt_hist.num_readings = 0;
++	}
+ 	if (!ath9k_hw_init_cal(ah, chan))
+ 		return -EIO;
  
---- a/drivers/net/wireless/ath/ath9k/recv.c
-+++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -1839,7 +1839,7 @@ int ath_rx_tasklet(struct ath_softc *sc,
- 		 * If we're asked to flush receive queue, directly
- 		 * chain it back at the queue without processing it.
+@@ -1753,7 +1790,7 @@ static void ath9k_set_power_sleep(struct
+ {
+ 	REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
+ 	if (setChip) {
+-		if (AR_SREV_9480(ah)) {
++		if (AR_SREV_9462(ah)) {
+ 			REG_WRITE(ah, AR_TIMER_MODE,
+ 				  REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00);
+ 			REG_WRITE(ah, AR_NDP2_TIMER_MODE, REG_READ(ah,
+@@ -1771,7 +1808,7 @@ static void ath9k_set_power_sleep(struct
  		 */
--		if (flush)
-+		if (sc->sc_flags & SC_OP_RXFLUSH)
- 			goto requeue_drop_frag;
+ 		REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
  
- 		retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
-@@ -1967,7 +1967,8 @@ requeue:
- 		} else {
- 			list_move_tail(&bf->list, &sc->rx.rxbuf);
- 			ath_rx_buf_link(sc, bf);
--			ath9k_hw_rxena(ah);
-+			if (!flush)
-+				ath9k_hw_rxena(ah);
- 		}
- 	} while (1);
+-		if (AR_SREV_9480(ah))
++		if (AR_SREV_9462(ah))
+ 			udelay(100);
  
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -56,10 +56,9 @@ static void ath_tx_complete_buf(struct a
- 				struct ath_tx_status *ts, int txok, int sendbar);
- static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
- 			     struct list_head *head, bool internal);
--static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len);
- static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
- 			     struct ath_tx_status *ts, int nframes, int nbad,
--			     int txok, bool update_rc);
-+			     int txok);
- static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
- 			      int seqno);
- static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
-@@ -263,6 +262,7 @@ static void ath_tx_set_retry(struct ath_
- 			     struct sk_buff *skb)
- {
- 	struct ath_frame_info *fi = get_frame_info(skb);
-+	struct ath_buf *bf = fi->bf;
- 	struct ieee80211_hdr *hdr;
+ 		if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
+@@ -1779,15 +1816,14 @@ static void ath9k_set_power_sleep(struct
  
- 	TX_STAT_INC(txq->axq_qnum, a_retries);
-@@ -271,6 +271,8 @@ static void ath_tx_set_retry(struct ath_
+ 		/* Shutdown chip. Active low */
+ 		if (!AR_SREV_5416(ah) &&
+-				!AR_SREV_9271(ah) && !AR_SREV_9480_10(ah)) {
++				!AR_SREV_9271(ah) && !AR_SREV_9462_10(ah)) {
+ 			REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN);
+ 			udelay(2);
+ 		}
+ 	}
  
- 	hdr = (struct ieee80211_hdr *)skb->data;
- 	hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
-+	dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
-+		sizeof(*hdr), DMA_TO_DEVICE);
+ 	/* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */
+-	if (!AR_SREV_9480(ah))
+-		REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
++	REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
  }
  
- static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc)
-@@ -390,11 +392,9 @@ static void ath_tx_complete_aggr(struct 
- 		while (bf) {
- 			bf_next = bf->bf_next;
- 
--			bf->bf_state.bf_type |= BUF_XRETRY;
- 			if (!bf->bf_stale || bf_next != NULL)
- 				list_move_tail(&bf->list, &bf_head);
- 
--			ath_tx_rc_status(sc, bf, ts, 1, 1, 0, false);
- 			ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
- 				0, 0);
- 
-@@ -470,7 +470,6 @@ static void ath_tx_complete_aggr(struct 
- 				clear_filter = true;
- 				txpending = 1;
- 			} else {
--				bf->bf_state.bf_type |= BUF_XRETRY;
- 				txfail = 1;
- 				sendbar = 1;
- 				txfail_cnt++;
-@@ -497,17 +496,14 @@ static void ath_tx_complete_aggr(struct 
- 
- 			if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) {
- 				memcpy(tx_info->control.rates, rates, sizeof(rates));
--				ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok, true);
-+				ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok);
- 				rc_update = false;
--			} else {
--				ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok, false);
- 			}
- 
- 			ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
- 				!txfail, sendbar);
- 		} else {
- 			/* retry the un-acked ones */
--			ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, false);
- 			if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
- 				if (bf->bf_next == NULL && bf_last->bf_stale) {
- 					struct ath_buf *tbf;
-@@ -523,26 +519,13 @@ static void ath_tx_complete_aggr(struct 
- 						ath_tx_update_baw(sc, tid, seqno);
- 						spin_unlock_bh(&txq->axq_lock);
- 
--						bf->bf_state.bf_type |=
--							BUF_XRETRY;
--						ath_tx_rc_status(sc, bf, ts, nframes,
--								nbad, 0, false);
- 						ath_tx_complete_buf(sc, bf, txq,
- 								    &bf_head,
--								    ts, 0, 0);
-+								    ts, 0, 1);
- 						break;
- 					}
+ /*
+@@ -1818,7 +1854,7 @@ static void ath9k_set_power_network_slee
+ 			 * SYS_WAKING and SYS_SLEEPING messages which will make
+ 			 * BT CPU to busy to process.
+ 			 */
+-			if (AR_SREV_9480(ah)) {
++			if (AR_SREV_9462(ah)) {
+ 				val = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_EN) &
+ 					~AR_MCI_INTERRUPT_RX_HW_MSG_MASK;
+ 				REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, val);
+@@ -1830,7 +1866,7 @@ static void ath9k_set_power_network_slee
+ 			REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,
+ 				    AR_RTC_FORCE_WAKE_EN);
+ 
+-			if (AR_SREV_9480(ah))
++			if (AR_SREV_9462(ah))
+ 				udelay(30);
+ 		}
+ 	}
+@@ -2082,11 +2118,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw
+ 	eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
+ 	regulatory->current_rd = eeval;
+ 
+-	eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1);
+-	if (AR_SREV_9285_12_OR_LATER(ah))
+-		eeval |= AR9285_RDEXT_DEFAULT;
+-	regulatory->current_rd_ext = eeval;
+-
+ 	if (ah->opmode != NL80211_IFTYPE_AP &&
+ 	    ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) {
+ 		if (regulatory->current_rd == 0x64 ||
+@@ -2294,6 +2325,14 @@ int ath9k_hw_fill_cap_info(struct ath_hw
+ 		rx_chainmask >>= 1;
+ 	}
  
--					ath9k_hw_cleartxdesc(sc->sc_ah,
--							     tbf->bf_desc);
- 					fi->bf = tbf;
--				} else {
--					/*
--					 * Clear descriptor status words for
--					 * software retry
--					 */
--					ath9k_hw_cleartxdesc(sc->sc_ah,
--							     bf->bf_desc);
- 				}
- 			}
- 
-@@ -778,7 +761,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- 		if (!bf)
- 			continue;
++	if (AR_SREV_9300_20_OR_LATER(ah)) {
++		ah->enabled_cals |= TX_IQ_CAL;
++		if (!AR_SREV_9330(ah))
++			ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
++	}
++	if (AR_SREV_9462(ah))
++		pCap->hw_caps |= ATH9K_HW_CAP_RTT;
++
+ 	return 0;
+ }
  
--		bf->bf_state.bf_type |= BUF_AMPDU;
-+		bf->bf_state.bf_type = BUF_AMPDU | BUF_AGGR;
- 		seqno = bf->bf_state.seqno;
- 		if (!bf_first)
- 			bf_first = bf;
-@@ -805,8 +788,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- 		}
+@@ -2454,7 +2493,7 @@ void ath9k_hw_setrxfilter(struct ath_hw 
  
- 		tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
--		if (nframes && ((tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) ||
--			!(tx_info->control.rates[0].flags & IEEE80211_TX_RC_MCS)))
-+		if (nframes && (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
- 			break;
+ 	ENABLE_REGWRITE_BUFFER(ah);
  
- 		/* do not exceed subframe limit */
-@@ -828,20 +810,17 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- 
- 		nframes++;
- 		bf->bf_next = NULL;
--		ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0);
- 
- 		/* link buffers of this frame to the aggregate */
- 		if (!fi->retries)
- 			ath_tx_addto_baw(sc, tid, seqno);
--		ath9k_hw_set11n_aggr_middle(sc->sc_ah, bf->bf_desc, ndelim);
-+		bf->bf_state.ndelim = ndelim;
- 
- 		__skb_unlink(skb, &tid->buf_q);
- 		list_add_tail(&bf->list, bf_q);
--		if (bf_prev) {
-+		if (bf_prev)
- 			bf_prev->bf_next = bf;
--			ath9k_hw_set_desc_link(sc->sc_ah, bf_prev->bf_desc,
--					       bf->bf_daddr);
--		}
-+
- 		bf_prev = bf;
+-	if (AR_SREV_9480(ah))
++	if (AR_SREV_9462(ah))
+ 		bits |= ATH9K_RX_FILTER_CONTROL_WRAPPER;
  
- 	} while (!skb_queue_empty(&tid->buf_q));
-@@ -852,12 +831,245 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- #undef PADBYTES
+ 	REG_WRITE(ah, AR_RX_FILTER, bits);
+@@ -2498,23 +2537,56 @@ bool ath9k_hw_disable(struct ath_hw *ah)
  }
+ EXPORT_SYMBOL(ath9k_hw_disable);
  
-+/*
-+ * rix - rate index
-+ * pktlen - total bytes (delims + data + fcs + pads + pad delims)
-+ * width  - 0 for 20 MHz, 1 for 40 MHz
-+ * half_gi - to use 4us v/s 3.6 us for symbol time
-+ */
-+static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
-+			    int width, int half_gi, bool shortPreamble)
++static int get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan)
 +{
-+	u32 nbits, nsymbits, duration, nsymbols;
-+	int streams;
++	enum eeprom_param gain_param;
 +
-+	/* find number of symbols: PLCP + data */
-+	streams = HT_RC_2_STREAMS(rix);
-+	nbits = (pktlen << 3) + OFDM_PLCP_BITS;
-+	nsymbits = bits_per_symbol[rix % 8][width] * streams;
-+	nsymbols = (nbits + nsymbits - 1) / nsymbits;
-+
-+	if (!half_gi)
-+		duration = SYMBOL_TIME(nsymbols);
++	if (IS_CHAN_2GHZ(chan))
++		gain_param = EEP_ANTENNA_GAIN_2G;
 +	else
-+		duration = SYMBOL_TIME_HALFGI(nsymbols);
-+
-+	/* addup duration for legacy/ht training and signal fields */
-+	duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
++		gain_param = EEP_ANTENNA_GAIN_5G;
 +
-+	return duration;
++	return ah->eep_ops->get_eeprom(ah, gain_param);
 +}
 +
-+static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
-+			     struct ath_tx_info *info, int len)
++void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan)
 +{
-+	struct ath_hw *ah = sc->sc_ah;
-+	struct sk_buff *skb;
-+	struct ieee80211_tx_info *tx_info;
-+	struct ieee80211_tx_rate *rates;
-+	const struct ieee80211_rate *rate;
-+	struct ieee80211_hdr *hdr;
-+	int i;
-+	u8 rix = 0;
-+
-+	skb = bf->bf_mpdu;
-+	tx_info = IEEE80211_SKB_CB(skb);
-+	rates = tx_info->control.rates;
-+	hdr = (struct ieee80211_hdr *)skb->data;
-+
-+	/* set dur_update_en for l-sig computation except for PS-Poll frames */
-+	info->dur_update = !ieee80211_is_pspoll(hdr->frame_control);
-+
-+	/*
-+	 * We check if Short Preamble is needed for the CTS rate by
-+	 * checking the BSS's global flag.
-+	 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
-+	 */
-+	rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
-+	info->rtscts_rate = rate->hw_value;
-+	if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
-+		info->rtscts_rate |= rate->hw_value_short;
-+
-+	for (i = 0; i < 4; i++) {
-+		bool is_40, is_sgi, is_sp;
-+		int phy;
-+
-+		if (!rates[i].count || (rates[i].idx < 0))
-+			continue;
++	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
++	struct ieee80211_channel *channel;
++	int chan_pwr, new_pwr, max_gain;
++	int ant_gain, ant_reduction = 0;
 +
-+		rix = rates[i].idx;
-+		info->rates[i].Tries = rates[i].count;
-+
-+		    if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
-+			info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
-+			info->flags |= ATH9K_TXDESC_RTSENA;
-+		} else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
-+			info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
-+			info->flags |= ATH9K_TXDESC_CTSENA;
-+		}
-+
-+		if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
-+			info->rates[i].RateFlags |= ATH9K_RATESERIES_2040;
-+		if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
-+			info->rates[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
-+
-+		is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
-+		is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
-+		is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
-+
-+		if (rates[i].flags & IEEE80211_TX_RC_MCS) {
-+			/* MCS rates */
-+			info->rates[i].Rate = rix | 0x80;
-+			info->rates[i].ChSel = ath_txchainmask_reduction(sc,
-+					ah->txchainmask, info->rates[i].Rate);
-+			info->rates[i].PktDuration = ath_pkt_duration(sc, rix, len,
-+				 is_40, is_sgi, is_sp);
-+			if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
-+				info->rates[i].RateFlags |= ATH9K_RATESERIES_STBC;
-+			continue;
-+		}
-+
-+		/* legacy rates */
-+		if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
-+		    !(rate->flags & IEEE80211_RATE_ERP_G))
-+			phy = WLAN_RC_PHY_CCK;
-+		else
-+			phy = WLAN_RC_PHY_OFDM;
-+
-+		rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
-+		info->rates[i].Rate = rate->hw_value;
-+		if (rate->hw_value_short) {
-+			if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
-+				info->rates[i].Rate |= rate->hw_value_short;
-+		} else {
-+			is_sp = false;
-+		}
-+
-+		if (bf->bf_state.bfs_paprd)
-+			info->rates[i].ChSel = ah->txchainmask;
-+		else
-+			info->rates[i].ChSel = ath_txchainmask_reduction(sc,
-+					ah->txchainmask, info->rates[i].Rate);
++	if (!chan)
++		return;
 +
-+		info->rates[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
-+			phy, rate->bitrate * 100, len, rix, is_sp);
-+	}
++	channel = chan->chan;
++	chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER);
++	new_pwr = min_t(int, chan_pwr, reg->power_limit);
++	max_gain = chan_pwr - new_pwr + channel->max_antenna_gain * 2;
 +
-+	/* For AR5416 - RTS cannot be followed by a frame larger than 8K */
-+	if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit))
-+		info->flags &= ~ATH9K_TXDESC_RTSENA;
++	ant_gain = get_antenna_gain(ah, chan);
++	if (ant_gain > max_gain)
++		ant_reduction = ant_gain - max_gain;
 +
-+	/* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
-+	if (info->flags & ATH9K_TXDESC_RTSENA)
-+		info->flags &= ~ATH9K_TXDESC_CTSENA;
++	ah->eep_ops->set_txpower(ah, chan,
++				 ath9k_regd_get_ctl(reg, chan),
++				 ant_reduction, new_pwr, false);
 +}
 +
-+static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
-+{
-+	struct ieee80211_hdr *hdr;
-+	enum ath9k_pkt_type htype;
-+	__le16 fc;
-+
-+	hdr = (struct ieee80211_hdr *)skb->data;
-+	fc = hdr->frame_control;
-+
-+	if (ieee80211_is_beacon(fc))
-+		htype = ATH9K_PKT_TYPE_BEACON;
-+	else if (ieee80211_is_probe_resp(fc))
-+		htype = ATH9K_PKT_TYPE_PROBE_RESP;
-+	else if (ieee80211_is_atim(fc))
-+		htype = ATH9K_PKT_TYPE_ATIM;
-+	else if (ieee80211_is_pspoll(fc))
-+		htype = ATH9K_PKT_TYPE_PSPOLL;
-+	else
-+		htype = ATH9K_PKT_TYPE_NORMAL;
-+
-+	return htype;
-+}
-+
-+static void ath_tx_fill_desc(struct ath_softc *sc, struct ath_buf *bf,
-+			     struct ath_txq *txq, int len)
-+{
-+	struct ath_hw *ah = sc->sc_ah;
-+	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-+	struct ath_buf *bf_first = bf;
-+	struct ath_tx_info info;
-+	bool aggr = !!(bf->bf_state.bf_type & BUF_AGGR);
-+
-+	memset(&info, 0, sizeof(info));
-+	info.is_first = true;
-+	info.is_last = true;
-+	info.txpower = MAX_RATE_POWER;
-+	info.qcu = txq->axq_qnum;
-+
-+	info.flags = ATH9K_TXDESC_INTREQ;
-+	if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
-+		info.flags |= ATH9K_TXDESC_NOACK;
-+	if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
-+		info.flags |= ATH9K_TXDESC_LDPC;
-+
-+	ath_buf_set_rate(sc, bf, &info, len);
-+
-+	if (tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
-+		info.flags |= ATH9K_TXDESC_CLRDMASK;
-+
-+	if (bf->bf_state.bfs_paprd)
-+		info.flags |= (u32) bf->bf_state.bfs_paprd << ATH9K_TXDESC_PAPRD_S;
-+
-+
-+	while (bf) {
-+		struct sk_buff *skb = bf->bf_mpdu;
-+		struct ath_frame_info *fi = get_frame_info(skb);
-+		struct ieee80211_hdr *hdr;
-+		int padpos, padsize;
-+
-+		info.type = get_hw_packet_type(skb);
-+		if (bf->bf_next)
-+			info.link = bf->bf_next->bf_daddr;
-+		else
-+			info.link = 0;
-+
-+		if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
-+			hdr = (struct ieee80211_hdr *)skb->data;
-+			padpos = ath9k_cmn_padpos(hdr->frame_control);
-+			padsize = padpos & 3;
-+
-+			info.buf_addr[0] = bf->bf_buf_addr;
-+			info.buf_len[0] = padpos + padsize;
-+			info.buf_addr[1] = info.buf_addr[0] + padpos;
-+			info.buf_len[1] = skb->len - padpos;
-+		} else {
-+			info.buf_addr[0] = bf->bf_buf_addr;
-+			info.buf_len[0] = skb->len;
-+		}
-+
-+		info.pkt_len = fi->framelen;
-+		info.keyix = fi->keyix;
-+		info.keytype = fi->keytype;
-+
-+		if (aggr) {
-+			if (bf == bf_first)
-+				info.aggr = AGGR_BUF_FIRST;
-+			else if (!bf->bf_next)
-+				info.aggr = AGGR_BUF_LAST;
-+			else
-+				info.aggr = AGGR_BUF_MIDDLE;
-+
-+			info.ndelim = bf->bf_state.ndelim;
-+			info.aggr_len = len;
-+		}
+ void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
+ {
+-	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
++	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
+ 	struct ath9k_channel *chan = ah->curchan;
+ 	struct ieee80211_channel *channel = chan->chan;
+-	int reg_pwr = min_t(int, MAX_RATE_POWER, limit);
+-	int chan_pwr = channel->max_power * 2;
+ 
++	reg->power_limit = min_t(int, limit, MAX_RATE_POWER);
+ 	if (test)
+-		reg_pwr = chan_pwr = MAX_RATE_POWER;
++		channel->max_power = MAX_RATE_POWER / 2;
+ 
+-	regulatory->power_limit = reg_pwr;
++	ath9k_hw_apply_txpower(ah, chan);
+ 
+-	ah->eep_ops->set_txpower(ah, chan,
+-				 ath9k_regd_get_ctl(regulatory, chan),
+-				 channel->max_antenna_gain * 2,
+-				 chan_pwr, reg_pwr, test);
++	if (test)
++		channel->max_power = DIV_ROUND_UP(reg->max_power_level, 2);
+ }
+ EXPORT_SYMBOL(ath9k_hw_set_txpowerlimit);
+ 
+@@ -2713,9 +2785,9 @@ void ath9k_hw_gen_timer_start(struct ath
+ 	REG_SET_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
+ 		    gen_tmr_configuration[timer->index].mode_mask);
+ 
+-	if (AR_SREV_9480(ah)) {
++	if (AR_SREV_9462(ah)) {
+ 		/*
+-		 * Starting from AR9480, each generic timer can select which tsf
++		 * Starting from AR9462, each generic timer can select which tsf
+ 		 * to use. But we still follow the old rule, 0 - 7 use tsf and
+ 		 * 8 - 15  use tsf2.
+ 		 */
+@@ -2832,7 +2904,7 @@ static struct {
+ 	{ AR_SREV_VERSION_9330,         "9330" },
+ 	{ AR_SREV_VERSION_9340,		"9340" },
+ 	{ AR_SREV_VERSION_9485,         "9485" },
+-	{ AR_SREV_VERSION_9480,         "9480" },
++	{ AR_SREV_VERSION_9462,         "9462" },
+ };
+ 
+ /* For devices with external radios */
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -46,7 +46,7 @@
+ #define AR9300_DEVID_AR9340	0x0031
+ #define AR9300_DEVID_AR9485_PCIE 0x0032
+ #define AR9300_DEVID_AR9580	0x0033
+-#define AR9300_DEVID_AR9480	0x0034
++#define AR9300_DEVID_AR9462	0x0034
+ #define AR9300_DEVID_AR9330	0x0035
+ 
+ #define AR5416_AR9100_DEVID	0x000b
+@@ -202,6 +202,7 @@ enum ath9k_hw_caps {
+ 	ATH9K_HW_CAP_2GHZ			= BIT(13),
+ 	ATH9K_HW_CAP_5GHZ			= BIT(14),
+ 	ATH9K_HW_CAP_APM			= BIT(15),
++	ATH9K_HW_CAP_RTT			= BIT(16),
+ };
+ 
+ struct ath9k_hw_capabilities {
+@@ -337,6 +338,16 @@ enum ath9k_int {
+ 	 CHANNEL_HT40PLUS |			\
+ 	 CHANNEL_HT40MINUS)
+ 
++#define MAX_RTT_TABLE_ENTRY     6
++#define RTT_HIST_MAX            3
++struct ath9k_rtt_hist {
++	u32 table[AR9300_MAX_CHAINS][RTT_HIST_MAX][MAX_RTT_TABLE_ENTRY];
++	u8 num_readings;
++};
 +
-+		ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
-+		bf = bf->bf_next;
-+	}
-+}
++#define MAX_IQCAL_MEASUREMENT	8
++#define MAX_CL_TAB_ENTRY	16
 +
- static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
- 			      struct ath_atx_tid *tid)
- {
- 	struct ath_buf *bf;
- 	enum ATH_AGGR_STATUS status;
--	struct ath_frame_info *fi;
-+	struct ieee80211_tx_info *tx_info;
- 	struct list_head bf_q;
- 	int aggr_len;
- 
-@@ -878,34 +1090,25 @@ static void ath_tx_sched_aggr(struct ath
- 
- 		bf = list_first_entry(&bf_q, struct ath_buf, list);
- 		bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list);
-+		tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
- 
- 		if (tid->ac->clear_ps_filter) {
- 			tid->ac->clear_ps_filter = false;
--			ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, true);
-+			tx_info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT;
-+		} else {
-+			tx_info->flags &= ~IEEE80211_TX_CTL_CLEAR_PS_FILT;
- 		}
+ struct ath9k_hw_cal_data {
+ 	u16 channel;
+ 	u32 channelFlags;
+@@ -346,9 +357,15 @@ struct ath9k_hw_cal_data {
+ 	bool paprd_done;
+ 	bool nfcal_pending;
+ 	bool nfcal_interference;
++	bool done_txiqcal_once;
++	bool done_txclcal_once;
+ 	u16 small_signal_gain[AR9300_MAX_CHAINS];
+ 	u32 pa_table[AR9300_MAX_CHAINS][PAPRD_TABLE_SZ];
++	u32 num_measures[AR9300_MAX_CHAINS];
++	int tx_corr_coeff[MAX_IQCAL_MEASUREMENT][AR9300_MAX_CHAINS];
++	u32 tx_clcal[AR9300_MAX_CHAINS][MAX_CL_TAB_ENTRY];
+ 	struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
++	struct ath9k_rtt_hist rtt_hist;
+ };
  
- 		/* if only one frame, send as non-aggregate */
- 		if (bf == bf->bf_lastbf) {
--			fi = get_frame_info(bf->bf_mpdu);
--
--			bf->bf_state.bf_type &= ~BUF_AGGR;
--			ath9k_hw_clr11n_aggr(sc->sc_ah, bf->bf_desc);
--			ath_buf_set_rate(sc, bf, fi->framelen);
--			ath_tx_txqaddbuf(sc, txq, &bf_q, false);
--			continue;
-+			aggr_len = get_frame_info(bf->bf_mpdu)->framelen;
-+			bf->bf_state.bf_type = BUF_AMPDU;
-+		} else {
-+			TX_STAT_INC(txq->axq_qnum, a_aggr);
- 		}
+ struct ath9k_channel {
+@@ -390,14 +407,6 @@ enum ath9k_power_mode {
+ 	ATH9K_PM_UNDEFINED
+ };
  
--		/* setup first desc of aggregate */
--		bf->bf_state.bf_type |= BUF_AGGR;
--		ath_buf_set_rate(sc, bf, aggr_len);
--		ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, aggr_len);
--
--		/* anchor last desc of aggregate */
--		ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc);
--
-+		ath_tx_fill_desc(sc, bf, txq, aggr_len);
- 		ath_tx_txqaddbuf(sc, txq, &bf_q, false);
--		TX_STAT_INC(txq->axq_qnum, a_aggr);
--
- 	} while (txq->axq_ampdu_depth < ATH_AGGR_MIN_QDEPTH &&
- 		 status != ATH_AGGR_BAW_CLOSED);
- }
-@@ -1483,7 +1686,7 @@ static void ath_tx_send_ampdu(struct ath
- 	if (!bf)
- 		return;
+-enum ath9k_tp_scale {
+-	ATH9K_TP_SCALE_MAX = 0,
+-	ATH9K_TP_SCALE_50,
+-	ATH9K_TP_SCALE_25,
+-	ATH9K_TP_SCALE_12,
+-	ATH9K_TP_SCALE_MIN
+-};
+-
+ enum ser_reg_mode {
+ 	SER_REG_MODE_OFF = 0,
+ 	SER_REG_MODE_ON = 1,
+@@ -591,6 +600,8 @@ struct ath_hw_private_ops {
+ 	void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
+ 	void (*set_radar_params)(struct ath_hw *ah,
+ 				 struct ath_hw_radar_conf *conf);
++	int (*fast_chan_change)(struct ath_hw *ah, struct ath9k_channel *chan,
++				u8 *ini_reloaded);
+ 
+ 	/* ANI */
+ 	void (*ani_cache_ini_regs)(struct ath_hw *ah);
+@@ -632,9 +643,16 @@ struct ath_nf_limits {
+ 	s16 nominal;
+ };
  
--	bf->bf_state.bf_type |= BUF_AMPDU;
-+	bf->bf_state.bf_type = BUF_AMPDU;
- 	INIT_LIST_HEAD(&bf_head);
- 	list_add(&bf->list, &bf_head);
- 
-@@ -1493,7 +1696,7 @@ static void ath_tx_send_ampdu(struct ath
- 	/* Queue to h/w without aggregation */
- 	TX_STAT_INC(txctl->txq->axq_qnum, a_queued_hw);
- 	bf->bf_lastbf = bf;
--	ath_buf_set_rate(sc, bf, fi->framelen);
-+	ath_tx_fill_desc(sc, bf, txctl->txq, fi->framelen);
- 	ath_tx_txqaddbuf(sc, txctl->txq, &bf_head, false);
++enum ath_cal_list {
++	TX_IQ_CAL         =	BIT(0),
++	TX_IQ_ON_AGC_CAL  =	BIT(1),
++	TX_CL_CAL         =	BIT(2),
++};
++
+ /* ah_flags */
+ #define AH_USE_EEPROM   0x1
+ #define AH_UNPLUGGED    0x2 /* The card has been physically removed. */
++#define AH_FASTCC       0x4
+ 
+ struct ath_hw {
+ 	struct ath_ops reg_ops;
+@@ -692,6 +710,7 @@ struct ath_hw {
+ 	atomic_t intr_ref_cnt;
+ 	bool chip_fullsleep;
+ 	u32 atim_window;
++	u32 modes_index;
+ 
+ 	/* Calibration */
+ 	u32 supp_cals;
+@@ -730,6 +749,7 @@ struct ath_hw {
+ 		int32_t sign[AR5416_MAX_CHAINS];
+ 	} meas3;
+ 	u16 cal_samples;
++	u8 enabled_cals;
+ 
+ 	u32 sta_id1_defaults;
+ 	u32 misc_mode;
+@@ -968,6 +988,7 @@ void ath9k_hw_htc_resetinit(struct ath_h
+ /* PHY */
+ void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
+ 				   u32 *coef_mantissa, u32 *coef_exponent);
++void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan);
+ 
+ /*
+  * Code Specific to AR5008, AR9001 or AR9002,
+--- a/drivers/net/wireless/ath/ath9k/init.c
++++ b/drivers/net/wireless/ath/ath9k/init.c
+@@ -626,7 +626,6 @@ static void ath9k_init_band_txpower(stru
+ 	struct ieee80211_supported_band *sband;
+ 	struct ieee80211_channel *chan;
+ 	struct ath_hw *ah = sc->sc_ah;
+-	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
+ 	int i;
+ 
+ 	sband = &sc->sbands[band];
+@@ -635,7 +634,6 @@ static void ath9k_init_band_txpower(stru
+ 		ah->curchan = &ah->channels[chan->hw_value];
+ 		ath9k_cmn_update_ichannel(ah->curchan, chan, NL80211_CHAN_HT20);
+ 		ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true);
+-		chan->max_power = reg->max_power_level / 2;
+ 	}
  }
  
-@@ -1513,41 +1716,18 @@ static void ath_tx_send_normal(struct at
+--- a/drivers/net/wireless/ath/ath9k/mac.c
++++ b/drivers/net/wireless/ath/ath9k/mac.c
+@@ -620,8 +620,8 @@ int ath9k_hw_rxprocdesc(struct ath_hw *a
+ 			rs->rs_status |= ATH9K_RXERR_DECRYPT;
+ 		else if (ads.ds_rxstatus8 & AR_MichaelErr)
+ 			rs->rs_status |= ATH9K_RXERR_MIC;
+-		else if (ads.ds_rxstatus8 & AR_KeyMiss)
+-			rs->rs_status |= ATH9K_RXERR_DECRYPT;
++		if (ads.ds_rxstatus8 & AR_KeyMiss)
++			rs->rs_status |= ATH9K_RXERR_KEYMISS;
+ 	}
  
- 	INIT_LIST_HEAD(&bf_head);
- 	list_add_tail(&bf->list, &bf_head);
--	bf->bf_state.bf_type &= ~BUF_AMPDU;
-+	bf->bf_state.bf_type = 0;
- 
- 	/* update starting sequence number for subsequent ADDBA request */
- 	if (tid)
- 		INCR(tid->seq_start, IEEE80211_SEQ_MAX);
- 
- 	bf->bf_lastbf = bf;
--	ath_buf_set_rate(sc, bf, fi->framelen);
-+	ath_tx_fill_desc(sc, bf, txq, fi->framelen);
- 	ath_tx_txqaddbuf(sc, txq, &bf_head, false);
- 	TX_STAT_INC(txq->axq_qnum, queued);
+ 	return 0;
+@@ -827,9 +827,9 @@ void ath9k_hw_enable_interrupts(struct a
  }
+ EXPORT_SYMBOL(ath9k_hw_enable_interrupts);
  
--static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
--{
--	struct ieee80211_hdr *hdr;
--	enum ath9k_pkt_type htype;
--	__le16 fc;
--
--	hdr = (struct ieee80211_hdr *)skb->data;
--	fc = hdr->frame_control;
--
--	if (ieee80211_is_beacon(fc))
--		htype = ATH9K_PKT_TYPE_BEACON;
--	else if (ieee80211_is_probe_resp(fc))
--		htype = ATH9K_PKT_TYPE_PROBE_RESP;
--	else if (ieee80211_is_atim(fc))
--		htype = ATH9K_PKT_TYPE_ATIM;
--	else if (ieee80211_is_pspoll(fc))
--		htype = ATH9K_PKT_TYPE_PSPOLL;
--	else
--		htype = ATH9K_PKT_TYPE_NORMAL;
--
--	return htype;
--}
--
- static void setup_frame_info(struct ieee80211_hw *hw, struct sk_buff *skb,
- 			     int framelen)
+-void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
++void ath9k_hw_set_interrupts(struct ath_hw *ah)
  {
-@@ -1575,51 +1755,6 @@ static void setup_frame_info(struct ieee
- 	fi->framelen = framelen;
- }
+-	enum ath9k_int omask = ah->imask;
++	enum ath9k_int ints = ah->imask;
+ 	u32 mask, mask2;
+ 	struct ath9k_hw_capabilities *pCap = &ah->caps;
+ 	struct ath_common *common = ath9k_hw_common(ah);
+@@ -837,7 +837,7 @@ void ath9k_hw_set_interrupts(struct ath_
+ 	if (!(ints & ATH9K_INT_GLOBAL))
+ 		ath9k_hw_disable_interrupts(ah);
  
--static int setup_tx_flags(struct sk_buff *skb)
--{
--	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
--	int flags = 0;
--
--	flags |= ATH9K_TXDESC_INTREQ;
--
--	if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
--		flags |= ATH9K_TXDESC_NOACK;
--
--	if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
--		flags |= ATH9K_TXDESC_LDPC;
--
--	return flags;
--}
--
--/*
-- * rix - rate index
-- * pktlen - total bytes (delims + data + fcs + pads + pad delims)
-- * width  - 0 for 20 MHz, 1 for 40 MHz
-- * half_gi - to use 4us v/s 3.6 us for symbol time
-- */
--static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
--			    int width, int half_gi, bool shortPreamble)
--{
--	u32 nbits, nsymbits, duration, nsymbols;
--	int streams;
--
--	/* find number of symbols: PLCP + data */
--	streams = HT_RC_2_STREAMS(rix);
--	nbits = (pktlen << 3) + OFDM_PLCP_BITS;
--	nsymbits = bits_per_symbol[rix % 8][width] * streams;
--	nsymbols = (nbits + nsymbits - 1) / nsymbits;
--
--	if (!half_gi)
--		duration = SYMBOL_TIME(nsymbols);
--	else
--		duration = SYMBOL_TIME_HALFGI(nsymbols);
--
--	/* addup duration for legacy/ht training and signal fields */
--	duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
--
--	return duration;
--}
--
- u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate)
- {
- 	struct ath_hw *ah = sc->sc_ah;
-@@ -1632,118 +1767,6 @@ u8 ath_txchainmask_reduction(struct ath_
- 		return chainmask;
- }
+-	ath_dbg(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
++	ath_dbg(common, ATH_DBG_INTERRUPT, "New interrupt mask 0x%x\n", ints);
  
--static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len)
--{
--	struct ath_hw *ah = sc->sc_ah;
--	struct ath9k_11n_rate_series series[4];
--	struct sk_buff *skb;
--	struct ieee80211_tx_info *tx_info;
--	struct ieee80211_tx_rate *rates;
--	const struct ieee80211_rate *rate;
--	struct ieee80211_hdr *hdr;
--	int i, flags = 0;
--	u8 rix = 0, ctsrate = 0;
--	bool is_pspoll;
--
--	memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
--
--	skb = bf->bf_mpdu;
--	tx_info = IEEE80211_SKB_CB(skb);
--	rates = tx_info->control.rates;
--	hdr = (struct ieee80211_hdr *)skb->data;
--	is_pspoll = ieee80211_is_pspoll(hdr->frame_control);
--
--	/*
--	 * We check if Short Preamble is needed for the CTS rate by
--	 * checking the BSS's global flag.
--	 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
--	 */
--	rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
--	ctsrate = rate->hw_value;
--	if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
--		ctsrate |= rate->hw_value_short;
--
--	for (i = 0; i < 4; i++) {
--		bool is_40, is_sgi, is_sp;
--		int phy;
--
--		if (!rates[i].count || (rates[i].idx < 0))
--			continue;
--
--		rix = rates[i].idx;
--		series[i].Tries = rates[i].count;
--
--		    if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
--			series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
--			flags |= ATH9K_TXDESC_RTSENA;
--		} else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
--			series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
--			flags |= ATH9K_TXDESC_CTSENA;
--		}
--
--		if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
--			series[i].RateFlags |= ATH9K_RATESERIES_2040;
--		if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
--			series[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
--
--		is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
--		is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
--		is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
--
--		if (rates[i].flags & IEEE80211_TX_RC_MCS) {
--			/* MCS rates */
--			series[i].Rate = rix | 0x80;
--			series[i].ChSel = ath_txchainmask_reduction(sc,
--					ah->txchainmask, series[i].Rate);
--			series[i].PktDuration = ath_pkt_duration(sc, rix, len,
--				 is_40, is_sgi, is_sp);
--			if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
--				series[i].RateFlags |= ATH9K_RATESERIES_STBC;
--			continue;
--		}
--
--		/* legacy rates */
--		if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
--		    !(rate->flags & IEEE80211_RATE_ERP_G))
--			phy = WLAN_RC_PHY_CCK;
--		else
--			phy = WLAN_RC_PHY_OFDM;
--
--		rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
--		series[i].Rate = rate->hw_value;
--		if (rate->hw_value_short) {
--			if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
--				series[i].Rate |= rate->hw_value_short;
--		} else {
--			is_sp = false;
--		}
--
--		if (bf->bf_state.bfs_paprd)
--			series[i].ChSel = ah->txchainmask;
--		else
--			series[i].ChSel = ath_txchainmask_reduction(sc,
--					ah->txchainmask, series[i].Rate);
--
--		series[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
--			phy, rate->bitrate * 100, len, rix, is_sp);
--	}
--
--	/* For AR5416 - RTS cannot be followed by a frame larger than 8K */
--	if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit))
--		flags &= ~ATH9K_TXDESC_RTSENA;
--
--	/* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
--	if (flags & ATH9K_TXDESC_RTSENA)
--		flags &= ~ATH9K_TXDESC_CTSENA;
--
--	/* set dur_update_en for l-sig computation except for PS-Poll frames */
--	ath9k_hw_set11n_ratescenario(sc->sc_ah, bf->bf_desc,
--				     bf->bf_lastbf->bf_desc,
--				     !is_pspoll, ctsrate,
--				     0, series, 4, flags);
--
--}
--
- /*
-  * Assign a descriptor (and sequence number if necessary,
-  * and map buffer for DMA. Frees skb on error
-@@ -1753,13 +1776,10 @@ static struct ath_buf *ath_tx_setup_buff
- 					   struct ath_atx_tid *tid,
- 					   struct sk_buff *skb)
- {
--	struct ath_hw *ah = sc->sc_ah;
- 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
- 	struct ath_frame_info *fi = get_frame_info(skb);
- 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
- 	struct ath_buf *bf;
--	struct ath_desc *ds;
--	int frm_type;
- 	u16 seqno;
- 
- 	bf = ath_tx_get_buffer(sc);
-@@ -1777,7 +1797,6 @@ static struct ath_buf *ath_tx_setup_buff
- 		bf->bf_state.seqno = seqno;
+ 	mask = ints & ATH9K_INT_COMMON;
+ 	mask2 = 0;
+--- a/drivers/net/wireless/ath/ath9k/mac.h
++++ b/drivers/net/wireless/ath/ath9k/mac.h
+@@ -75,9 +75,10 @@
+ #define ATH9K_TXERR_XTXOP          0x08
+ #define ATH9K_TXERR_TIMER_EXPIRED  0x10
+ #define ATH9K_TX_ACKED		   0x20
++#define ATH9K_TX_FLUSH		   0x40
+ #define ATH9K_TXERR_MASK						\
+ 	(ATH9K_TXERR_XRETRY | ATH9K_TXERR_FILT | ATH9K_TXERR_FIFO |	\
+-	 ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED)
++	 ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED | ATH9K_TX_FLUSH)
+ 
+ #define ATH9K_TX_BA                0x01
+ #define ATH9K_TX_PWRMGMT           0x02
+@@ -181,6 +182,7 @@ struct ath_htc_rx_status {
+ #define ATH9K_RXERR_FIFO          0x04
+ #define ATH9K_RXERR_DECRYPT       0x08
+ #define ATH9K_RXERR_MIC           0x10
++#define ATH9K_RXERR_KEYMISS       0x20
+ 
+ #define ATH9K_RX_MORE             0x01
+ #define ATH9K_RX_MORE_AGGR        0x02
+@@ -734,7 +736,7 @@ int ath9k_hw_beaconq_setup(struct ath_hw
+ 
+ /* Interrupt Handling */
+ bool ath9k_hw_intrpend(struct ath_hw *ah);
+-void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints);
++void ath9k_hw_set_interrupts(struct ath_hw *ah);
+ void ath9k_hw_enable_interrupts(struct ath_hw *ah);
+ void ath9k_hw_disable_interrupts(struct ath_hw *ah);
+ 
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -273,7 +273,7 @@ static bool ath_complete_reset(struct at
+ 
+ 	ath9k_cmn_update_txpow(ah, sc->curtxpow,
+ 			       sc->config.txpowlimit, &sc->curtxpow);
+-	ath9k_hw_set_interrupts(ah, ah->imask);
++	ath9k_hw_set_interrupts(ah);
+ 	ath9k_hw_enable_interrupts(ah);
+ 
+ 	if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
+@@ -679,6 +679,16 @@ void ath9k_tasklet(unsigned long data)
+ 
+ 	if ((status & ATH9K_INT_FATAL) ||
+ 	    (status & ATH9K_INT_BB_WATCHDOG)) {
++#ifdef CONFIG_ATH9K_DEBUGFS
++		enum ath_reset_type type;
++
++		if (status & ATH9K_INT_FATAL)
++			type = RESET_TYPE_FATAL_INT;
++		else
++			type = RESET_TYPE_BB_WATCHDOG;
++
++		RESET_STAT_INC(sc, type);
++#endif
+ 		ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
+ 		goto out;
  	}
+@@ -823,7 +833,7 @@ irqreturn_t ath_isr(int irq, void *dev)
  
--	bf->bf_flags = setup_tx_flags(skb);
- 	bf->bf_mpdu = skb;
+ 	if (status & ATH9K_INT_RXEOL) {
+ 		ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
+-		ath9k_hw_set_interrupts(ah, ah->imask);
++		ath9k_hw_set_interrupts(ah);
+ 	}
  
- 	bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
-@@ -1791,22 +1810,6 @@ static struct ath_buf *ath_tx_setup_buff
- 		goto error;
+ 	if (status & ATH9K_INT_MIB) {
+@@ -995,8 +1005,10 @@ void ath_hw_check(struct work_struct *wo
+ 	ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
+ 		"busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
+ 	if (busy >= 99) {
+-		if (++sc->hw_busy_count >= 3)
++		if (++sc->hw_busy_count >= 3) {
++			RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
+ 			ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++		}
+ 
+ 	} else if (busy >= 0)
+ 		sc->hw_busy_count = 0;
+@@ -1016,6 +1028,7 @@ static void ath_hw_pll_rx_hang_check(str
+ 			/* Rx is hung for more than 500ms. Reset it */
+ 			ath_dbg(common, ATH_DBG_RESET,
+ 				"Possible RX hang, resetting");
++			RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
+ 			ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
+ 			count = 0;
+ 		}
+@@ -1396,7 +1409,7 @@ static void ath9k_calculate_summary_stat
+ 		ah->imask &= ~ATH9K_INT_TSFOOR;
  	}
  
--	frm_type = get_hw_packet_type(skb);
--
--	ds = bf->bf_desc;
--	ath9k_hw_set_desc_link(ah, ds, 0);
--
--	ath9k_hw_set11n_txdesc(ah, ds, fi->framelen, frm_type, MAX_RATE_POWER,
--			       fi->keyix, fi->keytype, bf->bf_flags);
--
--	ath9k_hw_filltxdesc(ah, ds,
--			    skb->len,	/* segment length */
--			    true,	/* first segment */
--			    true,	/* last segment */
--			    ds,		/* first descriptor */
--			    bf->bf_buf_addr,
--			    txq->axq_qnum);
--
- 	fi->bf = bf;
+-	ath9k_hw_set_interrupts(ah, ah->imask);
++	ath9k_hw_set_interrupts(ah);
+ 
+ 	/* Set up ANI */
+ 	if (iter_data.naps > 0) {
+@@ -1571,7 +1584,7 @@ static void ath9k_enable_ps(struct ath_s
+ 	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
+ 		if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
+ 			ah->imask |= ATH9K_INT_TIM_TIMER;
+-			ath9k_hw_set_interrupts(ah, ah->imask);
++			ath9k_hw_set_interrupts(ah);
+ 		}
+ 		ath9k_hw_setrxabort(ah, 1);
+ 	}
+@@ -1591,7 +1604,7 @@ static void ath9k_disable_ps(struct ath_
+ 				  PS_WAIT_FOR_TX_ACK);
+ 		if (ah->imask & ATH9K_INT_TIM_TIMER) {
+ 			ah->imask &= ~ATH9K_INT_TIM_TIMER;
+-			ath9k_hw_set_interrupts(ah, ah->imask);
++			ath9k_hw_set_interrupts(ah);
+ 		}
+ 	}
  
- 	return bf;
-@@ -1849,16 +1852,9 @@ static void ath_tx_start_dma(struct ath_
+--- a/drivers/net/wireless/ath/ath9k/pci.c
++++ b/drivers/net/wireless/ath/ath9k/pci.c
+@@ -33,7 +33,7 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_i
+ 	{ PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E  AR9300 */
+ 	{ PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E  AR9485 */
+ 	{ PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E  AR9580 */
+-	{ PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E  AR9480 */
++	{ PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E  AR9462 */
+ 	{ 0 }
+ };
  
- 		bf->bf_state.bfs_paprd = txctl->paprd;
+--- a/drivers/net/wireless/ath/ath9k/recv.c
++++ b/drivers/net/wireless/ath/ath9k/recv.c
+@@ -433,12 +433,9 @@ void ath_rx_cleanup(struct ath_softc *sc
  
--		if (bf->bf_state.bfs_paprd)
--			ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc,
--						   bf->bf_state.bfs_paprd);
+ u32 ath_calcrxfilter(struct ath_softc *sc)
+ {
+-#define	RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
 -
- 		if (txctl->paprd)
- 			bf->bf_state.bfs_paprd_timestamp = jiffies;
+ 	u32 rfilt;
  
--		if (tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
--			ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, true);
--
- 		ath_tx_send_normal(sc, txctl->txq, tid, skb);
- 	}
+-	rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
+-		| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
++	rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
+ 		| ATH9K_RX_FILTER_MCAST;
  
-@@ -1899,15 +1895,18 @@ int ath_tx_start(struct ieee80211_hw *hw
- 		hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
+ 	if (sc->rx.rxfilter & FIF_PROBE_REQ)
+@@ -811,6 +808,7 @@ static bool ath9k_rx_accept(struct ath_c
+ 			    struct ath_rx_status *rx_stats,
+ 			    bool *decrypt_error)
+ {
++	struct ath_softc *sc = (struct ath_softc *) common->priv;
+ 	bool is_mc, is_valid_tkip, strip_mic, mic_error;
+ 	struct ath_hw *ah = common->ah;
+ 	__le16 fc;
+@@ -823,7 +821,8 @@ static bool ath9k_rx_accept(struct ath_c
+ 		test_bit(rx_stats->rs_keyix, common->tkip_keymap);
+ 	strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
+ 		!(rx_stats->rs_status &
+-		(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
++		(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
++		 ATH9K_RXERR_KEYMISS));
+ 
+ 	if (!rx_stats->rs_datalen)
+ 		return false;
+@@ -851,6 +850,8 @@ static bool ath9k_rx_accept(struct ath_c
+ 	 * descriptors.
+ 	 */
+ 	if (rx_stats->rs_status != 0) {
++		u8 status_mask;
++
+ 		if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
+ 			rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
+ 			mic_error = false;
+@@ -858,7 +859,8 @@ static bool ath9k_rx_accept(struct ath_c
+ 		if (rx_stats->rs_status & ATH9K_RXERR_PHY)
+ 			return false;
+ 
+-		if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
++		if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
++		    (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
+ 			*decrypt_error = true;
+ 			mic_error = false;
+ 		}
+@@ -868,17 +870,14 @@ static bool ath9k_rx_accept(struct ath_c
+ 		 * decryption and MIC failures. For monitor mode,
+ 		 * we also ignore the CRC error.
+ 		 */
+-		if (ah->is_monitoring) {
+-			if (rx_stats->rs_status &
+-			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
+-			      ATH9K_RXERR_CRC))
+-				return false;
+-		} else {
+-			if (rx_stats->rs_status &
+-			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
+-				return false;
+-			}
+-		}
++		status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
++			      ATH9K_RXERR_KEYMISS;
++
++		if (ah->is_monitoring && (sc->rx.rxfilter & FIF_FCSFAIL))
++			status_mask |= ATH9K_RXERR_CRC;
++
++		if (rx_stats->rs_status & ~status_mask)
++			return false;
  	}
  
--	/* Add the padding after the header if this is not already done */
--	padpos = ath9k_cmn_padpos(hdr->frame_control);
--	padsize = padpos & 3;
--	if (padsize && skb->len > padpos) {
--		if (skb_headroom(skb) < padsize)
--			return -ENOMEM;
--
--		skb_push(skb, padsize);
--		memmove(skb->data, skb->data + padsize, padpos);
-+	if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
-+		/* Add the padding after the header if this is not already done */
-+		padpos = ath9k_cmn_padpos(hdr->frame_control);
-+		padsize = padpos & 3;
-+		if (padsize && skb->len > padpos) {
-+			if (skb_headroom(skb) < padsize)
-+				return -ENOMEM;
-+
-+			skb_push(skb, padsize);
-+			memmove(skb->data, skb->data + padsize, padpos);
-+			hdr = (struct ieee80211_hdr *) skb->data;
-+		}
+ 	/*
+@@ -1973,7 +1972,7 @@ requeue:
+ 
+ 	if (!(ah->imask & ATH9K_INT_RXEOL)) {
+ 		ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
+-		ath9k_hw_set_interrupts(ah, ah->imask);
++		ath9k_hw_set_interrupts(ah);
  	}
  
- 	if ((vif && vif->type != NL80211_IFTYPE_AP &&
-@@ -1953,20 +1952,21 @@ static void ath_tx_complete(struct ath_s
- 	if (tx_flags & ATH_TX_BAR)
- 		tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
+ 	return 0;
+--- a/drivers/net/wireless/ath/ath9k/reg.h
++++ b/drivers/net/wireless/ath/ath9k/reg.h
+@@ -796,9 +796,9 @@
+ #define AR_SREV_VERSION_9340		0x300
+ #define AR_SREV_VERSION_9580		0x1C0
+ #define AR_SREV_REVISION_9580_10	4 /* AR9580 1.0 */
+-#define AR_SREV_VERSION_9480		0x280
+-#define AR_SREV_REVISION_9480_10	0
+-#define AR_SREV_REVISION_9480_20	2
++#define AR_SREV_VERSION_9462		0x280
++#define AR_SREV_REVISION_9462_10	0
++#define AR_SREV_REVISION_9462_20	2
  
--	if (!(tx_flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
-+	if (!(tx_flags & ATH_TX_ERROR))
- 		/* Frame was ACKed */
- 		tx_info->flags |= IEEE80211_TX_STAT_ACK;
--	}
+ #define AR_SREV_5416(_ah) \
+ 	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
+@@ -895,20 +895,20 @@
+     (AR_SREV_9285_12_OR_LATER(_ah) && \
+      ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1))
+ 
+-#define AR_SREV_9480(_ah) \
+-	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480))
++#define AR_SREV_9462(_ah) \
++	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462))
+ 
+-#define AR_SREV_9480_10(_ah) \
+-	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
+-	((_ah)->hw_version.macRev == AR_SREV_REVISION_9480_10))
+-
+-#define AR_SREV_9480_20(_ah) \
+-	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
+-	((_ah)->hw_version.macRev == AR_SREV_REVISION_9480_20))
+-
+-#define AR_SREV_9480_20_OR_LATER(_ah) \
+-	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
+-	((_ah)->hw_version.macRev >= AR_SREV_REVISION_9480_20))
++#define AR_SREV_9462_10(_ah) \
++	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \
++	((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_10))
++
++#define AR_SREV_9462_20(_ah) \
++	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \
++	((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_20))
++
++#define AR_SREV_9462_20_OR_LATER(_ah) \
++	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \
++	((_ah)->hw_version.macRev >= AR_SREV_REVISION_9462_20))
+ 
+ #define AR_SREV_9580(_ah) \
+ 	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \
+@@ -1933,6 +1933,7 @@ enum {
+ #define AR_PHY_AGC_CONTROL_NO_UPDATE_NF		0x00020000  /* don't update noise floor automatically */
+ #define AR_PHY_AGC_CONTROL_EXT_NF_PWR_MEAS	0x00040000  /* extend noise floor power measurement */
+ #define AR_PHY_AGC_CONTROL_CLC_SUCCESS		0x00080000  /* carrier leak calibration done */
++#define AR_PHY_AGC_CONTROL_PKDET_CAL		0x00100000
+ #define AR_PHY_AGC_CONTROL_YCOK_MAX		0x000003c0
+ #define AR_PHY_AGC_CONTROL_YCOK_MAX_S		6
  
--	padpos = ath9k_cmn_padpos(hdr->frame_control);
--	padsize = padpos & 3;
--	if (padsize && skb->len>padpos+padsize) {
--		/*
--		 * Remove MAC header padding before giving the frame back to
--		 * mac80211.
--		 */
--		memmove(skb->data + padsize, skb->data, padpos);
--		skb_pull(skb, padsize);
-+	if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
-+		padpos = ath9k_cmn_padpos(hdr->frame_control);
-+		padsize = padpos & 3;
-+		if (padsize && skb->len>padpos+padsize) {
-+			/*
-+			 * Remove MAC header padding before giving the frame back to
-+			 * mac80211.
-+			 */
-+			memmove(skb->data + padsize, skb->data, padpos);
-+			skb_pull(skb, padsize);
+--- a/drivers/net/wireless/ath/ath9k/xmit.c
++++ b/drivers/net/wireless/ath/ath9k/xmit.c
+@@ -373,7 +373,7 @@ static void ath_tx_complete_aggr(struct 
+ 	struct ath_frame_info *fi;
+ 	int nframes;
+ 	u8 tidno;
+-	bool clear_filter;
++	bool flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
+ 
+ 	skb = bf->bf_mpdu;
+ 	hdr = (struct ieee80211_hdr *)skb->data;
+@@ -462,12 +462,12 @@ static void ath_tx_complete_aggr(struct 
+ 				 * the un-acked sub-frames
+ 				 */
+ 				txfail = 1;
++			} else if (flush) {
++				txpending = 1;
+ 			} else if (fi->retries < ATH_MAX_SW_RETRIES) {
+-				if (!(ts->ts_status & ATH9K_TXERR_FILT) ||
+-				    !an->sleeping)
++				if (txok || !an->sleeping)
+ 					ath_tx_set_retry(sc, txq, bf->bf_mpdu);
+ 
+-				clear_filter = true;
+ 				txpending = 1;
+ 			} else {
+ 				txfail = 1;
+@@ -521,7 +521,8 @@ static void ath_tx_complete_aggr(struct 
+ 
+ 						ath_tx_complete_buf(sc, bf, txq,
+ 								    &bf_head,
+-								    ts, 0, 1);
++								    ts, 0,
++								    !flush);
+ 						break;
+ 					}
+ 
+@@ -545,11 +546,13 @@ static void ath_tx_complete_aggr(struct 
+ 			ieee80211_sta_set_buffered(sta, tid->tidno, true);
+ 
+ 		spin_lock_bh(&txq->axq_lock);
+-		if (clear_filter)
+-			tid->ac->clear_ps_filter = true;
+ 		skb_queue_splice(&bf_pending, &tid->buf_q);
+-		if (!an->sleeping)
++		if (!an->sleeping) {
+ 			ath_tx_queue_tid(txq, tid);
++
++			if (ts->ts_status & ATH9K_TXERR_FILT)
++				tid->ac->clear_ps_filter = true;
 +		}
+ 		spin_unlock_bh(&txq->axq_lock);
  	}
  
- 	if (sc->ps_flags & PS_WAIT_FOR_TX_ACK) {
-@@ -2000,18 +2000,18 @@ static void ath_tx_complete_buf(struct a
- 				struct ath_tx_status *ts, int txok, int sendbar)
- {
- 	struct sk_buff *skb = bf->bf_mpdu;
-+	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
- 	unsigned long flags;
- 	int tx_flags = 0;
+@@ -564,8 +567,10 @@ static void ath_tx_complete_aggr(struct 
  
- 	if (sendbar)
- 		tx_flags = ATH_TX_BAR;
+ 	rcu_read_unlock();
  
--	if (!txok) {
-+	if (!txok)
- 		tx_flags |= ATH_TX_ERROR;
+-	if (needreset)
++	if (needreset) {
++		RESET_STAT_INC(sc, RESET_TYPE_TX_ERROR);
+ 		ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++	}
+ }
  
--		if (bf_isxretried(bf))
--			tx_flags |= ATH_TX_XRETRY;
--	}
-+	if (ts->ts_status & ATH9K_TXERR_FILT)
-+		tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
+ static bool ath_lookup_legacy(struct ath_buf *bf)
+@@ -1407,6 +1412,7 @@ static void ath_drain_txq_list(struct at
+ 	struct ath_tx_status ts;
  
- 	dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE);
- 	bf->bf_buf_addr = 0;
-@@ -2024,7 +2024,7 @@ static void ath_tx_complete_buf(struct a
- 		else
- 			complete(&sc->paprd_complete);
- 	} else {
--		ath_debug_stat_tx(sc, bf, ts, txq);
-+		ath_debug_stat_tx(sc, bf, ts, txq, tx_flags);
- 		ath_tx_complete(sc, skb, tx_flags, txq);
+ 	memset(&ts, 0, sizeof(ts));
++	ts.ts_status = ATH9K_TX_FLUSH;
+ 	INIT_LIST_HEAD(&bf_head);
+ 
+ 	while (!list_empty(list)) {
+@@ -1473,7 +1479,8 @@ bool ath_drain_all_txq(struct ath_softc 
+ 	struct ath_hw *ah = sc->sc_ah;
+ 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ 	struct ath_txq *txq;
+-	int i, npend = 0;
++	int i;
++	u32 npend = 0;
+ 
+ 	if (sc->sc_flags & SC_OP_INVALID)
+ 		return true;
+@@ -1485,11 +1492,12 @@ bool ath_drain_all_txq(struct ath_softc 
+ 		if (!ATH_TXQ_SETUP(sc, i))
+ 			continue;
+ 
+-		npend += ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum);
++		if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
++			npend |= BIT(i);
  	}
- 	/* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't
-@@ -2042,7 +2042,7 @@ static void ath_tx_complete_buf(struct a
  
- static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
- 			     struct ath_tx_status *ts, int nframes, int nbad,
--			     int txok, bool update_rc)
-+			     int txok)
- {
- 	struct sk_buff *skb = bf->bf_mpdu;
- 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
-@@ -2057,9 +2057,7 @@ static void ath_tx_rc_status(struct ath_
- 	tx_rateindex = ts->ts_rateindex;
- 	WARN_ON(tx_rateindex >= hw->max_rates);
- 
--	if (ts->ts_status & ATH9K_TXERR_FILT)
--		tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
--	if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) {
-+	if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
- 		tx_info->flags |= IEEE80211_TX_STAT_AMPDU;
- 
- 		BUG_ON(nbad > nframes);
-@@ -2069,7 +2067,7 @@ static void ath_tx_rc_status(struct ath_
+ 	if (npend)
+-		ath_err(common, "Failed to stop TX DMA!\n");
++		ath_err(common, "Failed to stop TX DMA, queues=0x%03x!\n", npend);
+ 
+ 	for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+ 		if (!ATH_TXQ_SETUP(sc, i))
+@@ -2211,6 +2219,7 @@ static void ath_tx_complete_poll_work(st
+ 	if (needreset) {
+ 		ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
+ 			"tx hung, resetting the chip\n");
++		RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
+ 		ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  	}
  
- 	if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 &&
--	    (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) {
-+	    (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) == 0) {
- 		/*
- 		 * If an underrun error is seen assume it as an excessive
- 		 * retry only if max frame trigger level has been reached
-@@ -2082,9 +2080,9 @@ static void ath_tx_rc_status(struct ath_
- 		 * successfully by eventually preferring slower rates.
- 		 * This itself should also alleviate congestion on the bus.
- 		 */
--		if (ieee80211_is_data(hdr->frame_control) &&
--		    (ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN |
--		                     ATH9K_TX_DELIM_UNDERRUN)) &&
-+		if (unlikely(ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN |
-+		                             ATH9K_TX_DELIM_UNDERRUN)) &&
-+		    ieee80211_is_data(hdr->frame_control) &&
- 		    ah->tx_trig_level >= sc->sc_ah->config.max_txtrig_level)
- 			tx_info->status.rates[tx_rateindex].count =
- 				hw->max_rate_tries;
-@@ -2115,13 +2113,7 @@ static void ath_tx_process_buffer(struct
- 	spin_unlock_bh(&txq->axq_lock);
- 
- 	if (!bf_isampdu(bf)) {
--		/*
--		 * This frame is sent out as a single frame.
--		 * Use hardware retry status for this frame.
--		 */
--		if (ts->ts_status & ATH9K_TXERR_XRETRY)
--			bf->bf_state.bf_type |= BUF_XRETRY;
--		ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok, true);
-+		ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
- 		ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok, 0);
- 	} else
- 		ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
+--- a/drivers/net/wireless/ath/carl9170/main.c
++++ b/drivers/net/wireless/ath/carl9170/main.c
+@@ -1914,7 +1914,6 @@ static int carl9170_parse_eeprom(struct 
+ 		ar->hw->channel_change_time = 80 * 1000;
+ 
+ 	regulatory->current_rd = le16_to_cpu(ar->eeprom.reg_domain[0]);
+-	regulatory->current_rd_ext = le16_to_cpu(ar->eeprom.reg_domain[1]);
+ 
+ 	/* second part of wiphy init */
+ 	SET_IEEE80211_PERM_ADDR(ar->hw, ar->eeprom.mac_address);
+--- a/include/net/cfg80211.h
++++ b/include/net/cfg80211.h
+@@ -1119,6 +1119,7 @@ struct cfg80211_ibss_params {
+ 	u8 *ssid;
+ 	u8 *bssid;
+ 	struct ieee80211_channel *channel;
++	enum nl80211_channel_type channel_type;
+ 	u8 *ie;
+ 	u8 ssid_len, ie_len;
+ 	u16 beacon_interval;
+@@ -3185,6 +3186,16 @@ void cfg80211_gtk_rekey_notify(struct ne
+ void cfg80211_pmksa_candidate_notify(struct net_device *dev, int index,
+ 				     const u8 *bssid, bool preauth, gfp_t gfp);
+ 
++/**
++ * cfg80211_can_use_ext_chan - test if ht40 on extension channel can be used
++ * @wiphy: the wiphy
++ * @chan: main channel
++ * @channel_type: HT mode
++ */
++bool cfg80211_can_beacon_sec_chan(struct wiphy *wiphy,
++				  struct ieee80211_channel *chan,
++				  enum nl80211_channel_type channel_type);
++
+ /* Logging, debugging and troubleshooting/diagnostic helpers. */
+ 
+ /* wiphy_printk helpers, similar to dev_printk */
 --- a/net/mac80211/agg-rx.c
 +++ b/net/mac80211/agg-rx.c
-@@ -180,6 +180,8 @@ static void ieee80211_send_addba_resp(st
+@@ -180,6 +180,10 @@ static void ieee80211_send_addba_resp(st
  		memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
  	else if (sdata->vif.type == NL80211_IFTYPE_STATION)
  		memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
 +	else if (sdata->vif.type == NL80211_IFTYPE_WDS)
 +		memcpy(mgmt->bssid, da, ETH_ALEN);
++	else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
++		memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
  
  	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
  					  IEEE80211_STYPE_ACTION);
 --- a/net/mac80211/agg-tx.c
 +++ b/net/mac80211/agg-tx.c
-@@ -77,7 +77,8 @@ static void ieee80211_send_addba_request
+@@ -77,10 +77,13 @@ static void ieee80211_send_addba_request
  	memcpy(mgmt->da, da, ETH_ALEN);
  	memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
  	if (sdata->vif.type == NL80211_IFTYPE_AP ||
@@ -2132,35 +10635,258 @@
  		memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
  	else if (sdata->vif.type == NL80211_IFTYPE_STATION)
  		memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-@@ -397,7 +398,8 @@ int ieee80211_start_tx_ba_session(struct
++	else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
++		memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
+ 
+ 	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
+ 					  IEEE80211_STYPE_ACTION);
+@@ -397,7 +400,9 @@ int ieee80211_start_tx_ba_session(struct
  	 */
  	if (sdata->vif.type != NL80211_IFTYPE_STATION &&
  	    sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
 -	    sdata->vif.type != NL80211_IFTYPE_AP)
 +	    sdata->vif.type != NL80211_IFTYPE_AP &&
++	    sdata->vif.type != NL80211_IFTYPE_ADHOC &&
 +	    sdata->vif.type != NL80211_IFTYPE_WDS)
  		return -EINVAL;
  
- 	if (test_sta_flags(sta, WLAN_STA_BLOCK_BA)) {
+ 	if (test_sta_flag(sta, WLAN_STA_BLOCK_BA)) {
+--- a/net/mac80211/cfg.c
++++ b/net/mac80211/cfg.c
+@@ -1886,7 +1886,7 @@ ieee80211_offchan_tx_done(struct ieee802
+ 	 * so in that case userspace will have to deal with it.
+ 	 */
+ 
+-	if (wk->offchan_tx.wait && wk->offchan_tx.frame)
++	if (wk->offchan_tx.wait && !wk->offchan_tx.status)
+ 		cfg80211_mgmt_tx_status(wk->sdata->dev,
+ 					(unsigned long) wk->offchan_tx.frame,
+ 					wk->ie, wk->ie_len, false, GFP_KERNEL);
 --- a/net/mac80211/debugfs_sta.c
 +++ b/net/mac80211/debugfs_sta.c
-@@ -59,7 +59,7 @@ static ssize_t sta_flags_read(struct fil
- 	char buf[100];
- 	struct sta_info *sta = file->private_data;
- 	u32 staflags = get_sta_flags(sta);
--	int res = scnprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s",
-+	int res = scnprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s",
- 		staflags & WLAN_STA_AUTH ? "AUTH\n" : "",
- 		staflags & WLAN_STA_ASSOC ? "ASSOC\n" : "",
- 		staflags & WLAN_STA_PS_STA ? "PS (sta)\n" : "",
-@@ -67,7 +67,6 @@ static ssize_t sta_flags_read(struct fil
- 		staflags & WLAN_STA_AUTHORIZED ? "AUTHORIZED\n" : "",
- 		staflags & WLAN_STA_SHORT_PREAMBLE ? "SHORT PREAMBLE\n" : "",
- 		staflags & WLAN_STA_WME ? "WME\n" : "",
--		staflags & WLAN_STA_WDS ? "WDS\n" : "",
- 		staflags & WLAN_STA_MFP ? "MFP\n" : "");
- 	return simple_read_from_buffer(userbuf, count, ppos, buf, res);
- }
+@@ -63,11 +63,11 @@ static ssize_t sta_flags_read(struct fil
+ 	test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
+ 
+ 	int res = scnprintf(buf, sizeof(buf),
+-			    "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
++			    "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
+ 			    TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
+ 			    TEST(PS_DRIVER), TEST(AUTHORIZED),
+ 			    TEST(SHORT_PREAMBLE), TEST(ASSOC_AP),
+-			    TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
++			    TEST(WME), TEST(CLEAR_PS_FILT),
+ 			    TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
+ 			    TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
+ 			    TEST(TDLS_PEER_AUTH));
+--- a/net/mac80211/ht.c
++++ b/net/mac80211/ht.c
+@@ -199,6 +199,8 @@ void ieee80211_send_delba(struct ieee802
+ 		memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
+ 	else if (sdata->vif.type == NL80211_IFTYPE_STATION)
+ 		memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
++	else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
++		memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
+ 
+ 	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
+ 					  IEEE80211_STYPE_ACTION);
+--- a/net/mac80211/ibss.c
++++ b/net/mac80211/ibss.c
+@@ -77,6 +77,7 @@ static void __ieee80211_sta_join_ibss(st
+ 	struct cfg80211_bss *bss;
+ 	u32 bss_change;
+ 	u8 supp_rates[IEEE80211_MAX_SUPP_RATES];
++	enum nl80211_channel_type channel_type;
+ 
+ 	lockdep_assert_held(&ifibss->mtx);
+ 
+@@ -104,8 +105,16 @@ static void __ieee80211_sta_join_ibss(st
+ 
+ 	sdata->drop_unencrypted = capability & WLAN_CAPABILITY_PRIVACY ? 1 : 0;
+ 
+-	local->oper_channel = chan;
+-	WARN_ON(!ieee80211_set_channel_type(local, sdata, NL80211_CHAN_NO_HT));
++	channel_type = ifibss->channel_type;
++	if (channel_type > NL80211_CHAN_HT20 &&
++	    !cfg80211_can_beacon_sec_chan(local->hw.wiphy, chan, channel_type))
++		channel_type = NL80211_CHAN_HT20;
++	if (!ieee80211_set_channel_type(local, sdata, channel_type)) {
++		/* can only fail due to HT40+/- mismatch */
++		channel_type = NL80211_CHAN_HT20;
++		WARN_ON(!ieee80211_set_channel_type(local, sdata,
++						    NL80211_CHAN_HT20));
++	}
+ 	ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
+ 
+ 	sband = local->hw.wiphy->bands[chan->band];
+@@ -171,6 +180,18 @@ static void __ieee80211_sta_join_ibss(st
+ 		memcpy(skb_put(skb, ifibss->ie_len),
+ 		       ifibss->ie, ifibss->ie_len);
+ 
++	/* add HT capability and information IEs */
++	if (channel_type && sband->ht_cap.ht_supported) {
++		pos = skb_put(skb, 4 +
++				   sizeof(struct ieee80211_ht_cap) +
++				   sizeof(struct ieee80211_ht_info));
++		pos = ieee80211_ie_build_ht_cap(pos, sband, sband->ht_cap.cap);
++		pos = ieee80211_ie_build_ht_info(pos,
++						 &sband->ht_cap,
++						 chan,
++						 channel_type);
++	}
++
+ 	if (local->hw.queues >= 4) {
+ 		pos = skb_put(skb, 9);
+ 		*pos++ = WLAN_EID_VENDOR_SPECIFIC;
+@@ -194,6 +215,7 @@ static void __ieee80211_sta_join_ibss(st
+ 	bss_change |= BSS_CHANGED_BEACON;
+ 	bss_change |= BSS_CHANGED_BEACON_ENABLED;
+ 	bss_change |= BSS_CHANGED_BASIC_RATES;
++	bss_change |= BSS_CHANGED_HT;
+ 	bss_change |= BSS_CHANGED_IBSS;
+ 	sdata->vif.bss_conf.ibss_joined = true;
+ 	ieee80211_bss_info_change_notify(sdata, bss_change);
+@@ -266,6 +288,7 @@ static void ieee80211_rx_bss_info(struct
+ 	u64 beacon_timestamp, rx_timestamp;
+ 	u32 supp_rates = 0;
+ 	enum ieee80211_band band = rx_status->band;
++	struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
+ 
+ 	if (elems->ds_params && elems->ds_params_len == 1)
+ 		freq = ieee80211_channel_to_frequency(elems->ds_params[0],
+@@ -275,7 +298,10 @@ static void ieee80211_rx_bss_info(struct
+ 
+ 	channel = ieee80211_get_channel(local->hw.wiphy, freq);
+ 
+-	if (!channel || channel->flags & IEEE80211_CHAN_DISABLED)
++	if (!channel ||
++	    channel->flags & (IEEE80211_CHAN_DISABLED ||
++			      IEEE80211_CHAN_NO_IBSS ||
++			      IEEE80211_CHAN_RADAR))
+ 		return;
+ 
+ 	if (sdata->vif.type == NL80211_IFTYPE_ADHOC &&
+@@ -313,8 +339,41 @@ static void ieee80211_rx_bss_info(struct
+ 						GFP_ATOMIC);
+ 		}
+ 
+-		if (sta && elems->wmm_info)
+-			set_sta_flag(sta, WLAN_STA_WME);
++		if (sta) {
++			if (elems->wmm_info)
++				set_sta_flag(sta, WLAN_STA_WME);
++
++			/* we both use HT */
++			if (elems->ht_info_elem && elems->ht_cap_elem &&
++			    sdata->u.ibss.channel_type) {
++				enum nl80211_channel_type channel_type =
++					ieee80211_ht_info_to_channel_type(
++							   elems->ht_info_elem);
++				struct ieee80211_sta_ht_cap sta_ht_cap_new;
++
++				/*
++				 * fall back to HT20 if we don't use or use
++				 * the other extension channel
++				 */
++				if (channel_type > NL80211_CHAN_HT20 &&
++				    channel_type != sdata->u.ibss.channel_type)
++					channel_type = NL80211_CHAN_HT20;
++
++				ieee80211_ht_cap_ie_to_sta_ht_cap(sband,
++						elems->ht_cap_elem,
++						&sta_ht_cap_new);
++				if (memcmp(&sta->sta.ht_cap, &sta_ht_cap_new,
++					   sizeof(sta_ht_cap_new))) {
++					memcpy(&sta->sta.ht_cap,
++					       &sta_ht_cap_new,
++					       sizeof(sta_ht_cap_new));
++					rate_control_rate_update(local, sband,
++							sta,
++							IEEE80211_RC_HT_CHANGED,
++							channel_type);
++				}
++			}
++		}
+ 
+ 		rcu_read_unlock();
+ 	}
+@@ -896,10 +955,15 @@ int ieee80211_ibss_join(struct ieee80211
+ 	struct sk_buff *skb;
+ 
+ 	skb = dev_alloc_skb(sdata->local->hw.extra_tx_headroom +
+-			    36 /* bitrates */ +
+-			    34 /* SSID */ +
+-			    3  /* DS params */ +
+-			    4  /* IBSS params */ +
++			    sizeof(struct ieee80211_hdr_3addr) +
++			    12 /* struct ieee80211_mgmt.u.beacon */ +
++			    2 + IEEE80211_MAX_SSID_LEN /* max SSID */ +
++			    2 + 8 /* max Supported Rates */ +
++			    3 /* max DS params */ +
++			    4 /* IBSS params */ +
++			    2 + (IEEE80211_MAX_SUPP_RATES - 8) +
++			    2 + sizeof(struct ieee80211_ht_cap) +
++			    2 + sizeof(struct ieee80211_ht_info) +
+ 			    params->ie_len);
+ 	if (!skb)
+ 		return -ENOMEM;
+@@ -920,13 +984,15 @@ int ieee80211_ibss_join(struct ieee80211
+ 	sdata->vif.bss_conf.beacon_int = params->beacon_interval;
+ 
+ 	sdata->u.ibss.channel = params->channel;
++	sdata->u.ibss.channel_type = params->channel_type;
+ 	sdata->u.ibss.fixed_channel = params->channel_fixed;
+ 
+ 	/* fix ourselves to that channel now already */
+ 	if (params->channel_fixed) {
+ 		sdata->local->oper_channel = params->channel;
+-		WARN_ON(!ieee80211_set_channel_type(sdata->local, sdata,
+-						    NL80211_CHAN_NO_HT));
++		if (!ieee80211_set_channel_type(sdata->local, sdata,
++					       params->channel_type))
++			return -EINVAL;
+ 	}
+ 
+ 	if (params->ie) {
+--- a/net/mac80211/ieee80211_i.h
++++ b/net/mac80211/ieee80211_i.h
+@@ -346,6 +346,7 @@ struct ieee80211_work {
+ 		struct {
+ 			struct sk_buff *frame;
+ 			u32 wait;
++			bool status;
+ 		} offchan_tx;
+ 	};
+ 
+@@ -465,6 +466,7 @@ struct ieee80211_if_ibss {
+ 	u8 ssid_len, ie_len;
+ 	u8 *ie;
+ 	struct ieee80211_channel *channel;
++	enum nl80211_channel_type channel_type;
+ 
+ 	unsigned long ibss_join_req;
+ 	/* probe response/beacon for IBSS */
+@@ -1351,6 +1353,12 @@ void ieee80211_recalc_smps(struct ieee80
+ size_t ieee80211_ie_split(const u8 *ies, size_t ielen,
+ 			  const u8 *ids, int n_ids, size_t offset);
+ size_t ieee80211_ie_split_vendor(const u8 *ies, size_t ielen, size_t offset);
++u8 *ieee80211_ie_build_ht_cap(u8 *pos, struct ieee80211_supported_band *sband,
++			      u16 cap);
++u8 *ieee80211_ie_build_ht_info(u8 *pos,
++				struct ieee80211_sta_ht_cap *ht_cap,
++				struct ieee80211_channel *channel,
++				enum nl80211_channel_type channel_type);
+ 
+ /* internal work items */
+ void ieee80211_work_init(struct ieee80211_local *local);
+@@ -1379,6 +1387,8 @@ ieee80211_get_channel_mode(struct ieee80
+ bool ieee80211_set_channel_type(struct ieee80211_local *local,
+ 				struct ieee80211_sub_if_data *sdata,
+ 				enum nl80211_channel_type chantype);
++enum nl80211_channel_type
++ieee80211_ht_info_to_channel_type(struct ieee80211_ht_info *ht_info);
+ 
+ #ifdef CONFIG_MAC80211_NOINLINE
+ #define debug_noinline noinline
 --- a/net/mac80211/iface.c
 +++ b/net/mac80211/iface.c
 @@ -178,7 +178,6 @@ static int ieee80211_do_open(struct net_
@@ -2184,8 +10910,8 @@
 -			goto err_del_interface;
 -		}
 -
--		/* no locking required since STA is not live yet */
--		sta->flags |= WLAN_STA_AUTHORIZED;
+-		/* no atomic bitop required since STA is not live yet */
+-		set_sta_flag(sta, WLAN_STA_AUTHORIZED);
 -
 -		res = sta_info_insert(sta);
 -		if (res) {
@@ -2209,7 +10935,7 @@
   err_stop:
  	if (!local->open_count)
  		drv_stop(local);
-@@ -718,6 +695,70 @@ static void ieee80211_if_setup(struct ne
+@@ -716,6 +693,70 @@ static void ieee80211_if_setup(struct ne
  	dev->destructor = free_netdev;
  }
  
@@ -2266,10 +10992,10 @@
 +				elems.ht_cap_elem, &sta->sta.ht_cap);
 +
 +	if (elems.wmm_param)
-+		set_sta_flags(sta, WLAN_STA_WME);
++		set_sta_flag(sta, WLAN_STA_WME);
 +
 +	if (new) {
-+		sta->flags = WLAN_STA_AUTHORIZED;
++		set_sta_flag(sta, WLAN_STA_AUTHORIZED);
 +		rate_control_rate_init(sta);
 +		sta_info_insert_rcu(sta);
 +	}
@@ -2280,7 +11006,7 @@
  static void ieee80211_iface_work(struct work_struct *work)
  {
  	struct ieee80211_sub_if_data *sdata =
-@@ -822,6 +863,9 @@ static void ieee80211_iface_work(struct 
+@@ -820,6 +861,9 @@ static void ieee80211_iface_work(struct 
  				break;
  			ieee80211_mesh_rx_queued_mgmt(sdata, skb);
  			break;
@@ -2292,17 +11018,18 @@
  			break;
 --- a/net/mac80211/rx.c
 +++ b/net/mac80211/rx.c
-@@ -2163,7 +2163,8 @@ ieee80211_rx_h_action(struct ieee80211_r
+@@ -2211,7 +2211,9 @@ ieee80211_rx_h_action(struct ieee80211_r
  		 */
  		if (sdata->vif.type != NL80211_IFTYPE_STATION &&
  		    sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
 -		    sdata->vif.type != NL80211_IFTYPE_AP)
 +		    sdata->vif.type != NL80211_IFTYPE_AP &&
++		    sdata->vif.type != NL80211_IFTYPE_ADHOC &&
 +		    sdata->vif.type != NL80211_IFTYPE_WDS)
  			break;
  
  		/* verify action_code is present */
-@@ -2378,13 +2379,14 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
+@@ -2426,13 +2428,14 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
  
  	if (!ieee80211_vif_is_mesh(&sdata->vif) &&
  	    sdata->vif.type != NL80211_IFTYPE_ADHOC &&
@@ -2319,7 +11046,7 @@
  		break;
  	case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  	case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
-@@ -2727,10 +2729,16 @@ static int prepare_for_handlers(struct i
+@@ -2775,10 +2778,16 @@ static int prepare_for_handlers(struct i
  		}
  		break;
  	case NL80211_IFTYPE_WDS:
@@ -2340,7 +11067,7 @@
  		/* should never get here */
 --- a/net/mac80211/sta_info.h
 +++ b/net/mac80211/sta_info.h
-@@ -31,7 +31,6 @@
+@@ -32,7 +32,6 @@
   *	frames.
   * @WLAN_STA_ASSOC_AP: We're associated to that station, it is an AP.
   * @WLAN_STA_WME: Station is a QoS-STA.
@@ -2348,515 +11075,279 @@
   * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
   *	IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
   *	frame to this station is transmitted.
-@@ -54,7 +53,6 @@ enum ieee80211_sta_info_flags {
- 	WLAN_STA_SHORT_PREAMBLE	= 1<<4,
- 	WLAN_STA_ASSOC_AP	= 1<<5,
- 	WLAN_STA_WME		= 1<<6,
--	WLAN_STA_WDS		= 1<<7,
- 	WLAN_STA_CLEAR_PS_FILT	= 1<<9,
- 	WLAN_STA_MFP		= 1<<10,
- 	WLAN_STA_BLOCK_BA	= 1<<11,
+@@ -61,7 +60,6 @@ enum ieee80211_sta_info_flags {
+ 	WLAN_STA_SHORT_PREAMBLE,
+ 	WLAN_STA_ASSOC_AP,
+ 	WLAN_STA_WME,
+-	WLAN_STA_WDS,
+ 	WLAN_STA_CLEAR_PS_FILT,
+ 	WLAN_STA_MFP,
+ 	WLAN_STA_BLOCK_BA,
 --- a/net/mac80211/status.c
 +++ b/net/mac80211/status.c
-@@ -278,17 +278,19 @@ void ieee80211_tx_status(struct ieee8021
+@@ -429,7 +429,7 @@ void ieee80211_tx_status(struct ieee8021
+ 				continue;
+ 			if (wk->offchan_tx.frame != skb)
+ 				continue;
+-			wk->offchan_tx.frame = NULL;
++			wk->offchan_tx.status = true;
+ 			break;
  		}
- 
- 		if (!acked && ieee80211_is_back_req(fc)) {
-+			u16 control;
-+
- 			/*
--			 * BAR failed, let's tear down the BA session as a
--			 * last resort as some STAs (Intel 5100 on Windows)
--			 * can get stuck when the BA window isn't flushed
--			 * correctly.
-+			 * BAR failed, store the last SSN and retry sending
-+			 * the BAR when the next unicast transmission on the
-+			 * same TID succeeds.
- 			 */
- 			bar = (struct ieee80211_bar *) skb->data;
--			if (!(bar->control & IEEE80211_BAR_CTRL_MULTI_TID)) {
-+			control = le16_to_cpu(bar->control);
-+			if (!(control & IEEE80211_BAR_CTRL_MULTI_TID)) {
- 				u16 ssn = le16_to_cpu(bar->start_seq_num);
- 
--				tid = (bar->control &
-+				tid = (control &
- 				       IEEE80211_BAR_CTRL_TID_INFO_MASK) >>
- 				      IEEE80211_BAR_CTRL_TID_INFO_SHIFT;
- 
---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-@@ -704,8 +704,10 @@ static void ar5008_hw_override_ini(struc
- 		REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
+ 		rcu_read_unlock();
+--- a/net/mac80211/util.c
++++ b/net/mac80211/util.c
+@@ -836,23 +836,8 @@ int ieee80211_build_preq_ies(struct ieee
+ 		offset = noffset;
  	}
  
--	if (!AR_SREV_5416_20_OR_LATER(ah) ||
--	    AR_SREV_9280_20_OR_LATER(ah))
-+	REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
-+		    AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
-+
-+	if (AR_SREV_9280_20_OR_LATER(ah))
- 		return;
+-	if (sband->ht_cap.ht_supported) {
+-		u16 cap = sband->ht_cap.cap;
+-		__le16 tmp;
+-
+-		*pos++ = WLAN_EID_HT_CAPABILITY;
+-		*pos++ = sizeof(struct ieee80211_ht_cap);
+-		memset(pos, 0, sizeof(struct ieee80211_ht_cap));
+-		tmp = cpu_to_le16(cap);
+-		memcpy(pos, &tmp, sizeof(u16));
+-		pos += sizeof(u16);
+-		*pos++ = sband->ht_cap.ampdu_factor |
+-			 (sband->ht_cap.ampdu_density <<
+-				IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
+-		memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
+-		pos += sizeof(sband->ht_cap.mcs);
+-		pos += 2 + 4 + 1; /* ext info, BF cap, antsel */
+-	}
++	if (sband->ht_cap.ht_supported)
++		pos = ieee80211_ie_build_ht_cap(pos, sband, sband->ht_cap.cap);
+ 
  	/*
- 	 * Disable BB clock gating
-@@ -802,7 +804,8 @@ static int ar5008_hw_process_ini(struct 
- 
- 	/* Write ADDAC shifts */
- 	REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);
--	ah->eep_ops->set_addac(ah, chan);
-+	if (ah->eep_ops->set_addac)
-+		ah->eep_ops->set_addac(ah, chan);
- 
- 	if (AR_SREV_5416_22_OR_LATER(ah)) {
- 		REG_WRITE_ARRAY(&ah->iniAddac, 1, regWrites);
-@@ -1007,24 +1010,6 @@ static void ar5008_restore_chainmask(str
+ 	 * If adding more here, adjust code in main.c
+@@ -1443,3 +1428,100 @@ int ieee80211_add_ext_srates_ie(struct i
  	}
+ 	return 0;
  }
- 
--static void ar5008_set_diversity(struct ath_hw *ah, bool value)
--{
--	u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
--	if (value)
--		v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
--	else
--		v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
--	REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
--}
--
--static u32 ar9100_hw_compute_pll_control(struct ath_hw *ah,
--					 struct ath9k_channel *chan)
--{
--	if (chan && IS_CHAN_5GHZ(chan))
--		return 0x1450;
--	return 0x1458;
--}
--
- static u32 ar9160_hw_compute_pll_control(struct ath_hw *ah,
- 					 struct ath9k_channel *chan)
- {
-@@ -1654,7 +1639,6 @@ void ar5008_hw_attach_phy_ops(struct ath
- 	priv_ops->rfbus_req = ar5008_hw_rfbus_req;
- 	priv_ops->rfbus_done = ar5008_hw_rfbus_done;
- 	priv_ops->restore_chainmask = ar5008_restore_chainmask;
--	priv_ops->set_diversity = ar5008_set_diversity;
- 	priv_ops->do_getnf = ar5008_hw_do_getnf;
- 	priv_ops->set_radar_params = ar5008_hw_set_radar_params;
- 
-@@ -1664,9 +1648,7 @@ void ar5008_hw_attach_phy_ops(struct ath
- 	} else
- 		priv_ops->ani_control = ar5008_hw_ani_control_old;
- 
--	if (AR_SREV_9100(ah))
--		priv_ops->compute_pll_control = ar9100_hw_compute_pll_control;
--	else if (AR_SREV_9160_10_OR_LATER(ah))
-+	if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
- 		priv_ops->compute_pll_control = ar9160_hw_compute_pll_control;
- 	else
- 		priv_ops->compute_pll_control = ar5008_hw_compute_pll_control;
---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -592,6 +592,9 @@ static void ar9003_hw_override_ini(struc
- 	val = REG_READ(ah, AR_PCU_MISC_MODE2) & (~AR_ADHOC_MCAST_KEYID_ENABLE);
- 	REG_WRITE(ah, AR_PCU_MISC_MODE2,
- 		  val | AR_AGG_WEP_ENABLE_FIX | AR_AGG_WEP_ENABLE);
 +
-+	REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
-+		    AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
- }
- 
- static void ar9003_hw_prog_ini(struct ath_hw *ah,
-@@ -785,16 +788,6 @@ static void ar9003_hw_rfbus_done(struct 
- 	REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
- }
++u8 *ieee80211_ie_build_ht_cap(u8 *pos, struct ieee80211_supported_band *sband,
++			      u16 cap)
++{
++	__le16 tmp;
++
++	*pos++ = WLAN_EID_HT_CAPABILITY;
++	*pos++ = sizeof(struct ieee80211_ht_cap);
++	memset(pos, 0, sizeof(struct ieee80211_ht_cap));
++
++	/* capability flags */
++	tmp = cpu_to_le16(cap);
++	memcpy(pos, &tmp, sizeof(u16));
++	pos += sizeof(u16);
++
++	/* AMPDU parameters */
++	*pos++ = sband->ht_cap.ampdu_factor |
++		 (sband->ht_cap.ampdu_density <<
++			IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
++
++	/* MCS set */
++	memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
++	pos += sizeof(sband->ht_cap.mcs);
++
++	/* extended capabilities */
++	pos += sizeof(__le16);
++
++	/* BF capabilities */
++	pos += sizeof(__le32);
++
++	/* antenna selection */
++	pos += sizeof(u8);
++
++	return pos;
++}
++
++u8 *ieee80211_ie_build_ht_info(u8 *pos,
++			       struct ieee80211_sta_ht_cap *ht_cap,
++			       struct ieee80211_channel *channel,
++			       enum nl80211_channel_type channel_type)
++{
++	struct ieee80211_ht_info *ht_info;
++	/* Build HT Information */
++	*pos++ = WLAN_EID_HT_INFORMATION;
++	*pos++ = sizeof(struct ieee80211_ht_info);
++	ht_info = (struct ieee80211_ht_info *)pos;
++	ht_info->control_chan =
++			ieee80211_frequency_to_channel(channel->center_freq);
++	switch (channel_type) {
++	case NL80211_CHAN_HT40MINUS:
++		ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
++		break;
++	case NL80211_CHAN_HT40PLUS:
++		ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
++		break;
++	case NL80211_CHAN_HT20:
++	default:
++		ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_NONE;
++		break;
++	}
++	if (ht_cap->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
++		ht_info->ht_param |= IEEE80211_HT_PARAM_CHAN_WIDTH_ANY;
++	ht_info->operation_mode = 0x0000;
++	ht_info->stbc_param = 0x0000;
++
++	/* It seems that Basic MCS set and Supported MCS set
++	   are identical for the first 10 bytes */
++	memset(&ht_info->basic_set, 0, 16);
++	memcpy(&ht_info->basic_set, &ht_cap->mcs, 10);
++
++	return pos + sizeof(struct ieee80211_ht_info);
++}
++
++enum nl80211_channel_type
++ieee80211_ht_info_to_channel_type(struct ieee80211_ht_info *ht_info)
++{
++	enum nl80211_channel_type channel_type;
++
++	if (!ht_info)
++		return NL80211_CHAN_NO_HT;
++
++	switch (ht_info->ht_param & IEEE80211_HT_PARAM_CHA_SEC_OFFSET) {
++	case IEEE80211_HT_PARAM_CHA_SEC_NONE:
++		channel_type = NL80211_CHAN_HT20;
++		break;
++	case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
++		channel_type = NL80211_CHAN_HT40PLUS;
++		break;
++	case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
++		channel_type = NL80211_CHAN_HT40MINUS;
++		break;
++	default:
++		channel_type = NL80211_CHAN_NO_HT;
++	}
++
++	return channel_type;
++}
+--- a/net/mac80211/work.c
++++ b/net/mac80211/work.c
+@@ -118,7 +118,6 @@ static void ieee80211_add_ht_ie(struct s
+ 	u8 *pos;
+ 	u32 flags = channel->flags;
+ 	u16 cap = sband->ht_cap.cap;
+-	__le16 tmp;
+ 
+ 	if (!sband->ht_cap.ht_supported)
+ 		return;
+@@ -169,34 +168,8 @@ static void ieee80211_add_ht_ie(struct s
+ 	}
  
--static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
--{
--	u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
--	if (value)
--		v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
--	else
--		v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
--	REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
--}
+ 	/* reserve and fill IE */
 -
- static bool ar9003_hw_ani_control(struct ath_hw *ah,
- 				  enum ath9k_ani_cmd cmd, int param)
- {
-@@ -1277,7 +1270,6 @@ void ar9003_hw_attach_phy_ops(struct ath
- 	priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
- 	priv_ops->rfbus_req = ar9003_hw_rfbus_req;
- 	priv_ops->rfbus_done = ar9003_hw_rfbus_done;
--	priv_ops->set_diversity = ar9003_hw_set_diversity;
- 	priv_ops->ani_control = ar9003_hw_ani_control;
- 	priv_ops->do_getnf = ar9003_hw_do_getnf;
- 	priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
---- a/drivers/net/wireless/ath/ath9k/eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
-@@ -456,12 +456,7 @@ void ath9k_hw_get_gain_boundaries_pdadcs
- 		pPdGainBoundaries[i] =
- 			min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
- 
--		if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
--			minDelta = pPdGainBoundaries[0] - 23;
--			pPdGainBoundaries[0] = 23;
--		} else {
--			minDelta = 0;
--		}
-+		minDelta = 0;
- 
- 		if (i == 0) {
- 			if (AR_SREV_9280_20_OR_LATER(ah))
---- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-@@ -405,12 +405,7 @@ static void ath9k_hw_set_4k_power_cal_ta
- 	REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0);
- 
- 	for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
--		if (AR_SREV_5416_20_OR_LATER(ah) &&
--		    (ah->rxchainmask == 5 || ah->txchainmask == 5) &&
--		    (i != 0)) {
--			regChainOffset = (i == 1) ? 0x2000 : 0x1000;
--		} else
--			regChainOffset = i * 0x1000;
-+		regChainOffset = i * 0x1000;
- 
- 		if (pEepData->baseEepHeader.txMask & (1 << i)) {
- 			pRawDataset = pEepData->calPierData2G[i];
-@@ -423,19 +418,17 @@ static void ath9k_hw_set_4k_power_cal_ta
- 
- 			ENABLE_REGWRITE_BUFFER(ah);
- 
--			if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
--				REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
--					  SM(pdGainOverlap_t2,
--					     AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
--					  | SM(gainBoundaries[0],
--					       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)
--					  | SM(gainBoundaries[1],
--					       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)
--					  | SM(gainBoundaries[2],
--					       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)
--					  | SM(gainBoundaries[3],
--				       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
--			}
-+			REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
-+				  SM(pdGainOverlap_t2,
-+				     AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
-+				  | SM(gainBoundaries[0],
-+				       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)
-+				  | SM(gainBoundaries[1],
-+				       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)
-+				  | SM(gainBoundaries[2],
-+				       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)
-+				  | SM(gainBoundaries[3],
-+			       AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
- 
- 			regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
- 			for (j = 0; j < 32; j++) {
-@@ -715,10 +708,8 @@ static void ath9k_hw_4k_set_txpower(stru
- 	if (test)
- 	    return;
- 
--	if (AR_SREV_9280_20_OR_LATER(ah)) {
--		for (i = 0; i < Ar5416RateSize; i++)
--			ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
--	}
-+	for (i = 0; i < Ar5416RateSize; i++)
-+		ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
- 
- 	ENABLE_REGWRITE_BUFFER(ah);
- 
-@@ -788,28 +779,6 @@ static void ath9k_hw_4k_set_txpower(stru
- 	REGWRITE_BUFFER_FLUSH(ah);
- }
- 
--static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
--				  struct ath9k_channel *chan)
--{
--	struct modal_eep_4k_header *pModal;
--	struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
--	u8 biaslevel;
+ 	pos = skb_put(skb, sizeof(struct ieee80211_ht_cap) + 2);
+-	*pos++ = WLAN_EID_HT_CAPABILITY;
+-	*pos++ = sizeof(struct ieee80211_ht_cap);
+-	memset(pos, 0, sizeof(struct ieee80211_ht_cap));
 -
--	if (ah->hw_version.macVersion != AR_SREV_VERSION_9160)
--		return;
+-	/* capability flags */
+-	tmp = cpu_to_le16(cap);
+-	memcpy(pos, &tmp, sizeof(u16));
+-	pos += sizeof(u16);
 -
--	if (ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_MINOR_VER_7)
--		return;
+-	/* AMPDU parameters */
+-	*pos++ = sband->ht_cap.ampdu_factor |
+-		 (sband->ht_cap.ampdu_density <<
+-			IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
 -
--	pModal = &eep->modalHeader;
+-	/* MCS set */
+-	memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
+-	pos += sizeof(sband->ht_cap.mcs);
 -
--	if (pModal->xpaBiasLvl != 0xff) {
--		biaslevel = pModal->xpaBiasLvl;
--		INI_RA(&ah->iniAddac, 7, 1) =
--		  (INI_RA(&ah->iniAddac, 7, 1) & (~0x18)) | biaslevel << 3;
--	}
--}
--
- static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
- 				 struct modal_eep_4k_header *pModal,
- 				 struct ar5416_eeprom_4k *eep,
-@@ -877,6 +846,7 @@ static void ath9k_hw_4k_set_board_values
- 	u8 txRxAttenLocal;
- 	u8 ob[5], db1[5], db2[5];
- 	u8 ant_div_control1, ant_div_control2;
-+	u8 bb_desired_scale;
- 	u32 regVal;
- 
- 	pModal = &eep->modalHeader;
-@@ -1096,30 +1066,29 @@ static void ath9k_hw_4k_set_board_values
- 				      AR_PHY_SETTLING_SWITCH,
- 				      pModal->swSettleHt40);
- 	}
--	if (AR_SREV_9271(ah) || AR_SREV_9285(ah)) {
--		u8 bb_desired_scale = (pModal->bb_scale_smrt_antenna &
--				EEP_4K_BB_DESIRED_SCALE_MASK);
--		if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) {
--			u32 pwrctrl, mask, clr;
--
--			mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25);
--			pwrctrl = mask * bb_desired_scale;
--			clr = mask * 0x1f;
--			REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr);
--			REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr);
--			REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr);
--
--			mask = BIT(0)|BIT(5)|BIT(15);
--			pwrctrl = mask * bb_desired_scale;
--			clr = mask * 0x1f;
--			REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr);
--
--			mask = BIT(0)|BIT(5);
--			pwrctrl = mask * bb_desired_scale;
--			clr = mask * 0x1f;
--			REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr);
--			REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr);
--		}
-+
-+	bb_desired_scale = (pModal->bb_scale_smrt_antenna &
-+			EEP_4K_BB_DESIRED_SCALE_MASK);
-+	if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) {
-+		u32 pwrctrl, mask, clr;
-+
-+		mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25);
-+		pwrctrl = mask * bb_desired_scale;
-+		clr = mask * 0x1f;
-+		REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr);
-+		REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr);
-+		REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr);
-+
-+		mask = BIT(0)|BIT(5)|BIT(15);
-+		pwrctrl = mask * bb_desired_scale;
-+		clr = mask * 0x1f;
-+		REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr);
-+
-+		mask = BIT(0)|BIT(5);
-+		pwrctrl = mask * bb_desired_scale;
-+		clr = mask * 0x1f;
-+		REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr);
-+		REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr);
- 	}
+-	/* extended capabilities */
+-	pos += sizeof(__le16);
+-
+-	/* BF capabilities */
+-	pos += sizeof(__le32);
+-
+-	/* antenna selection */
+-	pos += sizeof(u8);
++	ieee80211_ie_build_ht_cap(pos, sband, cap);
  }
  
-@@ -1161,7 +1130,6 @@ const struct eeprom_ops eep_4k_ops = {
- 	.get_eeprom_ver		= ath9k_hw_4k_get_eeprom_ver,
- 	.get_eeprom_rev		= ath9k_hw_4k_get_eeprom_rev,
- 	.set_board_values	= ath9k_hw_4k_set_board_values,
--	.set_addac		= ath9k_hw_4k_set_addac,
- 	.set_txpower		= ath9k_hw_4k_set_txpower,
- 	.get_spur_channel	= ath9k_hw_4k_get_spur_channel
- };
---- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-@@ -851,10 +851,8 @@ static void ath9k_hw_ar9287_set_txpower(
- 	if (test)
- 		return;
- 
--	if (AR_SREV_9280_20_OR_LATER(ah)) {
--		for (i = 0; i < Ar5416RateSize; i++)
--			ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
--	}
-+	for (i = 0; i < Ar5416RateSize; i++)
-+		ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
- 
- 	ENABLE_REGWRITE_BUFFER(ah);
+ static void ieee80211_send_assoc(struct ieee80211_sub_if_data *sdata,
+@@ -592,7 +565,7 @@ ieee80211_offchannel_tx(struct ieee80211
+ 		/*
+ 		 * After this, offchan_tx.frame remains but now is no
+ 		 * longer a valid pointer -- we still need it as the
+-		 * cookie for canceling this work.
++		 * cookie for canceling this work/status matching.
+ 		 */
+ 		ieee80211_tx_skb(wk->sdata, wk->offchan_tx.frame);
  
-@@ -944,11 +942,6 @@ static void ath9k_hw_ar9287_set_txpower(
- 	REGWRITE_BUFFER_FLUSH(ah);
+--- a/net/wireless/chan.c
++++ b/net/wireless/chan.c
+@@ -44,9 +44,9 @@ rdev_freq_to_chan(struct cfg80211_regist
+ 	return chan;
  }
  
--static void ath9k_hw_ar9287_set_addac(struct ath_hw *ah,
--				      struct ath9k_channel *chan)
--{
--}
--
- static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
- 					     struct ath9k_channel *chan)
+-static bool can_beacon_sec_chan(struct wiphy *wiphy,
+-				struct ieee80211_channel *chan,
+-				enum nl80211_channel_type channel_type)
++bool cfg80211_can_beacon_sec_chan(struct wiphy *wiphy,
++				  struct ieee80211_channel *chan,
++				  enum nl80211_channel_type channel_type)
  {
-@@ -1100,7 +1093,6 @@ const struct eeprom_ops eep_ar9287_ops =
- 	.get_eeprom_ver		= ath9k_hw_ar9287_get_eeprom_ver,
- 	.get_eeprom_rev		= ath9k_hw_ar9287_get_eeprom_rev,
- 	.set_board_values	= ath9k_hw_ar9287_set_board_values,
--	.set_addac		= ath9k_hw_ar9287_set_addac,
- 	.set_txpower		= ath9k_hw_ar9287_set_txpower,
- 	.get_spur_channel	= ath9k_hw_ar9287_get_spur_channel
- };
---- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
-@@ -547,8 +547,7 @@ static void ath9k_hw_def_set_board_value
- 				break;
- 		}
- 
--		if (AR_SREV_5416_20_OR_LATER(ah) &&
--		    (ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0))
-+		if ((ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0))
- 			regChainOffset = (i == 1) ? 0x2000 : 0x1000;
- 		else
- 			regChainOffset = i * 0x1000;
-@@ -565,9 +564,8 @@ static void ath9k_hw_def_set_board_value
- 			  SM(pModal->iqCalQCh[i],
- 			     AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
- 
--		if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah))
--			ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal,
--					      regChainOffset, i);
-+		ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal,
-+				      regChainOffset, i);
- 	}
+ 	struct ieee80211_channel *sec_chan;
+ 	int diff;
+@@ -75,6 +75,7 @@ static bool can_beacon_sec_chan(struct w
  
- 	if (AR_SREV_9280_20_OR_LATER(ah)) {
-@@ -893,8 +891,7 @@ static void ath9k_hw_set_def_power_cal_t
- 		      xpdGainValues[2]);
- 
- 	for (i = 0; i < AR5416_MAX_CHAINS; i++) {
--		if (AR_SREV_5416_20_OR_LATER(ah) &&
--		    (ah->rxchainmask == 5 || ah->txchainmask == 5) &&
-+		if ((ah->rxchainmask == 5 || ah->txchainmask == 5) &&
- 		    (i != 0)) {
- 			regChainOffset = (i == 1) ? 0x2000 : 0x1000;
- 		} else
-@@ -935,27 +932,24 @@ static void ath9k_hw_set_def_power_cal_t
- 
- 			ENABLE_REGWRITE_BUFFER(ah);
- 
--			if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
--				if (OLC_FOR_AR9280_20_LATER) {
--					REG_WRITE(ah,
--						AR_PHY_TPCRG5 + regChainOffset,
--						SM(0x6,
--						AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
--						SM_PD_GAIN(1) | SM_PD_GAIN(2) |
--						SM_PD_GAIN(3) | SM_PD_GAIN(4));
--				} else {
--					REG_WRITE(ah,
--						AR_PHY_TPCRG5 + regChainOffset,
--						SM(pdGainOverlap_t2,
--						AR_PHY_TPCRG5_PD_GAIN_OVERLAP)|
--						SM_PDGAIN_B(0, 1) |
--						SM_PDGAIN_B(1, 2) |
--						SM_PDGAIN_B(2, 3) |
--						SM_PDGAIN_B(3, 4));
--				}
-+			if (OLC_FOR_AR9280_20_LATER) {
-+				REG_WRITE(ah,
-+					AR_PHY_TPCRG5 + regChainOffset,
-+					SM(0x6,
-+					AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
-+					SM_PD_GAIN(1) | SM_PD_GAIN(2) |
-+					SM_PD_GAIN(3) | SM_PD_GAIN(4));
-+			} else {
-+				REG_WRITE(ah,
-+					AR_PHY_TPCRG5 + regChainOffset,
-+					SM(pdGainOverlap_t2,
-+					AR_PHY_TPCRG5_PD_GAIN_OVERLAP)|
-+					SM_PDGAIN_B(0, 1) |
-+					SM_PDGAIN_B(1, 2) |
-+					SM_PDGAIN_B(2, 3) |
-+					SM_PDGAIN_B(3, 4));
- 			}
- 
--
- 			ath9k_adjust_pdadc_values(ah, pwr_table_offset,
- 						  diff, pdadcValues);
- 
---- a/drivers/net/wireless/ath/ath9k/init.c
-+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -506,7 +506,6 @@ static void ath9k_init_misc(struct ath_s
- 		sc->sc_flags |= SC_OP_RXAGGR;
- 	}
- 
--	ath9k_hw_set_diversity(sc->sc_ah, true);
- 	sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah);
- 
- 	memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
---- a/drivers/net/wireless/ath/ath9k/reg.h
-+++ b/drivers/net/wireless/ath/ath9k/reg.h
-@@ -800,10 +800,6 @@
- #define AR_SREV_5416(_ah) \
- 	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
- 	 ((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE))
--#define AR_SREV_5416_20_OR_LATER(_ah) \
--	(((AR_SREV_5416(_ah)) && \
--	 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_20)) || \
--	 ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9100))
- #define AR_SREV_5416_22_OR_LATER(_ah) \
- 	(((AR_SREV_5416(_ah)) && \
- 	 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_22)) || \
---- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
-@@ -869,6 +869,7 @@ static bool ar9002_hw_init_cal(struct at
- 	ar9002_hw_pa_cal(ah, true);
- 
- 	/* Do NF Calibration after DC offset and other calibrations */
-+	ath9k_hw_loadnf(ah, chan);
- 	ath9k_hw_start_nfcal(ah, true);
- 
- 	if (ah->caldata)
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -671,7 +671,6 @@ enum queue_stop_reason {
- 	IEEE80211_QUEUE_STOP_REASON_AGGREGATION,
- 	IEEE80211_QUEUE_STOP_REASON_SUSPEND,
- 	IEEE80211_QUEUE_STOP_REASON_SKB_ADD,
--	IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE,
- };
- 
- #ifdef CONFIG_MAC80211_LEDS
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -1921,24 +1921,8 @@ static void ieee80211_rx_mgmt_beacon(str
- 
- 		rcu_read_unlock();
- 
--		/*
--		 * Whenever the AP announces the HT mode change that can be
--		 * 40MHz intolerant or etc., it would be safer to stop tx
--		 * queues before doing hw config to avoid buffer overflow.
--		 */
--		ieee80211_stop_queues_by_reason(&sdata->local->hw,
--				IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE);
--
--		/* flush out all packets */
--		synchronize_net();
--
--		drv_flush(local, false);
--
- 		changed |= ieee80211_enable_ht(sdata, elems.ht_info_elem,
- 					       bssid, ap_ht_cap_flags);
--
--		ieee80211_wake_queues_by_reason(&sdata->local->hw,
--				IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE);
+ 	return true;
+ }
++EXPORT_SYMBOL(cfg80211_can_beacon_sec_chan);
+ 
+ int cfg80211_set_freq(struct cfg80211_registered_device *rdev,
+ 		      struct wireless_dev *wdev, int freq,
+@@ -109,8 +110,8 @@ int cfg80211_set_freq(struct cfg80211_re
+ 		switch (channel_type) {
+ 		case NL80211_CHAN_HT40PLUS:
+ 		case NL80211_CHAN_HT40MINUS:
+-			if (!can_beacon_sec_chan(&rdev->wiphy, chan,
+-						 channel_type)) {
++			if (!cfg80211_can_beacon_sec_chan(&rdev->wiphy, chan,
++							  channel_type)) {
+ 				printk(KERN_DEBUG
+ 				       "cfg80211: Secondary channel not "
+ 				       "allowed to initiate communication\n");
+--- a/net/wireless/nl80211.c
++++ b/net/wireless/nl80211.c
+@@ -4570,13 +4570,34 @@ static int nl80211_join_ibss(struct sk_b
+ 		ibss.ie_len = nla_len(info->attrs[NL80211_ATTR_IE]);
  	}
  
- 	/* Note: country IE parsing is done for us by cfg80211 */
---- a/drivers/net/wireless/b43/main.c
-+++ b/drivers/net/wireless/b43/main.c
-@@ -1613,7 +1613,8 @@ static void handle_irq_beacon(struct b43
- 	u32 cmd, beacon0_valid, beacon1_valid;
+-	ibss.channel = ieee80211_get_channel(wiphy,
+-		nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]));
++	if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) {
++		enum nl80211_channel_type channel_type;
++
++		channel_type = nla_get_u32(
++				info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]);
++		if (channel_type > NL80211_CHAN_HT40PLUS)
++			return -EINVAL;
++		ibss.channel_type = channel_type;
++	} else {
++		ibss.channel_type = NL80211_CHAN_NO_HT;
++	}
++
++	ibss.channel = rdev_freq_to_chan(rdev,
++		nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]),
++		ibss.channel_type);
+ 	if (!ibss.channel ||
++	    ibss.channel->flags & IEEE80211_CHAN_RADAR ||
+ 	    ibss.channel->flags & IEEE80211_CHAN_NO_IBSS ||
+ 	    ibss.channel->flags & IEEE80211_CHAN_DISABLED)
+ 		return -EINVAL;
  
- 	if (!b43_is_mode(wl, NL80211_IFTYPE_AP) &&
--	    !b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT))
-+	    !b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) &&
-+	    !b43_is_mode(wl, NL80211_IFTYPE_ADHOC))
- 		return;
++	/* Both channels should be able to initiate communication */
++	if ((ibss.channel_type == NL80211_CHAN_HT40PLUS ||
++	     ibss.channel_type == NL80211_CHAN_HT40MINUS) &&
++	    !cfg80211_can_beacon_sec_chan(&rdev->wiphy, ibss.channel,
++					  ibss.channel_type))
++		return -EINVAL;
++
+ 	ibss.channel_fixed = !!info->attrs[NL80211_ATTR_FREQ_FIXED];
+ 	ibss.privacy = !!info->attrs[NL80211_ATTR_PRIVACY];
  
- 	/* This is the bottom half of the asynchronous beacon update. */
diff --git a/package/mac80211/patches/310-ibss_ht.patch b/package/mac80211/patches/310-ibss_ht.patch
deleted file mode 100644
index 6e0de5b467..0000000000
--- a/package/mac80211/patches/310-ibss_ht.patch
+++ /dev/null
@@ -1,720 +0,0 @@
---- a/include/net/cfg80211.h
-+++ b/include/net/cfg80211.h
-@@ -1101,6 +1101,7 @@ struct cfg80211_ibss_params {
- 	u8 *ssid;
- 	u8 *bssid;
- 	struct ieee80211_channel *channel;
-+	enum nl80211_channel_type channel_type;
- 	u8 *ie;
- 	u8 ssid_len, ie_len;
- 	u16 beacon_interval;
-@@ -2612,6 +2613,12 @@ struct cfg80211_bss *cfg80211_get_bss(st
- 				      const u8 *bssid,
- 				      const u8 *ssid, size_t ssid_len,
- 				      u16 capa_mask, u16 capa_val);
-+struct cfg80211_bss *cfg80211_get_bss_ht(struct wiphy *wiphy,
-+					  struct ieee80211_channel *channel,
-+					  const u8 *bssid,
-+					  const u8 *ssid, size_t ssid_len,
-+					  u16 capa_mask, u16 capa_val,
-+				       enum nl80211_channel_type channel_type);
- static inline struct cfg80211_bss *
- cfg80211_get_ibss(struct wiphy *wiphy,
- 		  struct ieee80211_channel *channel,
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -4539,13 +4539,41 @@ static int nl80211_join_ibss(struct sk_b
- 		ibss.ie_len = nla_len(info->attrs[NL80211_ATTR_IE]);
- 	}
- 
--	ibss.channel = ieee80211_get_channel(wiphy,
--		nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]));
-+	if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) {
-+		enum nl80211_channel_type channel_type;
-+
-+		channel_type = nla_get_u32(
-+			info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]);
-+		if (channel_type != NL80211_CHAN_NO_HT &&
-+		    channel_type != NL80211_CHAN_HT20 &&
-+		    channel_type != NL80211_CHAN_HT40PLUS &&
-+		    channel_type != NL80211_CHAN_HT40MINUS)
-+			return -EINVAL;
-+		ibss.channel_type = channel_type;
-+	} else {
-+		ibss.channel_type = NL80211_CHAN_NO_HT;
-+	}
-+
-+	ibss.channel = rdev_freq_to_chan(rdev,
-+		nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]),
-+		ibss.channel_type);
- 	if (!ibss.channel ||
-+	    ibss.channel->flags & IEEE80211_CHAN_PASSIVE_SCAN ||
- 	    ibss.channel->flags & IEEE80211_CHAN_NO_IBSS ||
--	    ibss.channel->flags & IEEE80211_CHAN_DISABLED)
-+	    ibss.channel->flags & IEEE80211_CHAN_RADAR)
- 		return -EINVAL;
- 
-+	/* Both channels should be able to initiate communication */
-+	if ((ibss.channel_type == NL80211_CHAN_HT40PLUS ||
-+	     ibss.channel_type == NL80211_CHAN_HT40MINUS) &&
-+	    !can_beacon_sec_chan(&rdev->wiphy, ibss.channel,
-+				 ibss.channel_type)) {
-+		printk(KERN_DEBUG
-+		       "cfg80211: Secondary channel not "
-+		       "allowed to initiate communication\n");
-+		return -EINVAL;
-+	}
-+
- 	ibss.channel_fixed = !!info->attrs[NL80211_ATTR_FREQ_FIXED];
- 	ibss.privacy = !!info->attrs[NL80211_ATTR_PRIVACY];
- 
---- a/net/wireless/chan.c
-+++ b/net/wireless/chan.c
-@@ -44,7 +44,7 @@ rdev_freq_to_chan(struct cfg80211_regist
- 	return chan;
- }
- 
--static bool can_beacon_sec_chan(struct wiphy *wiphy,
-+bool can_beacon_sec_chan(struct wiphy *wiphy,
- 				struct ieee80211_channel *chan,
- 				enum nl80211_channel_type channel_type)
- {
-@@ -75,6 +75,7 @@ static bool can_beacon_sec_chan(struct w
- 
- 	return true;
- }
-+EXPORT_SYMBOL(can_beacon_sec_chan);
- 
- int cfg80211_set_freq(struct cfg80211_registered_device *rdev,
- 		      struct wireless_dev *wdev, int freq,
---- a/net/wireless/core.h
-+++ b/net/wireless/core.h
-@@ -439,6 +439,9 @@ cfg80211_can_add_interface(struct cfg802
- struct ieee80211_channel *
- rdev_freq_to_chan(struct cfg80211_registered_device *rdev,
- 		  int freq, enum nl80211_channel_type channel_type);
-+bool can_beacon_sec_chan(struct wiphy *wiphy,
-+				struct ieee80211_channel *chan,
-+				enum nl80211_channel_type channel_type);
- int cfg80211_set_freq(struct cfg80211_registered_device *rdev,
- 		      struct wireless_dev *wdev, int freq,
- 		      enum nl80211_channel_type channel_type);
---- a/net/wireless/scan.c
-+++ b/net/wireless/scan.c
-@@ -365,6 +365,19 @@ struct cfg80211_bss *cfg80211_get_bss(st
- 				      const u8 *ssid, size_t ssid_len,
- 				      u16 capa_mask, u16 capa_val)
- {
-+	/* call HT version with no HT requirements */
-+	return cfg80211_get_bss_ht(wiphy, channel, bssid, ssid, ssid_len,
-+				   capa_mask, capa_val, NL80211_CHAN_NO_HT);
-+}
-+EXPORT_SYMBOL(cfg80211_get_bss);
-+
-+struct cfg80211_bss *cfg80211_get_bss_ht(struct wiphy *wiphy,
-+				      struct ieee80211_channel *channel,
-+				      const u8 *bssid,
-+				      const u8 *ssid, size_t ssid_len,
-+				      u16 capa_mask, u16 capa_val,
-+				      enum nl80211_channel_type require_ht)
-+{
- 	struct cfg80211_registered_device *dev = wiphy_to_dev(wiphy);
- 	struct cfg80211_internal_bss *bss, *res = NULL;
- 	unsigned long now = jiffies;
-@@ -374,8 +387,26 @@ struct cfg80211_bss *cfg80211_get_bss(st
- 	list_for_each_entry(bss, &dev->bss_list, list) {
- 		if ((bss->pub.capability & capa_mask) != capa_val)
- 			continue;
--		if (channel && bss->pub.channel != channel)
--			continue;
-+		if (channel) {
-+			if (bss->pub.channel != channel)
-+				continue;
-+			if (require_ht != NL80211_CHAN_NO_HT) {
-+				struct ieee80211_ht_info *ht_info;
-+				ht_info = (struct ieee80211_ht_info *)
-+					ieee80211_bss_get_ie(&bss->pub,
-+						       WLAN_EID_HT_INFORMATION);
-+				if (!ht_info)
-+					continue;
-+				if (require_ht == NL80211_CHAN_HT40MINUS &&
-+					      !(ht_info->ht_param &
-+					      IEEE80211_HT_PARAM_CHA_SEC_BELOW))
-+					continue;
-+				if (require_ht == NL80211_CHAN_HT40PLUS &&
-+					      !(ht_info->ht_param &
-+					      IEEE80211_HT_PARAM_CHA_SEC_ABOVE))
-+					continue;
-+			}
-+		}
- 		/* Don't get expired BSS structs */
- 		if (time_after(now, bss->ts + IEEE80211_SCAN_RESULT_EXPIRE) &&
- 		    !atomic_read(&bss->hold))
-@@ -392,7 +423,7 @@ struct cfg80211_bss *cfg80211_get_bss(st
- 		return NULL;
- 	return &res->pub;
- }
--EXPORT_SYMBOL(cfg80211_get_bss);
-+EXPORT_SYMBOL(cfg80211_get_bss_ht);
- 
- struct cfg80211_bss *cfg80211_get_mesh(struct wiphy *wiphy,
- 				       struct ieee80211_channel *channel,
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -465,6 +465,7 @@ struct ieee80211_if_ibss {
- 	u8 ssid_len, ie_len;
- 	u8 *ie;
- 	struct ieee80211_channel *channel;
-+	enum nl80211_channel_type channel_type;
- 
- 	unsigned long ibss_join_req;
- 	/* probe response/beacon for IBSS */
-@@ -1090,6 +1091,7 @@ void ieee80211_ibss_notify_scan_complete
- void ieee80211_ibss_setup_sdata(struct ieee80211_sub_if_data *sdata);
- struct sta_info *ieee80211_ibss_add_sta(struct ieee80211_sub_if_data *sdata,
- 					u8 *bssid, u8 *addr, u32 supp_rates,
-+					struct ieee80211_ht_cap *ht_cap,
- 					gfp_t gfp);
- int ieee80211_ibss_join(struct ieee80211_sub_if_data *sdata,
- 			struct cfg80211_ibss_params *params);
-@@ -1343,6 +1345,12 @@ void ieee80211_recalc_smps(struct ieee80
- size_t ieee80211_ie_split(const u8 *ies, size_t ielen,
- 			  const u8 *ids, int n_ids, size_t offset);
- size_t ieee80211_ie_split_vendor(const u8 *ies, size_t ielen, size_t offset);
-+u8 *ieee80211_ie_build_ht_cap(u8 *pos, struct ieee80211_supported_band *sband,
-+			       u16 cap);
-+u8 *ieee80211_ie_build_ht_info(u8 *pos,
-+				struct ieee80211_sta_ht_cap *ht_cap,
-+				struct ieee80211_channel *channel,
-+				enum nl80211_channel_type channel_type);
- 
- /* internal work items */
- void ieee80211_work_init(struct ieee80211_local *local);
-@@ -1371,6 +1379,8 @@ ieee80211_get_channel_mode(struct ieee80
- bool ieee80211_set_channel_type(struct ieee80211_local *local,
- 				struct ieee80211_sub_if_data *sdata,
- 				enum nl80211_channel_type chantype);
-+enum nl80211_channel_type ieee80211_ht_info_to_channel_type(
-+					struct ieee80211_ht_info *ht_info);
- 
- #ifdef CONFIG_MAC80211_NOINLINE
- #define debug_noinline noinline
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -839,23 +839,8 @@ int ieee80211_build_preq_ies(struct ieee
- 		offset = noffset;
- 	}
- 
--	if (sband->ht_cap.ht_supported) {
--		u16 cap = sband->ht_cap.cap;
--		__le16 tmp;
--
--		*pos++ = WLAN_EID_HT_CAPABILITY;
--		*pos++ = sizeof(struct ieee80211_ht_cap);
--		memset(pos, 0, sizeof(struct ieee80211_ht_cap));
--		tmp = cpu_to_le16(cap);
--		memcpy(pos, &tmp, sizeof(u16));
--		pos += sizeof(u16);
--		*pos++ = sband->ht_cap.ampdu_factor |
--			 (sband->ht_cap.ampdu_density <<
--				IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
--		memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
--		pos += sizeof(sband->ht_cap.mcs);
--		pos += 2 + 4 + 1; /* ext info, BF cap, antsel */
--	}
-+	if (sband->ht_cap.ht_supported)
-+		pos = ieee80211_ie_build_ht_cap(pos, sband, sband->ht_cap.cap);
- 
- 	/*
- 	 * If adding more here, adjust code in main.c
-@@ -1378,3 +1363,100 @@ void ieee80211_disable_rssi_reports(stru
- 	_ieee80211_enable_rssi_reports(sdata, 0, 0);
- }
- EXPORT_SYMBOL(ieee80211_disable_rssi_reports);
-+
-+u8 *ieee80211_ie_build_ht_cap(u8 *pos, struct ieee80211_supported_band *sband,
-+			       u16 cap)
-+{
-+	__le16 tmp;
-+
-+	*pos++ = WLAN_EID_HT_CAPABILITY;
-+	*pos++ = sizeof(struct ieee80211_ht_cap);
-+	memset(pos, 0, sizeof(struct ieee80211_ht_cap));
-+
-+	/* capability flags */
-+	tmp = cpu_to_le16(cap);
-+	memcpy(pos, &tmp, sizeof(u16));
-+	pos += sizeof(u16);
-+
-+	/* AMPDU parameters */
-+	*pos++ = sband->ht_cap.ampdu_factor |
-+		 (sband->ht_cap.ampdu_density <<
-+			IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
-+
-+	/* MCS set */
-+	memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
-+	pos += sizeof(sband->ht_cap.mcs);
-+
-+	/* extended capabilities */
-+	pos += sizeof(__le16);
-+
-+	/* BF capabilities */
-+	pos += sizeof(__le32);
-+
-+	/* antenna selection */
-+	pos += sizeof(u8);
-+
-+	return pos;
-+}
-+
-+u8 *ieee80211_ie_build_ht_info(u8 *pos,
-+				struct ieee80211_sta_ht_cap *ht_cap,
-+				struct ieee80211_channel *channel,
-+				enum nl80211_channel_type channel_type)
-+{
-+	struct ieee80211_ht_info *ht_info;
-+	/* Build HT Information */
-+	*pos++ = WLAN_EID_HT_INFORMATION;
-+	*pos++ = sizeof(struct ieee80211_ht_info);
-+	ht_info = (struct ieee80211_ht_info *)pos;
-+	ht_info->control_chan =
-+			ieee80211_frequency_to_channel(channel->center_freq);
-+	switch (channel_type) {
-+	case NL80211_CHAN_HT40MINUS:
-+		ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
-+		break;
-+	case NL80211_CHAN_HT40PLUS:
-+		ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
-+		break;
-+	case NL80211_CHAN_HT20:
-+	default:
-+		ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_NONE;
-+		break;
-+	}
-+	if (ht_cap->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
-+		ht_info->ht_param |= IEEE80211_HT_PARAM_CHAN_WIDTH_ANY;
-+	ht_info->operation_mode = 0x0000;
-+	ht_info->stbc_param = 0x0000;
-+
-+	/* It seems that Basic MCS set and Supported MCS set
-+	   are identical for the first 10 bytes */
-+	memset(&ht_info->basic_set, 0, 16);
-+	memcpy(&ht_info->basic_set, &ht_cap->mcs, 10);
-+
-+	return pos + sizeof(struct ieee80211_ht_info);
-+}
-+
-+enum nl80211_channel_type ieee80211_ht_info_to_channel_type(
-+					struct ieee80211_ht_info *ht_info)
-+{
-+	enum nl80211_channel_type channel_type;
-+
-+	if (!ht_info)
-+		return NL80211_CHAN_NO_HT;
-+
-+	switch (ht_info->ht_param & IEEE80211_HT_PARAM_CHA_SEC_OFFSET) {
-+	case IEEE80211_HT_PARAM_CHA_SEC_NONE:
-+		channel_type = NL80211_CHAN_HT20;
-+		break;
-+	case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
-+		channel_type = NL80211_CHAN_HT40PLUS;
-+		break;
-+	case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
-+		channel_type = NL80211_CHAN_HT40MINUS;
-+		break;
-+	default:
-+		channel_type = NL80211_CHAN_NO_HT;
-+	}
-+
-+	return channel_type;
-+}
---- a/net/mac80211/work.c
-+++ b/net/mac80211/work.c
-@@ -118,7 +118,6 @@ static void ieee80211_add_ht_ie(struct s
- 	u8 *pos;
- 	u32 flags = channel->flags;
- 	u16 cap = sband->ht_cap.cap;
--	__le16 tmp;
- 
- 	if (!sband->ht_cap.ht_supported)
- 		return;
-@@ -169,34 +168,8 @@ static void ieee80211_add_ht_ie(struct s
- 	}
- 
- 	/* reserve and fill IE */
--
- 	pos = skb_put(skb, sizeof(struct ieee80211_ht_cap) + 2);
--	*pos++ = WLAN_EID_HT_CAPABILITY;
--	*pos++ = sizeof(struct ieee80211_ht_cap);
--	memset(pos, 0, sizeof(struct ieee80211_ht_cap));
--
--	/* capability flags */
--	tmp = cpu_to_le16(cap);
--	memcpy(pos, &tmp, sizeof(u16));
--	pos += sizeof(u16);
--
--	/* AMPDU parameters */
--	*pos++ = sband->ht_cap.ampdu_factor |
--		 (sband->ht_cap.ampdu_density <<
--			IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
--
--	/* MCS set */
--	memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
--	pos += sizeof(sband->ht_cap.mcs);
--
--	/* extended capabilities */
--	pos += sizeof(__le16);
--
--	/* BF capabilities */
--	pos += sizeof(__le32);
--
--	/* antenna selection */
--	pos += sizeof(u8);
-+	ieee80211_ie_build_ht_cap(pos, sband, cap);
- }
- 
- static void ieee80211_send_assoc(struct ieee80211_sub_if_data *sdata,
---- a/net/mac80211/agg-tx.c
-+++ b/net/mac80211/agg-tx.c
-@@ -82,6 +82,8 @@ static void ieee80211_send_addba_request
- 		memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
- 	else if (sdata->vif.type == NL80211_IFTYPE_STATION)
- 		memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-+	else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
-+		memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
- 
- 	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- 					  IEEE80211_STYPE_ACTION);
-@@ -399,7 +401,8 @@ int ieee80211_start_tx_ba_session(struct
- 	if (sdata->vif.type != NL80211_IFTYPE_STATION &&
- 	    sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
- 	    sdata->vif.type != NL80211_IFTYPE_AP &&
--	    sdata->vif.type != NL80211_IFTYPE_WDS)
-+	    sdata->vif.type != NL80211_IFTYPE_WDS &&
-+	    sdata->vif.type != NL80211_IFTYPE_ADHOC)
- 		return -EINVAL;
- 
- 	if (test_sta_flags(sta, WLAN_STA_BLOCK_BA)) {
---- a/net/mac80211/ht.c
-+++ b/net/mac80211/ht.c
-@@ -199,6 +199,8 @@ void ieee80211_send_delba(struct ieee802
- 		memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
- 	else if (sdata->vif.type == NL80211_IFTYPE_STATION)
- 		memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-+	else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
-+		memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
- 
- 	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- 					  IEEE80211_STYPE_ACTION);
---- a/net/mac80211/ibss.c
-+++ b/net/mac80211/ibss.c
-@@ -35,6 +35,76 @@
- 
- #define IEEE80211_IBSS_MAX_STA_ENTRIES 128
- 
-+static bool ieee80211_can_use_ext_chan(struct ieee80211_sub_if_data *sdata,
-+				       struct ieee80211_channel *channel,
-+				       enum nl80211_channel_type channel_type)
-+{
-+	/* check if we are legally allowed to use HT extension channel */
-+	if ((channel_type == NL80211_CHAN_HT40PLUS) ||
-+			(channel_type == NL80211_CHAN_HT40MINUS)) {
-+		int sec_freq = channel->center_freq +
-+			     (channel_type == NL80211_CHAN_HT40PLUS ? 20 : -20);
-+		struct ieee80211_channel *sec_chan =
-+			     ieee80211_get_channel(sdata->wdev.wiphy, sec_freq);
-+		if (!sec_chan || sec_chan->flags & (IEEE80211_CHAN_DISABLED |
-+					   IEEE80211_CHAN_PASSIVE_SCAN |
-+					   IEEE80211_CHAN_NO_IBSS |
-+					   IEEE80211_CHAN_RADAR)) {
-+			return false;
-+		}
-+	}
-+	return true;
-+}
-+
-+static void ieee80211_update_ht_elems(struct ieee80211_sub_if_data *sdata,
-+				      struct ieee80211_mgmt *mgmt,
-+				      struct ieee80211_ht_info *ht_info)
-+{
-+	struct ieee80211_local *local = sdata->local;
-+	struct ieee80211_supported_band *sband =
-+			local->hw.wiphy->bands[local->oper_channel->band];
-+	enum nl80211_channel_type channel_type =
-+			ieee80211_ht_info_to_channel_type(ht_info);
-+
-+	if (!ieee80211_can_use_ext_chan(sdata, local->oper_channel, channel_type))
-+		channel_type = NL80211_CHAN_HT20;
-+
-+	if (channel_type != local->_oper_channel_type) {
-+		struct sk_buff *skb = rcu_dereference_protected(
-+				sdata->u.ibss.presp,
-+				lockdep_is_held(&ifibss->mtx));
-+		struct sk_buff *nskb;
-+		u8 *ht_ie;
-+
-+		/* update HT IE. If not yet existing, create one */
-+		nskb = skb_copy(skb, GFP_ATOMIC);
-+		ht_ie = (u8 *)cfg80211_find_ie(WLAN_EID_HT_CAPABILITY,
-+					       (const u8 *)(nskb->data + 24 +
-+							sizeof(mgmt->u.beacon)),
-+					       nskb->len - 24 -
-+							sizeof(mgmt->u.beacon));
-+		if (!ht_ie)
-+			ht_ie = skb_put(nskb, 4 +
-+					      sizeof(struct ieee80211_ht_cap) +
-+					      sizeof(struct ieee80211_ht_info));
-+
-+		ht_ie = ieee80211_ie_build_ht_cap(ht_ie, sband,
-+						  sband->ht_cap.cap);
-+		ht_ie = ieee80211_ie_build_ht_info(ht_ie, &sband->ht_cap,
-+					     local->oper_channel, channel_type);
-+		rcu_assign_pointer(sdata->u.ibss.presp, nskb);
-+		kfree_skb(skb);
-+
-+		if(!ieee80211_set_channel_type(local, sdata, channel_type)) {
-+			channel_type = NL80211_CHAN_HT20;
-+			WARN_ON(!ieee80211_set_channel_type(local, sdata,
-+							    channel_type));
-+		}
-+
-+		ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
-+	}
-+
-+}
- 
- static void ieee80211_rx_mgmt_auth_ibss(struct ieee80211_sub_if_data *sdata,
- 					struct ieee80211_mgmt *mgmt,
-@@ -64,6 +134,7 @@ static void ieee80211_rx_mgmt_auth_ibss(
- static void __ieee80211_sta_join_ibss(struct ieee80211_sub_if_data *sdata,
- 				      const u8 *bssid, const int beacon_int,
- 				      struct ieee80211_channel *chan,
-+				      enum nl80211_channel_type channel_type,
- 				      const u32 basic_rates,
- 				      const u16 capability, u64 tsf)
- {
-@@ -104,8 +175,17 @@ static void __ieee80211_sta_join_ibss(st
- 
- 	sdata->drop_unencrypted = capability & WLAN_CAPABILITY_PRIVACY ? 1 : 0;
- 
-+	/* entering a legacy IBSS. Use given HT configuration. */
-+	if (channel_type == NL80211_CHAN_NO_HT)
-+		channel_type = ifibss->channel_type;
- 	local->oper_channel = chan;
--	WARN_ON(!ieee80211_set_channel_type(local, sdata, NL80211_CHAN_NO_HT));
-+
-+	/* if phy is on a different extension channel, setting ht40 will fail */
-+	if (!ieee80211_set_channel_type(local, sdata, channel_type)) {
-+		channel_type = NL80211_CHAN_HT20;
-+		WARN_ON(!ieee80211_set_channel_type(local, sdata,
-+				                                 channel_type));
-+	}
- 	ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
- 
- 	sband = local->hw.wiphy->bands[chan->band];
-@@ -171,6 +251,18 @@ static void __ieee80211_sta_join_ibss(st
- 		memcpy(skb_put(skb, ifibss->ie_len),
- 		       ifibss->ie, ifibss->ie_len);
- 
-+	/* add HT capability and information IEs */
-+	if (channel_type != NL80211_CHAN_NO_HT && sband->ht_cap.ht_supported) {
-+		pos = skb_put(skb, 4 +
-+				   sizeof(struct ieee80211_ht_cap) +
-+				   sizeof(struct ieee80211_ht_info));
-+		pos = ieee80211_ie_build_ht_cap(pos, sband, sband->ht_cap.cap);
-+		pos = ieee80211_ie_build_ht_info(pos,
-+						 &sband->ht_cap,
-+						 chan,
-+						 channel_type);
-+	}
-+
- 	if (local->hw.queues >= 4) {
- 		pos = skb_put(skb, 9);
- 		*pos++ = WLAN_EID_VENDOR_SPECIFIC;
-@@ -219,6 +311,8 @@ static void ieee80211_sta_join_ibss(stru
- 	u32 basic_rates;
- 	int i, j;
- 	u16 beacon_int = cbss->beacon_interval;
-+	const u8 *ht_info_ie;
-+	enum nl80211_channel_type channel_type = NL80211_CHAN_NO_HT;
- 
- 	lockdep_assert_held(&sdata->u.ibss.mtx);
- 
-@@ -242,9 +336,23 @@ static void ieee80211_sta_join_ibss(stru
- 		}
- 	}
- 
-+	ht_info_ie = ieee80211_bss_get_ie(cbss, WLAN_EID_HT_INFORMATION);
-+	if (ht_info_ie)
-+		channel_type = ieee80211_ht_info_to_channel_type(
-+			(struct ieee80211_ht_info *) (ht_info_ie + 2));
-+
-+	if (!ieee80211_can_use_ext_chan(sdata, cbss->channel, channel_type)) {
-+		channel_type = NL80211_CHAN_HT20;
-+#ifdef CONFIG_MAC80211_IBSS_DEBUG
-+		printk(KERN_DEBUG "%s: IBSS not allowed on secondary channel\n",
-+		       sdata->name);
-+#endif
-+	}
-+
- 	__ieee80211_sta_join_ibss(sdata, cbss->bssid,
- 				  beacon_int,
- 				  cbss->channel,
-+				  channel_type,
- 				  basic_rates,
- 				  cbss->capability,
- 				  cbss->tsf);
-@@ -310,11 +418,24 @@ static void ieee80211_rx_bss_info(struct
- 			} else
- 				sta = ieee80211_ibss_add_sta(sdata, mgmt->bssid,
- 						mgmt->sa, supp_rates,
--						GFP_ATOMIC);
-+						elems->ht_cap_elem, GFP_ATOMIC);
- 		}
- 
--		if (sta && elems->wmm_info)
--			set_sta_flags(sta, WLAN_STA_WME);
-+		if (sta) {
-+			if (elems->wmm_info)
-+				set_sta_flags(sta, WLAN_STA_WME);
-+
-+			/* remote station uses ht */
-+			if (elems->ht_info_elem) {
-+				ieee80211_update_ht_elems(sdata, mgmt,
-+							  elems->ht_info_elem);
-+				ieee80211_ht_cap_ie_to_sta_ht_cap(
-+						local->hw.wiphy->bands[
-+						     local->oper_channel->band],
-+						elems->ht_cap_elem,
-+						&sta->sta.ht_cap);
-+			}
-+		}
- 
- 		rcu_read_unlock();
- 	}
-@@ -404,7 +525,7 @@ static void ieee80211_rx_bss_info(struct
- 		ieee80211_sta_join_ibss(sdata, bss);
- 		supp_rates = ieee80211_sta_get_rates(local, elems, band);
- 		ieee80211_ibss_add_sta(sdata, mgmt->bssid, mgmt->sa,
--				       supp_rates, GFP_KERNEL);
-+				    supp_rates, elems->ht_cap_elem, GFP_KERNEL);
- 	}
- 
-  put_bss:
-@@ -417,7 +538,8 @@ static void ieee80211_rx_bss_info(struct
-  * must be callable in atomic context.
-  */
- struct sta_info *ieee80211_ibss_add_sta(struct ieee80211_sub_if_data *sdata,
--					u8 *bssid,u8 *addr, u32 supp_rates,
-+					u8 *bssid, u8 *addr, u32 supp_rates,
-+					struct ieee80211_ht_cap *ht_cap,
- 					gfp_t gfp)
- {
- 	struct ieee80211_if_ibss *ifibss = &sdata->u.ibss;
-@@ -458,6 +580,11 @@ struct sta_info *ieee80211_ibss_add_sta(
- 	sta->sta.supp_rates[band] = supp_rates |
- 			ieee80211_mandatory_rates(local, band);
- 
-+	/* fill in ht rates */
-+	if (ht_cap)
-+		ieee80211_ht_cap_ie_to_sta_ht_cap(local->hw.wiphy->bands[band],
-+				ht_cap, &sta->sta.ht_cap);
-+
- 	rate_control_rate_init(sta);
- 
- 	/* If it fails, maybe we raced another insertion? */
-@@ -556,8 +683,8 @@ static void ieee80211_sta_create_ibss(st
- 		sdata->drop_unencrypted = 0;
- 
- 	__ieee80211_sta_join_ibss(sdata, bssid, sdata->vif.bss_conf.beacon_int,
--				  ifibss->channel, ifibss->basic_rates,
--				  capability, 0);
-+				  ifibss->channel, ifibss->channel_type,
-+				  ifibss->basic_rates, capability, 0);
- }
- 
- /*
-@@ -594,10 +721,10 @@ static void ieee80211_sta_find_ibss(stru
- 		chan = ifibss->channel;
- 	if (!is_zero_ether_addr(ifibss->bssid))
- 		bssid = ifibss->bssid;
--	cbss = cfg80211_get_bss(local->hw.wiphy, chan, bssid,
-+	cbss = cfg80211_get_bss_ht(local->hw.wiphy, chan, bssid,
- 				ifibss->ssid, ifibss->ssid_len,
- 				WLAN_CAPABILITY_IBSS | WLAN_CAPABILITY_PRIVACY,
--				capability);
-+				capability, ifibss->channel_type);
- 
- 	if (cbss) {
- 		struct ieee80211_bss *bss;
-@@ -896,10 +1023,15 @@ int ieee80211_ibss_join(struct ieee80211
- 	struct sk_buff *skb;
- 
- 	skb = dev_alloc_skb(sdata->local->hw.extra_tx_headroom +
--			    36 /* bitrates */ +
--			    34 /* SSID */ +
--			    3  /* DS params */ +
--			    4  /* IBSS params */ +
-+			    sizeof(struct ieee80211_hdr_3addr) +
-+			    12 /* struct ieee80211_mgmt.u.beacon */ +
-+			    2 + IEEE80211_MAX_SSID_LEN /* max SSID */ +
-+			    2 + 8 /* max Supported Rates */ +
-+			    3 /* max DS params */ +
-+			    4 /* IBSS params */ +
-+			    2 + (IEEE80211_MAX_SUPP_RATES - 8) +
-+			    2 + sizeof(struct ieee80211_ht_cap) +
-+			    2 + sizeof(struct ieee80211_ht_info) +
- 			    params->ie_len);
- 	if (!skb)
- 		return -ENOMEM;
-@@ -920,13 +1052,15 @@ int ieee80211_ibss_join(struct ieee80211
- 	sdata->vif.bss_conf.beacon_int = params->beacon_interval;
- 
- 	sdata->u.ibss.channel = params->channel;
-+	sdata->u.ibss.channel_type = params->channel_type;
- 	sdata->u.ibss.fixed_channel = params->channel_fixed;
- 
- 	/* fix ourselves to that channel now already */
- 	if (params->channel_fixed) {
- 		sdata->local->oper_channel = params->channel;
--		WARN_ON(!ieee80211_set_channel_type(sdata->local, sdata,
--						    NL80211_CHAN_NO_HT));
-+		if(!ieee80211_set_channel_type(sdata->local, sdata,
-+					       params->channel_type))
-+			return -EINVAL;
- 	}
- 
- 	if (params->ie) {
---- a/net/mac80211/rx.c
-+++ b/net/mac80211/rx.c
-@@ -2164,7 +2164,8 @@ ieee80211_rx_h_action(struct ieee80211_r
- 		if (sdata->vif.type != NL80211_IFTYPE_STATION &&
- 		    sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
- 		    sdata->vif.type != NL80211_IFTYPE_AP &&
--		    sdata->vif.type != NL80211_IFTYPE_WDS)
-+		    sdata->vif.type != NL80211_IFTYPE_WDS &&
-+		    sdata->vif.type != NL80211_IFTYPE_ADHOC)
- 			break;
- 
- 		/* verify action_code is present */
-@@ -2699,7 +2700,8 @@ static int prepare_for_handlers(struct i
- 			else
- 				rate_idx = status->rate_idx;
- 			rx->sta = ieee80211_ibss_add_sta(sdata, bssid,
--					hdr->addr2, BIT(rate_idx), GFP_ATOMIC);
-+					hdr->addr2, BIT(rate_idx), NULL,
-+								GFP_ATOMIC);
- 		}
- 		break;
- 	case NL80211_IFTYPE_MESH_POINT:
---- a/net/mac80211/agg-rx.c
-+++ b/net/mac80211/agg-rx.c
-@@ -182,6 +182,8 @@ static void ieee80211_send_addba_resp(st
- 		memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
- 	else if (sdata->vif.type == NL80211_IFTYPE_WDS)
- 		memcpy(mgmt->bssid, da, ETH_ALEN);
-+	else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
-+		memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
- 
- 	mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- 					  IEEE80211_STYPE_ACTION);
diff --git a/package/mac80211/patches/400-ath_move_debug_code.patch b/package/mac80211/patches/400-ath_move_debug_code.patch
index f92d38f246..c322dd3e5b 100644
--- a/package/mac80211/patches/400-ath_move_debug_code.patch
+++ b/package/mac80211/patches/400-ath_move_debug_code.patch
@@ -11,7 +11,7 @@
 +		debug.o
 --- a/drivers/net/wireless/ath/ath.h
 +++ b/drivers/net/wireless/ath/ath.h
-@@ -274,13 +274,6 @@ void ath_dbg(struct ath_common *common, 
+@@ -272,13 +272,6 @@ void ath_dbg(struct ath_common *common, 
  #endif /* CONFIG_ATH_DEBUG */
  
  /** Returns string describing opmode, or NULL if unknown mode. */
diff --git a/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch b/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch
index cc59b75fe7..bd4354813b 100644
--- a/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch
+++ b/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch
@@ -8,7 +8,7 @@
  #include <asm/unaligned.h>
  
  #include "hw.h"
-@@ -460,8 +461,16 @@ static int ath9k_hw_init_macaddr(struct 
+@@ -464,8 +465,16 @@ static int ath9k_hw_init_macaddr(struct 
  		common->macaddr[2 * i] = eeval >> 8;
  		common->macaddr[2 * i + 1] = eeval & 0xff;
  	}
diff --git a/package/mac80211/patches/406-regd_no_assoc_hints.patch b/package/mac80211/patches/406-regd_no_assoc_hints.patch
index 14ea04b5af..c99cce4679 100644
--- a/package/mac80211/patches/406-regd_no_assoc_hints.patch
+++ b/package/mac80211/patches/406-regd_no_assoc_hints.patch
@@ -1,6 +1,6 @@
 --- a/net/wireless/reg.c
 +++ b/net/wireless/reg.c
-@@ -1653,6 +1653,8 @@ void regulatory_hint_11d(struct wiphy *w
+@@ -1654,6 +1654,8 @@ void regulatory_hint_11d(struct wiphy *w
  	enum environment_cap env = ENVIRON_ANY;
  	struct regulatory_request *request;
  
@@ -9,7 +9,7 @@
  	mutex_lock(&reg_mutex);
  
  	if (unlikely(!last_request))
-@@ -1859,6 +1861,8 @@ static void restore_regulatory_settings(
+@@ -1860,6 +1862,8 @@ static void restore_regulatory_settings(
  
  void regulatory_hint_disconnect(void)
  {
diff --git a/package/mac80211/patches/410-ath9k_allow_adhoc_and_ap.patch b/package/mac80211/patches/410-ath9k_allow_adhoc_and_ap.patch
index f9050d56a4..e909806b1b 100644
--- a/package/mac80211/patches/410-ath9k_allow_adhoc_and_ap.patch
+++ b/package/mac80211/patches/410-ath9k_allow_adhoc_and_ap.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/main.c
 +++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1473,15 +1473,6 @@ static int ath9k_add_interface(struct ie
+@@ -1486,15 +1486,6 @@ static int ath9k_add_interface(struct ie
  		}
  	}
  
@@ -16,7 +16,7 @@
  	ath_dbg(common, ATH_DBG_CONFIG,
  		"Attach a VIF of type: %d\n", vif->type);
  
-@@ -1507,15 +1498,6 @@ static int ath9k_change_interface(struct
+@@ -1520,15 +1511,6 @@ static int ath9k_change_interface(struct
  	mutex_lock(&sc->mutex);
  	ath9k_ps_wakeup(sc);
  
diff --git a/package/mac80211/patches/500-ath9k_eeprom_debugfs.patch b/package/mac80211/patches/500-ath9k_eeprom_debugfs.patch
index 012a6bea1b..16e7ff8313 100644
--- a/package/mac80211/patches/500-ath9k_eeprom_debugfs.patch
+++ b/package/mac80211/patches/500-ath9k_eeprom_debugfs.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/debug.c
 +++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -1585,6 +1585,53 @@ static const struct file_operations fops
+@@ -1610,6 +1610,53 @@ static const struct file_operations fops
  };
  
  
@@ -54,7 +54,7 @@
  int ath9k_init_debug(struct ath_hw *ah)
  {
  	struct ath_common *common = ath9k_hw_common(ah);
-@@ -1643,6 +1690,9 @@ int ath9k_init_debug(struct ath_hw *ah)
+@@ -1668,6 +1715,9 @@ int ath9k_init_debug(struct ath_hw *ah)
  	debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR,
  			   sc->debug.debugfs_phy, &sc->sc_ah->gpio_val);
  
diff --git a/package/mac80211/patches/510-ath9k_intr_mitigation_tweak.patch b/package/mac80211/patches/510-ath9k_intr_mitigation_tweak.patch
index 6c29e9cbc3..9e18cb07b8 100644
--- a/package/mac80211/patches/510-ath9k_intr_mitigation_tweak.patch
+++ b/package/mac80211/patches/510-ath9k_intr_mitigation_tweak.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/hw.c
 +++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1674,8 +1674,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+@@ -1714,8 +1714,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
  	REG_WRITE(ah, AR_OBS, 8);
  
  	if (ah->config.rx_intr_mitigation) {
diff --git a/package/mac80211/patches/511-ath9k_increase_bcbuf.patch b/package/mac80211/patches/511-ath9k_increase_bcbuf.patch
index 483b382259..5f6c01772f 100644
--- a/package/mac80211/patches/511-ath9k_increase_bcbuf.patch
+++ b/package/mac80211/patches/511-ath9k_increase_bcbuf.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -363,7 +363,7 @@ struct ath_vif {
+@@ -364,7 +364,7 @@ struct ath_vif {
   * number of beacon intervals, the game's up.
   */
  #define BSTUCK_THRESH           	9
@@ -11,7 +11,7 @@
  #define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)
 --- a/drivers/net/wireless/ath/ath9k/hw.c
 +++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -382,8 +382,8 @@ static void ath9k_hw_init_config(struct 
+@@ -387,8 +387,8 @@ static void ath9k_hw_init_config(struct 
  {
  	int i;
  
diff --git a/package/mac80211/patches/513-ath9k_channelbw_debugfs.patch b/package/mac80211/patches/513-ath9k_channelbw_debugfs.patch
index 4ac3e1c3d3..ebf582048f 100644
--- a/package/mac80211/patches/513-ath9k_channelbw_debugfs.patch
+++ b/package/mac80211/patches/513-ath9k_channelbw_debugfs.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -585,6 +585,7 @@ struct ath_softc {
+@@ -587,6 +587,7 @@ struct ath_softc {
  	struct ieee80211_hw *hw;
  	struct device *dev;
  
@@ -10,7 +10,7 @@
  	struct survey_info *cur_survey;
 --- a/drivers/net/wireless/ath/ath9k/debug.c
 +++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -1693,6 +1693,9 @@ int ath9k_init_debug(struct ath_hw *ah)
+@@ -1718,6 +1718,9 @@ int ath9k_init_debug(struct ath_hw *ah)
  	debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
  			    &fops_eeprom);
  
@@ -22,7 +22,7 @@
  	sc->debug.sampidx = 0;
 --- a/drivers/net/wireless/ath/ath9k/main.c
 +++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1636,9 +1636,10 @@ static int ath9k_config(struct ieee80211
+@@ -1649,9 +1649,10 @@ static int ath9k_config(struct ieee80211
  
  	if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  		struct ieee80211_channel *curchan = hw->conf.channel;
@@ -34,7 +34,7 @@
  		unsigned long flags;
  
  		if (ah->curchan)
-@@ -1691,7 +1692,23 @@ static int ath9k_config(struct ieee80211
+@@ -1704,7 +1705,23 @@ static int ath9k_config(struct ieee80211
  			memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  		}
  
@@ -61,9 +61,9 @@
  			return -EINVAL;
 --- a/drivers/net/wireless/ath/ath9k/hw.c
 +++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1509,6 +1509,10 @@ int ath9k_hw_reset(struct ath_hw *ah, st
- 	    (AR_SREV_9300_20_OR_LATER(ah) && IS_CHAN_5GHZ(chan)))
- 		bChannelChange = false;
+@@ -1548,6 +1548,10 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ 	    caldata->rtt_hist.num_readings)
+ 		allow_fbs = true;
  
 +	if (!ah->curchan || ((ah->curchan->channelFlags ^ chan->channelFlags) &
 +	    (CHANNEL_HALF | CHANNEL_QUARTER)))
diff --git a/package/mac80211/patches/520-mac80211_minstrel_ht_aggr_delay.patch b/package/mac80211/patches/520-mac80211_minstrel_ht_aggr_delay.patch
index 282c63a3f1..8f074f0217 100644
--- a/package/mac80211/patches/520-mac80211_minstrel_ht_aggr_delay.patch
+++ b/package/mac80211/patches/520-mac80211_minstrel_ht_aggr_delay.patch
@@ -1,6 +1,6 @@
 --- a/net/mac80211/rc80211_minstrel_ht.c
 +++ b/net/mac80211/rc80211_minstrel_ht.c
-@@ -355,10 +355,12 @@ minstrel_downgrade_rate(struct minstrel_
+@@ -357,10 +357,12 @@ minstrel_downgrade_rate(struct minstrel_
  }
  
  static void
@@ -14,7 +14,7 @@
  	u16 tid;
  
  	if (unlikely(!ieee80211_is_data_qos(hdr->frame_control)))
-@@ -374,6 +376,12 @@ minstrel_aggr_check(struct minstrel_priv
+@@ -376,6 +378,12 @@ minstrel_aggr_check(struct minstrel_priv
  	if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
  		return;
  
@@ -27,7 +27,7 @@
  	ieee80211_start_tx_ba_session(pubsta, tid, 5000);
  }
  
-@@ -453,7 +461,7 @@ minstrel_ht_tx_status(void *priv, struct
+@@ -455,7 +463,7 @@ minstrel_ht_tx_status(void *priv, struct
  	if (time_after(jiffies, mi->stats_update + (mp->update_interval / 2 * HZ) / 1000)) {
  		minstrel_ht_update_stats(mp, mi);
  		if (!(info->flags & IEEE80211_TX_CTL_AMPDU))
diff --git a/package/mac80211/patches/522-mac80211_reduce_txqueuelen.patch b/package/mac80211/patches/522-mac80211_reduce_txqueuelen.patch
index 948d2043fc..aa4cd0c2ff 100644
--- a/package/mac80211/patches/522-mac80211_reduce_txqueuelen.patch
+++ b/package/mac80211/patches/522-mac80211_reduce_txqueuelen.patch
@@ -1,6 +1,6 @@
 --- a/net/mac80211/iface.c
 +++ b/net/mac80211/iface.c
-@@ -685,6 +685,7 @@ static const struct net_device_ops ieee8
+@@ -683,6 +683,7 @@ static const struct net_device_ops ieee8
  static void ieee80211_if_setup(struct net_device *dev)
  {
  	ether_setup(dev);
diff --git a/package/mac80211/patches/560-minstrel_ht_optimize.patch b/package/mac80211/patches/523-minstrel_ht_optimize.patch
index d27ca5947f..8e804cae8b 100644
--- a/package/mac80211/patches/560-minstrel_ht_optimize.patch
+++ b/package/mac80211/patches/523-minstrel_ht_optimize.patch
@@ -40,7 +40,7 @@
  /*
   * Update rate statistics and select new primary rates
   *
-@@ -292,6 +307,7 @@ minstrel_ht_update_stats(struct minstrel
+@@ -294,6 +309,7 @@ minstrel_ht_update_stats(struct minstrel
  		}
  	}
  
@@ -48,7 +48,7 @@
  	mi->stats_update = jiffies;
  }
  
-@@ -330,8 +346,8 @@ minstrel_next_sample_idx(struct minstrel
+@@ -332,8 +348,8 @@ minstrel_next_sample_idx(struct minstrel
  }
  
  static void
@@ -59,7 +59,7 @@
  {
  	int group, orig_group;
  
-@@ -350,6 +366,7 @@ minstrel_downgrade_rate(struct minstrel_
+@@ -352,6 +368,7 @@ minstrel_downgrade_rate(struct minstrel_
  			*idx = mi->groups[group].max_tp_rate;
  		else
  			*idx = mi->groups[group].max_tp_rate2;
@@ -67,7 +67,7 @@
  		break;
  	}
  }
-@@ -450,13 +467,13 @@ minstrel_ht_tx_status(void *priv, struct
+@@ -452,13 +469,13 @@ minstrel_ht_tx_status(void *priv, struct
  	if (rate->attempts > 30 &&
  	    MINSTREL_FRAC(rate->success, rate->attempts) <
  	    MINSTREL_FRAC(20, 100))
@@ -83,7 +83,7 @@
  
  	if (time_after(jiffies, mi->stats_update + (mp->update_interval / 2 * HZ) / 1000)) {
  		minstrel_ht_update_stats(mp, mi);
-@@ -521,7 +538,6 @@ minstrel_calc_retransmit(struct minstrel
+@@ -523,7 +540,6 @@ minstrel_calc_retransmit(struct minstrel
  static void
  minstrel_ht_set_rate(struct minstrel_priv *mp, struct minstrel_ht_sta *mi,
                       struct ieee80211_tx_rate *rate, int index,
@@ -91,7 +91,7 @@
                       bool sample, bool rtscts)
  {
  	const struct mcs_group *group = &minstrel_mcs_groups[index / MCS_GROUP_RATES];
-@@ -609,6 +625,7 @@ minstrel_ht_get_rate(void *priv, struct 
+@@ -611,6 +627,7 @@ minstrel_ht_get_rate(void *priv, struct 
  	struct minstrel_priv *mp = priv;
  	int sample_idx;
  	bool sample = false;
@@ -99,7 +99,7 @@
  
  	if (rate_control_send_low(sta, priv_sta, txrc))
  		return;
-@@ -634,11 +651,10 @@ minstrel_ht_get_rate(void *priv, struct 
+@@ -636,11 +653,10 @@ minstrel_ht_get_rate(void *priv, struct 
  	if (sample_idx >= 0) {
  		sample = true;
  		minstrel_ht_set_rate(mp, mi, &ar[0], sample_idx,
@@ -113,7 +113,7 @@
  	}
  
  	if (mp->hw->max_rates >= 3) {
-@@ -648,33 +664,27 @@ minstrel_ht_get_rate(void *priv, struct 
+@@ -650,33 +666,27 @@ minstrel_ht_get_rate(void *priv, struct 
  		 * max_tp_rate -> max_tp_rate2 -> max_prob_rate by default.
  		 */
  		if (sample_idx >= 0)
@@ -157,7 +157,7 @@
  
  	mi->total_packets++;
  
-@@ -766,6 +776,7 @@ minstrel_ht_update_caps(void *priv, stru
+@@ -768,6 +778,7 @@ minstrel_ht_update_caps(void *priv, stru
  	if (!n_supported)
  		goto use_legacy;
  
diff --git a/package/mac80211/patches/530-mac80211_cur_txpower.patch b/package/mac80211/patches/530-mac80211_cur_txpower.patch
index 4ca84a637e..af13ee992a 100644
--- a/package/mac80211/patches/530-mac80211_cur_txpower.patch
+++ b/package/mac80211/patches/530-mac80211_cur_txpower.patch
@@ -1,6 +1,6 @@
 --- a/include/net/mac80211.h
 +++ b/include/net/mac80211.h
-@@ -798,7 +798,7 @@ enum ieee80211_smps_mode {
+@@ -813,7 +813,7 @@ enum ieee80211_smps_mode {
   */
  struct ieee80211_conf {
  	u32 flags;
@@ -11,7 +11,7 @@
  	u16 listen_interval;
 --- a/net/mac80211/cfg.c
 +++ b/net/mac80211/cfg.c
-@@ -1568,7 +1568,7 @@ static int ieee80211_get_tx_power(struct
+@@ -1597,7 +1597,7 @@ static int ieee80211_get_tx_power(struct
  {
  	struct ieee80211_local *local = wiphy_priv(wiphy);
  
diff --git a/package/mac80211/patches/531-ath9k_cur_txpower.patch b/package/mac80211/patches/531-ath9k_cur_txpower.patch
index 894d780420..0c044abb1a 100644
--- a/package/mac80211/patches/531-ath9k_cur_txpower.patch
+++ b/package/mac80211/patches/531-ath9k_cur_txpower.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/main.c
 +++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -1714,6 +1714,8 @@ static int ath9k_config(struct ieee80211
+@@ -1727,6 +1727,8 @@ static int ath9k_config(struct ieee80211
  			return -EINVAL;
  		}
  
@@ -9,7 +9,7 @@
  		/*
  		 * The most recent snapshot of channel->noisefloor for the old
  		 * channel is only available after the hardware reset. Copy it to
-@@ -1731,6 +1733,7 @@ static int ath9k_config(struct ieee80211
+@@ -1744,6 +1746,7 @@ static int ath9k_config(struct ieee80211
  		ath9k_cmn_update_txpow(ah, sc->curtxpow,
  				       sc->config.txpowlimit, &sc->curtxpow);
  		ath9k_ps_restore(sc);
diff --git a/package/mac80211/patches/540-ath9k_limit_qlen.patch b/package/mac80211/patches/540-ath9k_limit_qlen.patch
index e4d56485b4..7cd8b9f56a 100644
--- a/package/mac80211/patches/540-ath9k_limit_qlen.patch
+++ b/package/mac80211/patches/540-ath9k_limit_qlen.patch
@@ -20,7 +20,7 @@
  	spinlock_t txbuflock;
 --- a/drivers/net/wireless/ath/ath9k/debug.c
 +++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -1654,6 +1654,10 @@ int ath9k_init_debug(struct ath_hw *ah)
+@@ -1679,6 +1679,10 @@ int ath9k_init_debug(struct ath_hw *ah)
  			    sc, &fops_wiphy);
  	debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
  			    &fops_xmit);
@@ -57,7 +57,7 @@
  	while (bf) {
  		u16 seqno = bf->bf_state.seqno;
  
-@@ -816,6 +826,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_
+@@ -821,6 +831,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_
  			ath_tx_addto_baw(sc, tid, seqno);
  		bf->bf_state.ndelim = ndelim;
  
@@ -65,7 +65,7 @@
  		__skb_unlink(skb, &tid->buf_q);
  		list_add_tail(&bf->list, bf_q);
  		if (bf_prev)
-@@ -1693,6 +1704,8 @@ static void ath_tx_send_ampdu(struct ath
+@@ -1687,6 +1698,8 @@ static void ath_tx_send_ampdu(struct ath
  	/* Add sub-frame to BAW */
  	ath_tx_addto_baw(sc, tid, bf->bf_state.seqno);
  
@@ -74,7 +74,7 @@
  	/* Queue to h/w without aggregation */
  	TX_STAT_INC(txctl->txq->axq_qnum, a_queued_hw);
  	bf->bf_lastbf = bf;
-@@ -1821,23 +1834,13 @@ error:
+@@ -1815,23 +1828,13 @@ error:
  
  /* FIXME: tx power */
  static void ath_tx_start_dma(struct ath_softc *sc, struct sk_buff *skb,
@@ -100,7 +100,7 @@
  
  	if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && tid) {
  		/*
-@@ -1872,6 +1875,7 @@ int ath_tx_start(struct ieee80211_hw *hw
+@@ -1866,6 +1869,7 @@ int ath_tx_start(struct ieee80211_hw *hw
  	struct ieee80211_vif *vif = info->control.vif;
  	struct ath_softc *sc = hw->priv;
  	struct ath_txq *txq = txctl->txq;
@@ -108,7 +108,7 @@
  	int padpos, padsize;
  	int frmlen = skb->len + FCS_LEN;
  	int q;
-@@ -1916,6 +1920,24 @@ int ath_tx_start(struct ieee80211_hw *hw
+@@ -1908,6 +1912,24 @@ int ath_tx_start(struct ieee80211_hw *hw
  
  	setup_frame_info(hw, skb, frmlen);
  
@@ -133,7 +133,7 @@
  	/*
  	 * At this point, the vif, hw_key and sta pointers in the tx control
  	 * info are no longer valid (overwritten by the ath_frame_info data.
-@@ -1930,7 +1952,7 @@ int ath_tx_start(struct ieee80211_hw *hw
+@@ -1922,7 +1944,7 @@ int ath_tx_start(struct ieee80211_hw *hw
  	}
  	spin_unlock_bh(&txq->axq_lock);
  
diff --git a/package/mac80211/patches/541-ath9k_sw_retry_reduce.patch b/package/mac80211/patches/541-ath9k_sw_retry_reduce.patch
index 1685aabfaa..06a17a2fb4 100644
--- a/package/mac80211/patches/541-ath9k_sw_retry_reduce.patch
+++ b/package/mac80211/patches/541-ath9k_sw_retry_reduce.patch
@@ -23,7 +23,7 @@
 @@ -382,6 +385,7 @@ static void ath_tx_complete_aggr(struct 
  	int nframes;
  	u8 tidno;
- 	bool clear_filter;
+ 	bool flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
 +	int i, retries;
  
  	skb = bf->bf_mpdu;
@@ -39,19 +39,19 @@
  	rcu_read_lock();
  
  	sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr1, hdr->addr2);
-@@ -475,7 +483,8 @@ static void ath_tx_complete_aggr(struct 
+@@ -476,7 +484,8 @@ static void ath_tx_complete_aggr(struct 
+ 				txpending = 1;
  			} else if (fi->retries < ATH_MAX_SW_RETRIES) {
- 				if (!(ts->ts_status & ATH9K_TXERR_FILT) ||
- 				    !an->sleeping)
+ 				if (txok || !an->sleeping)
 -					ath_tx_set_retry(sc, txq, bf->bf_mpdu);
 +					ath_tx_set_retry(sc, txq, bf->bf_mpdu,
 +							 retries);
  
- 				clear_filter = true;
  				txpending = 1;
+ 			} else {
 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -540,7 +540,7 @@ struct ath_ant_comb {
+@@ -542,7 +542,7 @@ struct ath_ant_comb {
  #define DEFAULT_CACHELINE       32
  #define ATH_REGCLASSIDS_MAX     10
  #define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
diff --git a/package/mac80211/patches/550-ath9k_ar9280_cold_reset.patch b/package/mac80211/patches/542-ath9k_ar9280_cold_reset.patch
index bbc462077c..89be9e1fdf 100644
--- a/package/mac80211/patches/550-ath9k_ar9280_cold_reset.patch
+++ b/package/mac80211/patches/542-ath9k_ar9280_cold_reset.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/hw.c
 +++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1371,10 +1371,16 @@ static bool ath9k_hw_set_reset_reg(struc
+@@ -1381,10 +1381,16 @@ static bool ath9k_hw_set_reset_reg(struc
  static bool ath9k_hw_chip_reset(struct ath_hw *ah,
  				struct ath9k_channel *chan)
  {
diff --git a/package/mac80211/patches/590-ath9k_debug_remove_packet_rssi.patch b/package/mac80211/patches/550-ath9k_debug_remove_packet_rssi.patch
index 1e89d92caf..79eaf86b0e 100644
--- a/package/mac80211/patches/590-ath9k_debug_remove_packet_rssi.patch
+++ b/package/mac80211/patches/550-ath9k_debug_remove_packet_rssi.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ath/ath9k/debug.c
 +++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -954,34 +954,6 @@ static ssize_t read_file_recv(struct fil
+@@ -963,34 +963,6 @@ static ssize_t read_file_recv(struct fil
  			"%18s : %10u\n", "DECRYPT BUSY ERR",
  			sc->debug.stats.rxstats.decrypt_busy_err);
  
@@ -35,7 +35,7 @@
  	PHY_ERR("UNDERRUN", ATH9K_PHYERR_UNDERRUN);
  	PHY_ERR("TIMING", ATH9K_PHYERR_TIMING);
  	PHY_ERR("PARITY", ATH9K_PHYERR_PARITY);
-@@ -1058,16 +1030,6 @@ void ath_debug_stat_rx(struct ath_softc 
+@@ -1067,16 +1039,6 @@ void ath_debug_stat_rx(struct ath_softc 
  		RX_PHY_ERR_INC(phyerr);
  	}
  
diff --git a/package/mac80211/patches/551-ath9k_fix_keymiss_handling.patch b/package/mac80211/patches/551-ath9k_fix_keymiss_handling.patch
deleted file mode 100644
index 931c50e0ce..0000000000
--- a/package/mac80211/patches/551-ath9k_fix_keymiss_handling.patch
+++ /dev/null
@@ -1,93 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-@@ -525,8 +525,8 @@ int ath9k_hw_process_rxdesc_edma(struct 
- 			rxs->rs_status |= ATH9K_RXERR_DECRYPT;
- 		else if (rxsp->status11 & AR_MichaelErr)
- 			rxs->rs_status |= ATH9K_RXERR_MIC;
--		else if (rxsp->status11 & AR_KeyMiss)
--			rxs->rs_status |= ATH9K_RXERR_DECRYPT;
-+		if (rxsp->status11 & AR_KeyMiss)
-+			rxs->rs_status |= ATH9K_RXERR_KEYMISS;
- 	}
- 
- 	return 0;
---- a/drivers/net/wireless/ath/ath9k/mac.c
-+++ b/drivers/net/wireless/ath/ath9k/mac.c
-@@ -620,8 +620,8 @@ int ath9k_hw_rxprocdesc(struct ath_hw *a
- 			rs->rs_status |= ATH9K_RXERR_DECRYPT;
- 		else if (ads.ds_rxstatus8 & AR_MichaelErr)
- 			rs->rs_status |= ATH9K_RXERR_MIC;
--		else if (ads.ds_rxstatus8 & AR_KeyMiss)
--			rs->rs_status |= ATH9K_RXERR_DECRYPT;
-+		if (ads.ds_rxstatus8 & AR_KeyMiss)
-+			rs->rs_status |= ATH9K_RXERR_KEYMISS;
- 	}
- 
- 	return 0;
---- a/drivers/net/wireless/ath/ath9k/mac.h
-+++ b/drivers/net/wireless/ath/ath9k/mac.h
-@@ -181,6 +181,7 @@ struct ath_htc_rx_status {
- #define ATH9K_RXERR_FIFO          0x04
- #define ATH9K_RXERR_DECRYPT       0x08
- #define ATH9K_RXERR_MIC           0x10
-+#define ATH9K_RXERR_KEYMISS       0x20
- 
- #define ATH9K_RX_MORE             0x01
- #define ATH9K_RX_MORE_AGGR        0x02
---- a/drivers/net/wireless/ath/ath9k/recv.c
-+++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -826,7 +826,8 @@ static bool ath9k_rx_accept(struct ath_c
- 		test_bit(rx_stats->rs_keyix, common->tkip_keymap);
- 	strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
- 		!(rx_stats->rs_status &
--		(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
-+		(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
-+		 ATH9K_RXERR_KEYMISS));
- 
- 	if (!rx_stats->rs_datalen)
- 		return false;
-@@ -854,6 +855,8 @@ static bool ath9k_rx_accept(struct ath_c
- 	 * descriptors.
- 	 */
- 	if (rx_stats->rs_status != 0) {
-+		u8 status_mask;
-+
- 		if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
- 			rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
- 			mic_error = false;
-@@ -861,7 +864,8 @@ static bool ath9k_rx_accept(struct ath_c
- 		if (rx_stats->rs_status & ATH9K_RXERR_PHY)
- 			return false;
- 
--		if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
-+		if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
-+		    (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
- 			*decrypt_error = true;
- 			mic_error = false;
- 		}
-@@ -871,17 +875,14 @@ static bool ath9k_rx_accept(struct ath_c
- 		 * decryption and MIC failures. For monitor mode,
- 		 * we also ignore the CRC error.
- 		 */
--		if (ah->is_monitoring) {
--			if (rx_stats->rs_status &
--			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
--			      ATH9K_RXERR_CRC))
--				return false;
--		} else {
--			if (rx_stats->rs_status &
--			    ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
--				return false;
--			}
--		}
-+		status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
-+			      ATH9K_RXERR_KEYMISS;
-+
-+		if (ah->is_monitoring)
-+			status_mask |= ATH9K_RXERR_CRC;
-+
-+		if (rx_stats->rs_status & ~status_mask)
-+			return false;
- 	}
- 
- 	/*
diff --git a/package/mac80211/patches/591-ath9k_per_chain_signal_strength.patch b/package/mac80211/patches/551-ath9k_per_chain_signal_strength.patch
index 4e7e78ee30..284b4fcc7a 100644
--- a/package/mac80211/patches/591-ath9k_per_chain_signal_strength.patch
+++ b/package/mac80211/patches/551-ath9k_per_chain_signal_strength.patch
@@ -1,6 +1,6 @@
 --- a/include/net/mac80211.h
 +++ b/include/net/mac80211.h
-@@ -666,6 +666,9 @@ enum mac80211_rx_flags {
+@@ -681,6 +681,9 @@ enum mac80211_rx_flags {
   * @mactime: value in microseconds of the 64-bit Time Synchronization Function
   * 	(TSF) timer when the first data symbol (MPDU) arrived at the hardware.
   * @band: the active band when this frame was received
@@ -10,7 +10,7 @@
   * @freq: frequency the radio was tuned to when receiving this frame, in MHz
   * @signal: signal strength when receiving this frame, either in dBm, in dB or
   *	unspecified depending on the hardware capabilities flags
-@@ -679,6 +682,10 @@ enum mac80211_rx_flags {
+@@ -694,6 +697,10 @@ enum mac80211_rx_flags {
  struct ieee80211_rx_status {
  	u64 mactime;
  	enum ieee80211_band band;
@@ -23,7 +23,7 @@
  	int antenna;
 --- a/net/mac80211/sta_info.h
 +++ b/net/mac80211/sta_info.h
-@@ -292,6 +292,11 @@ struct sta_info {
+@@ -300,6 +300,11 @@ struct sta_info {
  	unsigned long rx_dropped;
  	int last_signal;
  	struct ewma avg_signal;
@@ -37,7 +37,7 @@
  
 --- a/net/mac80211/rx.c
 +++ b/net/mac80211/rx.c
-@@ -1169,6 +1169,7 @@ ieee80211_rx_h_sta_process(struct ieee80
+@@ -1244,6 +1244,7 @@ ieee80211_rx_h_sta_process(struct ieee80
  	struct sk_buff *skb = rx->skb;
  	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
@@ -45,7 +45,7 @@
  
  	if (!sta)
  		return RX_CONTINUE;
-@@ -1211,6 +1212,19 @@ ieee80211_rx_h_sta_process(struct ieee80
+@@ -1286,6 +1287,19 @@ ieee80211_rx_h_sta_process(struct ieee80
  	sta->last_signal = status->signal;
  	ewma_add(&sta->avg_signal, -status->signal);
  
@@ -67,7 +67,7 @@
  	 * exchange sequence.
 --- a/net/mac80211/sta_info.c
 +++ b/net/mac80211/sta_info.c
-@@ -295,6 +295,8 @@ struct sta_info *sta_info_alloc(struct i
+@@ -304,6 +304,8 @@ struct sta_info *sta_info_alloc(struct i
  	do_posix_clock_monotonic_gettime(&uptime);
  	sta->last_connected = uptime.tv_sec;
  	ewma_init(&sta->avg_signal, 1024, 8);
@@ -78,7 +78,7 @@
  		kfree(sta);
 --- a/include/net/cfg80211.h
 +++ b/include/net/cfg80211.h
-@@ -481,6 +481,8 @@ struct station_parameters {
+@@ -497,6 +497,8 @@ struct station_parameters {
   * @STATION_INFO_BSS_PARAM: @bss_param filled
   * @STATION_INFO_CONNECTED_TIME: @connected_time filled
   * @STATION_INFO_ASSOC_REQ_IES: @assoc_req_ies filled
@@ -87,7 +87,7 @@
   */
  enum station_info_flags {
  	STATION_INFO_INACTIVE_TIME	= 1<<0,
-@@ -500,7 +502,9 @@ enum station_info_flags {
+@@ -516,7 +518,9 @@ enum station_info_flags {
  	STATION_INFO_RX_BITRATE		= 1<<14,
  	STATION_INFO_BSS_PARAM          = 1<<15,
  	STATION_INFO_CONNECTED_TIME	= 1<<16,
@@ -98,7 +98,7 @@
  };
  
  /**
-@@ -580,6 +584,9 @@ struct sta_bss_parameters {
+@@ -596,6 +600,9 @@ struct sta_bss_parameters {
   * @plink_state: mesh peer link state
   * @signal: signal strength of last received packet in dBm
   * @signal_avg: signal strength average in dBm
@@ -108,7 +108,7 @@
   * @txrate: current unicast bitrate from this station
   * @rxrate: current unicast bitrate to this station
   * @rx_packets: packets received from this station
-@@ -609,6 +616,11 @@ struct station_info {
+@@ -625,6 +632,11 @@ struct station_info {
  	u8 plink_state;
  	s8 signal;
  	s8 signal_avg;
@@ -139,7 +139,7 @@
  	u8 rs_num_delims;
 --- a/drivers/net/wireless/ath/ath9k/recv.c
 +++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -983,6 +983,7 @@ static int ath9k_rx_skb_preprocess(struc
+@@ -981,6 +981,7 @@ static int ath9k_rx_skb_preprocess(struc
  				   bool *decrypt_error)
  {
  	struct ath_hw *ah = common->ah;
@@ -147,7 +147,7 @@
  
  	memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  
-@@ -1008,6 +1009,20 @@ static int ath9k_rx_skb_preprocess(struc
+@@ -1006,6 +1007,20 @@ static int ath9k_rx_skb_preprocess(struc
  	rx_status->antenna = rx_stats->rs_antenna;
  	rx_status->flag |= RX_FLAG_MACTIME_MPDU;
  
@@ -168,7 +168,7 @@
  	return 0;
  }
  
-@@ -1538,14 +1553,14 @@ static void ath_ant_comb_scan(struct ath
+@@ -1536,14 +1551,14 @@ static void ath_ant_comb_scan(struct ath
  	struct ath_ant_comb *antcomb = &sc->ant_comb;
  	int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
  	int curr_main_set;
@@ -250,7 +250,7 @@
  	if (ads.ds_rxstatus8 & AR_RxKeyIdxValid)
 --- a/drivers/net/wireless/ath/ath9k/debug.c
 +++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -1032,12 +1032,12 @@ void ath_debug_stat_rx(struct ath_softc 
+@@ -1041,12 +1041,12 @@ void ath_debug_stat_rx(struct ath_softc 
  
  	spin_lock(&sc->debug.samp_lock);
  	RX_SAMP_DBG(jiffies) = jiffies;
@@ -271,7 +271,7 @@
  	RX_SAMP_DBG(rate) = rs->rs_rate;
 --- a/include/linux/nl80211.h
 +++ b/include/linux/nl80211.h
-@@ -1497,6 +1497,8 @@ enum nl80211_sta_bss_param {
+@@ -1548,6 +1548,8 @@ enum nl80211_sta_bss_param {
   * @NL80211_STA_INFO_BSS_PARAM: current station's view of BSS, nested attribute
   *     containing info as possible, see &enum nl80211_sta_bss_param
   * @NL80211_STA_INFO_CONNECTED_TIME: time since the station is last connected
@@ -280,7 +280,7 @@
   * @__NL80211_STA_INFO_AFTER_LAST: internal
   * @NL80211_STA_INFO_MAX: highest possible station info attribute
   */
-@@ -1518,6 +1520,8 @@ enum nl80211_sta_info {
+@@ -1569,6 +1571,8 @@ enum nl80211_sta_info {
  	NL80211_STA_INFO_RX_BITRATE,
  	NL80211_STA_INFO_BSS_PARAM,
  	NL80211_STA_INFO_CONNECTED_TIME,
@@ -291,7 +291,7 @@
  	__NL80211_STA_INFO_AFTER_LAST,
 --- a/net/wireless/nl80211.c
 +++ b/net/wireless/nl80211.c
-@@ -2238,6 +2238,33 @@ nla_put_failure:
+@@ -2257,6 +2257,33 @@ nla_put_failure:
  	return false;
  }
  
@@ -325,7 +325,7 @@
  static int nl80211_send_station(struct sk_buff *msg, u32 pid, u32 seq,
  				int flags, struct net_device *dev,
  				const u8 *mac_addr, struct station_info *sinfo)
-@@ -2284,6 +2311,18 @@ static int nl80211_send_station(struct s
+@@ -2303,6 +2330,18 @@ static int nl80211_send_station(struct s
  	if (sinfo->filled & STATION_INFO_SIGNAL_AVG)
  		NLA_PUT_U8(msg, NL80211_STA_INFO_SIGNAL_AVG,
  			   sinfo->signal_avg);
@@ -346,7 +346,7 @@
  					  NL80211_STA_INFO_TX_BITRATE))
 --- a/net/mac80211/cfg.c
 +++ b/net/mac80211/cfg.c
-@@ -329,6 +329,7 @@ static void sta_set_sinfo(struct sta_inf
+@@ -330,6 +330,7 @@ static void sta_set_sinfo(struct sta_inf
  {
  	struct ieee80211_sub_if_data *sdata = sta->sdata;
  	struct timespec uptime;
@@ -354,7 +354,7 @@
  
  	sinfo->generation = sdata->local->sta_generation;
  
-@@ -363,6 +364,17 @@ static void sta_set_sinfo(struct sta_inf
+@@ -364,6 +365,17 @@ static void sta_set_sinfo(struct sta_inf
  		sinfo->signal = (s8)sta->last_signal;
  		sinfo->signal_avg = (s8) -ewma_read(&sta->avg_signal);
  	}
diff --git a/package/mac80211/patches/552-ath9k_fix_phyerror.patch b/package/mac80211/patches/552-ath9k_fix_phyerror.patch
deleted file mode 100644
index 3ef090e721..0000000000
--- a/package/mac80211/patches/552-ath9k_fix_phyerror.patch
+++ /dev/null
@@ -1,37 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/recv.c
-+++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -425,12 +425,9 @@ void ath_rx_cleanup(struct ath_softc *sc
- 
- u32 ath_calcrxfilter(struct ath_softc *sc)
- {
--#define	RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
--
- 	u32 rfilt;
- 
--	rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
--		| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
-+	rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
- 		| ATH9K_RX_FILTER_MCAST;
- 
- 	if (sc->rx.rxfilter & FIF_PROBE_REQ)
---- a/drivers/net/wireless/ath/ath9k/ani.c
-+++ b/drivers/net/wireless/ath/ath9k/ani.c
-@@ -502,9 +502,6 @@ static void ath9k_ani_reset_old(struct a
- 		ath9k_hw_ani_control(ah, ATH9K_ANI_CCK_WEAK_SIGNAL_THR,
- 				     ATH9K_ANI_CCK_WEAK_SIG_THR);
- 
--		ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) |
--				     ATH9K_RX_FILTER_PHYERR);
--
- 		ath9k_ani_restart(ah);
- 		return;
- 	}
-@@ -525,8 +522,6 @@ static void ath9k_ani_reset_old(struct a
- 		ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
- 				     aniState->firstepLevel);
- 
--	ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) &
--			     ~ATH9K_RX_FILTER_PHYERR);
- 	ath9k_ani_restart(ah);
- 
- 	ENABLE_REGWRITE_BUFFER(ah);
diff --git a/package/mac80211/patches/561-mac80211_tx_status.patch b/package/mac80211/patches/561-mac80211_tx_status.patch
deleted file mode 100644
index 513dd0a6ec..0000000000
--- a/package/mac80211/patches/561-mac80211_tx_status.patch
+++ /dev/null
@@ -1,96 +0,0 @@
---- a/include/net/mac80211.h
-+++ b/include/net/mac80211.h
-@@ -2370,6 +2370,25 @@ static inline int ieee80211_sta_ps_trans
- void ieee80211_sta_set_tim(struct ieee80211_sta *sta);
- 
- /**
-+ * ieee80211_tx_status_sta - transmit status callback
-+ *
-+ * Call this function for all transmitted frames after they have been
-+ * transmitted. It is permissible to not call this function for
-+ * multicast frames but this can affect statistics.
-+ *
-+ * This function may not be called in IRQ context. Calls to this function
-+ * for a single hardware must be synchronized against each other. Calls
-+ * to this function, ieee80211_tx_status_ni() and ieee80211_tx_status_irqsafe()
-+ * may not be mixed for a single hardware.
-+ *
-+ * @hw: the hardware the frame was transmitted by
-+ * @skb: the frame that was transmitted, owned by mac80211 after this call
-+ * @sta: station for which the tx status is provided
-+ */
-+void ieee80211_tx_status_sta(struct ieee80211_hw *hw, struct sk_buff *skb,
-+			     struct ieee80211_sta *sta);
-+
-+/**
-  * ieee80211_tx_status - transmit status callback
-  *
-  * Call this function for all transmitted frames after they have been
-@@ -2384,8 +2403,11 @@ void ieee80211_sta_set_tim(struct ieee80
-  * @hw: the hardware the frame was transmitted by
-  * @skb: the frame that was transmitted, owned by mac80211 after this call
-  */
--void ieee80211_tx_status(struct ieee80211_hw *hw,
--			 struct sk_buff *skb);
-+static inline void ieee80211_tx_status(struct ieee80211_hw *hw,
-+				       struct sk_buff *skb)
-+{
-+	ieee80211_tx_status_sta(hw, skb, NULL);
-+}
- 
- /**
-  * ieee80211_tx_status_ni - transmit status callback (in process context)
---- a/net/mac80211/status.c
-+++ b/net/mac80211/status.c
-@@ -202,7 +202,8 @@ static void ieee80211_set_bar_pending(st
-  */
- #define STA_LOST_PKT_THRESHOLD	50
- 
--void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
-+void ieee80211_tx_status_sta(struct ieee80211_hw *hw, struct sk_buff *skb,
-+			     struct ieee80211_sta *pubsta)
- {
- 	struct sk_buff *skb2;
- 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
-@@ -214,7 +215,7 @@ void ieee80211_tx_status(struct ieee8021
- 	struct ieee80211_tx_status_rtap_hdr *rthdr;
- 	struct ieee80211_sub_if_data *sdata;
- 	struct net_device *prev_dev = NULL;
--	struct sta_info *sta, *tmp;
-+	struct sta_info *sta = NULL, *tmp, *tmp2;
- 	int retry_count = -1, i;
- 	int rates_idx = -1;
- 	bool send_to_cooked;
-@@ -244,11 +245,19 @@ void ieee80211_tx_status(struct ieee8021
- 	sband = local->hw.wiphy->bands[info->band];
- 	fc = hdr->frame_control;
- 
--	for_each_sta_info(local, hdr->addr1, sta, tmp) {
--		/* skip wrong virtual interface */
--		if (memcmp(hdr->addr2, sta->sdata->vif.addr, ETH_ALEN))
--			continue;
-+	if (!pubsta) {
-+		for_each_sta_info(local, hdr->addr1, tmp, tmp2) {
-+			/* skip wrong virtual interface */
-+			if (memcmp(hdr->addr2, tmp->sdata->vif.addr, ETH_ALEN))
-+				continue;
-+
-+			sta = tmp;
-+		}
-+	} else {
-+		sta = container_of(pubsta, struct sta_info, sta);
-+	}
- 
-+	if (sta) {
- 		acked = !!(info->flags & IEEE80211_TX_STAT_ACK);
- 		if (!acked && test_sta_flags(sta, WLAN_STA_PS_STA)) {
- 			/*
-@@ -497,7 +506,7 @@ void ieee80211_tx_status(struct ieee8021
- 	rcu_read_unlock();
- 	dev_kfree_skb(skb);
- }
--EXPORT_SYMBOL(ieee80211_tx_status);
-+EXPORT_SYMBOL(ieee80211_tx_status_sta);
- 
- void ieee80211_report_low_ack(struct ieee80211_sta *pubsta, u32 num_packets)
- {
diff --git a/package/mac80211/patches/562-ath9k_tx_status.patch b/package/mac80211/patches/562-ath9k_tx_status.patch
deleted file mode 100644
index dfe536ca00..0000000000
--- a/package/mac80211/patches/562-ath9k_tx_status.patch
+++ /dev/null
@@ -1,121 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -50,10 +50,12 @@ static u16 bits_per_symbol[][2] = {
- static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
- 			       struct ath_atx_tid *tid, struct sk_buff *skb);
- static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
--			    int tx_flags, struct ath_txq *txq);
-+			    int tx_flags, struct ath_txq *txq,
-+			    struct ieee80211_sta *sta);
- static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
- 				struct ath_txq *txq, struct list_head *bf_q,
--				struct ath_tx_status *ts, int txok, int sendbar);
-+				struct ath_tx_status *ts, int txok, int sendbar,
-+				struct ieee80211_sta *sta);
- static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
- 			     struct list_head *head, bool internal);
- static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
-@@ -172,7 +174,8 @@ static void ath_tx_flush_tid(struct ath_
- 		if (bf && fi->retries) {
- 			list_add_tail(&bf->list, &bf_head);
- 			ath_tx_update_baw(sc, tid, bf->bf_state.seqno);
--			ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 1);
-+			ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0,
-+				1, NULL);
- 		} else {
- 			ath_tx_send_normal(sc, txq, NULL, skb);
- 		}
-@@ -239,7 +242,7 @@ static void ath_tid_drain(struct ath_sof
- 
- 		if (!bf) {
- 			spin_unlock(&txq->axq_lock);
--			ath_tx_complete(sc, skb, ATH_TX_ERROR, txq);
-+			ath_tx_complete(sc, skb, ATH_TX_ERROR, txq, NULL);
- 			spin_lock(&txq->axq_lock);
- 			continue;
- 		}
-@@ -250,7 +253,7 @@ static void ath_tid_drain(struct ath_sof
- 			ath_tx_update_baw(sc, tid, bf->bf_state.seqno);
- 
- 		spin_unlock(&txq->axq_lock);
--		ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
-+		ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0, NULL);
- 		spin_lock(&txq->axq_lock);
- 	}
- 
-@@ -412,7 +415,7 @@ static void ath_tx_complete_aggr(struct 
- 				list_move_tail(&bf->list, &bf_head);
- 
- 			ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
--				0, 0);
-+				0, 0, NULL);
- 
- 			bf = bf_next;
- 		}
-@@ -520,7 +523,7 @@ static void ath_tx_complete_aggr(struct 
- 			}
- 
- 			ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
--				!txfail, sendbar);
-+				!txfail, sendbar, sta);
- 		} else {
- 			/* retry the un-acked ones */
- 			if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
-@@ -540,7 +543,8 @@ static void ath_tx_complete_aggr(struct 
- 
- 						ath_tx_complete_buf(sc, bf, txq,
- 								    &bf_head,
--								    ts, 0, 1);
-+								    ts, 0, 1,
-+								    sta);
- 						break;
- 					}
- 
-@@ -1465,7 +1469,8 @@ static void ath_drain_txq_list(struct at
- 			ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0,
- 					     retry_tx);
- 		else
--			ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
-+			ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0,
-+				NULL);
- 		spin_lock_bh(&txq->axq_lock);
- 	}
- }
-@@ -1970,7 +1975,8 @@ int ath_tx_start(struct ieee80211_hw *hw
- /*****************/
- 
- static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
--			    int tx_flags, struct ath_txq *txq)
-+			    int tx_flags, struct ath_txq *txq,
-+			    struct ieee80211_sta *sta)
- {
- 	struct ieee80211_hw *hw = sc->hw;
- 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
-@@ -2028,7 +2034,8 @@ static void ath_tx_complete(struct ath_s
- 
- static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
- 				struct ath_txq *txq, struct list_head *bf_q,
--				struct ath_tx_status *ts, int txok, int sendbar)
-+				struct ath_tx_status *ts, int txok, int sendbar,
-+				struct ieee80211_sta *sta)
- {
- 	struct sk_buff *skb = bf->bf_mpdu;
- 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
-@@ -2056,7 +2063,7 @@ static void ath_tx_complete_buf(struct a
- 			complete(&sc->paprd_complete);
- 	} else {
- 		ath_debug_stat_tx(sc, bf, ts, txq, tx_flags);
--		ath_tx_complete(sc, skb, tx_flags, txq);
-+		ath_tx_complete(sc, skb, tx_flags, txq, sta);
- 	}
- 	/* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't
- 	 * accidentally reference it later.
-@@ -2145,7 +2152,7 @@ static void ath_tx_process_buffer(struct
- 
- 	if (!bf_isampdu(bf)) {
- 		ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
--		ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok, 0);
-+		ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok, 0, NULL);
- 	} else
- 		ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
- 
diff --git a/package/mac80211/patches/570-ath9k_tx_stop_failure_debug.patch b/package/mac80211/patches/570-ath9k_tx_stop_failure_debug.patch
deleted file mode 100644
index 9a57c05947..0000000000
--- a/package/mac80211/patches/570-ath9k_tx_stop_failure_debug.patch
+++ /dev/null
@@ -1,27 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -1512,7 +1512,8 @@ bool ath_drain_all_txq(struct ath_softc 
- 	struct ath_hw *ah = sc->sc_ah;
- 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
- 	struct ath_txq *txq;
--	int i, npend = 0;
-+	int i;
-+	u32 npend = 0;
- 
- 	if (sc->sc_flags & SC_OP_INVALID)
- 		return true;
-@@ -1524,11 +1525,12 @@ bool ath_drain_all_txq(struct ath_softc 
- 		if (!ATH_TXQ_SETUP(sc, i))
- 			continue;
- 
--		npend += ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum);
-+		if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
-+			npend |= BIT(i);
- 	}
- 
- 	if (npend)
--		ath_err(common, "Failed to stop TX DMA!\n");
-+		ath_err(common, "Failed to stop TX DMA, queues=%08x!\n", npend);
- 
- 	for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
- 		if (!ATH_TXQ_SETUP(sc, i))
diff --git a/package/mac80211/patches/571-ath9k_reset_debug.patch b/package/mac80211/patches/571-ath9k_reset_debug.patch
deleted file mode 100644
index 90e62c2afe..0000000000
--- a/package/mac80211/patches/571-ath9k_reset_debug.patch
+++ /dev/null
@@ -1,124 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/debug.h
-+++ b/drivers/net/wireless/ath/ath9k/debug.h
-@@ -25,8 +25,10 @@ struct ath_buf;
- 
- #ifdef CONFIG_ATH9K_DEBUGFS
- #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
-+#define RESET_STAT_INC(sc, type) sc->debug.stats.reset[type]++
- #else
- #define TX_STAT_INC(q, c) do { } while (0)
-+#define RESET_STAT_INC(sc, type) do { } while (0)
- #endif
- 
- #ifdef CONFIG_ATH9K_DEBUGFS
-@@ -171,10 +173,21 @@ struct ath_rx_stats {
- 	u8 rs_antenna;
- };
- 
-+enum ath_reset_type {
-+	RESET_TYPE_BB_HANG,
-+	RESET_TYPE_BB_WATCHDOG,
-+	RESET_TYPE_FATAL_INT,
-+	RESET_TYPE_TX_ERROR,
-+	RESET_TYPE_TX_HANG,
-+	RESET_TYPE_PLL_HANG,
-+	__RESET_TYPE_MAX
-+};
-+
- struct ath_stats {
- 	struct ath_interrupt_stats istats;
- 	struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
- 	struct ath_rx_stats rxstats;
-+	u32 reset[__RESET_TYPE_MAX];
- };
- 
- #define ATH_DBG_MAX_SAMPLES	10
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -679,6 +679,16 @@ void ath9k_tasklet(unsigned long data)
- 
- 	if ((status & ATH9K_INT_FATAL) ||
- 	    (status & ATH9K_INT_BB_WATCHDOG)) {
-+#ifdef CONFIG_ATH9K_DEBUGFS
-+		enum ath_reset_type type;
-+
-+		if (status & ATH9K_INT_FATAL)
-+			type = RESET_TYPE_FATAL_INT;
-+		else
-+			type = RESET_TYPE_BB_WATCHDOG;
-+
-+		RESET_STAT_INC(sc, type);
-+#endif
- 		ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
- 		goto out;
- 	}
-@@ -995,8 +1005,10 @@ void ath_hw_check(struct work_struct *wo
- 	ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
- 		"busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
- 	if (busy >= 99) {
--		if (++sc->hw_busy_count >= 3)
-+		if (++sc->hw_busy_count >= 3) {
-+			RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
- 			ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
-+		}
- 
- 	} else if (busy >= 0)
- 		sc->hw_busy_count = 0;
-@@ -1016,6 +1028,7 @@ static void ath_hw_pll_rx_hang_check(str
- 			/* Rx is hung for more than 500ms. Reset it */
- 			ath_dbg(common, ATH_DBG_RESET,
- 				"Possible RX hang, resetting");
-+			RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
- 			ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
- 			count = 0;
- 		}
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -587,8 +587,10 @@ static void ath_tx_complete_aggr(struct 
- 
- 	rcu_read_unlock();
- 
--	if (needreset)
-+	if (needreset) {
-+		RESET_STAT_INC(sc, RESET_TYPE_TX_ERROR);
- 		ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
-+	}
- }
- 
- static bool ath_lookup_legacy(struct ath_buf *bf)
-@@ -2270,6 +2272,7 @@ static void ath_tx_complete_poll_work(st
- 	if (needreset) {
- 		ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
- 			"tx hung, resetting the chip\n");
-+		RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
- 		ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
- 	}
- 
---- a/drivers/net/wireless/ath/ath9k/debug.c
-+++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -523,9 +523,22 @@ static ssize_t read_file_wiphy(struct fi
- 	if (tmp & ATH9K_RX_FILTER_PHYRADAR)
- 		len += snprintf(buf + len, sizeof(buf) - len, " PHYRADAR");
- 	if (tmp & ATH9K_RX_FILTER_MCAST_BCAST_ALL)
--		len += snprintf(buf + len, sizeof(buf) - len, " MCAST_BCAST_ALL\n");
--	else
--		len += snprintf(buf + len, sizeof(buf) - len, "\n");
-+		len += snprintf(buf + len, sizeof(buf) - len, " MCAST_BCAST_ALL");
-+
-+	len += snprintf(buf + len, sizeof(buf) - len,
-+		       "\n\nReset causes:\n"
-+		       "  baseband hang: %d\n"
-+		       "  baseband watchdog: %d\n"
-+		       "  fatal hardware error interrupt: %d\n"
-+		       "  tx hardware error: %d\n"
-+		       "  tx path hang: %d\n"
-+		       "  pll rx hang: %d\n",
-+		       sc->debug.stats.reset[RESET_TYPE_BB_HANG],
-+		       sc->debug.stats.reset[RESET_TYPE_BB_WATCHDOG],
-+		       sc->debug.stats.reset[RESET_TYPE_FATAL_INT],
-+		       sc->debug.stats.reset[RESET_TYPE_TX_ERROR],
-+		       sc->debug.stats.reset[RESET_TYPE_TX_HANG],
-+		       sc->debug.stats.reset[RESET_TYPE_PLL_HANG]);
- 
- 	if (len > sizeof(buf))
- 		len = sizeof(buf);
diff --git a/package/mac80211/patches/572-ath9k_fix_tx_retry.patch b/package/mac80211/patches/572-ath9k_fix_tx_retry.patch
deleted file mode 100644
index dfb09ba22e..0000000000
--- a/package/mac80211/patches/572-ath9k_fix_tx_retry.patch
+++ /dev/null
@@ -1,41 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -387,7 +387,6 @@ static void ath_tx_complete_aggr(struct 
- 	struct ath_frame_info *fi;
- 	int nframes;
- 	u8 tidno;
--	bool clear_filter;
- 	int i, retries;
- 
- 	skb = bf->bf_mpdu;
-@@ -484,12 +483,10 @@ static void ath_tx_complete_aggr(struct 
- 				 */
- 				txfail = 1;
- 			} else if (fi->retries < ATH_MAX_SW_RETRIES) {
--				if (!(ts->ts_status & ATH9K_TXERR_FILT) ||
--				    !an->sleeping)
-+				if (txok || !an->sleeping)
- 					ath_tx_set_retry(sc, txq, bf->bf_mpdu,
- 							 retries);
- 
--				clear_filter = true;
- 				txpending = 1;
- 			} else {
- 				txfail = 1;
-@@ -568,11 +565,13 @@ static void ath_tx_complete_aggr(struct 
- 			ieee80211_sta_set_tim(sta);
- 
- 		spin_lock_bh(&txq->axq_lock);
--		if (clear_filter)
--			tid->ac->clear_ps_filter = true;
- 		skb_queue_splice(&bf_pending, &tid->buf_q);
--		if (!an->sleeping)
-+		if (!an->sleeping) {
- 			ath_tx_queue_tid(txq, tid);
-+
-+			if (ts->ts_status & ATH9K_TXERR_FILT)
-+				tid->ac->clear_ps_filter = true;
-+		}
- 		spin_unlock_bh(&txq->axq_lock);
- 	}
- 
diff --git a/package/mac80211/patches/573-ath9k_fix_tx_flush_bar.patch b/package/mac80211/patches/573-ath9k_fix_tx_flush_bar.patch
deleted file mode 100644
index a87151bb3a..0000000000
--- a/package/mac80211/patches/573-ath9k_fix_tx_flush_bar.patch
+++ /dev/null
@@ -1,51 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/mac.h
-+++ b/drivers/net/wireless/ath/ath9k/mac.h
-@@ -75,9 +75,10 @@
- #define ATH9K_TXERR_XTXOP          0x08
- #define ATH9K_TXERR_TIMER_EXPIRED  0x10
- #define ATH9K_TX_ACKED		   0x20
-+#define ATH9K_TX_FLUSH		   0x40
- #define ATH9K_TXERR_MASK						\
- 	(ATH9K_TXERR_XRETRY | ATH9K_TXERR_FILT | ATH9K_TXERR_FIFO |	\
--	 ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED)
-+	 ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED | ATH9K_TX_FLUSH)
- 
- #define ATH9K_TX_BA                0x01
- #define ATH9K_TX_PWRMGMT           0x02
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -388,6 +388,7 @@ static void ath_tx_complete_aggr(struct 
- 	int nframes;
- 	u8 tidno;
- 	int i, retries;
-+	bool flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
- 
- 	skb = bf->bf_mpdu;
- 	hdr = (struct ieee80211_hdr *)skb->data;
-@@ -482,6 +483,8 @@ static void ath_tx_complete_aggr(struct 
- 				 * the un-acked sub-frames
- 				 */
- 				txfail = 1;
-+			} else if (flush) {
-+				txpending = 1;
- 			} else if (fi->retries < ATH_MAX_SW_RETRIES) {
- 				if (txok || !an->sleeping)
- 					ath_tx_set_retry(sc, txq, bf->bf_mpdu,
-@@ -540,7 +543,8 @@ static void ath_tx_complete_aggr(struct 
- 
- 						ath_tx_complete_buf(sc, bf, txq,
- 								    &bf_head,
--								    ts, 0, 1,
-+								    ts, 0,
-+								    !flush,
- 								    sta);
- 						break;
- 					}
-@@ -1446,6 +1450,7 @@ static void ath_drain_txq_list(struct at
- 	struct ath_tx_status ts;
- 
- 	memset(&ts, 0, sizeof(ts));
-+	ts.ts_status = ATH9K_TX_FLUSH;
- 	INIT_LIST_HEAD(&bf_head);
- 
- 	while (!list_empty(list)) {
diff --git a/package/mac80211/patches/580-ath9k_cleanup_set_interrupt.patch b/package/mac80211/patches/580-ath9k_cleanup_set_interrupt.patch
deleted file mode 100644
index a93857a19d..0000000000
--- a/package/mac80211/patches/580-ath9k_cleanup_set_interrupt.patch
+++ /dev/null
@@ -1,155 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/beacon.c
-+++ b/drivers/net/wireless/ath/ath9k/beacon.c
-@@ -515,7 +515,7 @@ static void ath_beacon_config_ap(struct 
- 	sc->sc_flags |= SC_OP_TSF_RESET;
- 	ath9k_beacon_init(sc, nexttbtt, intval);
- 	sc->beacon.bmisscnt = 0;
--	ath9k_hw_set_interrupts(ah, ah->imask);
-+	ath9k_hw_set_interrupts(ah);
- 	ath9k_hw_enable_interrupts(ah);
- }
- 
-@@ -643,7 +643,7 @@ static void ath_beacon_config_sta(struct
- 	ath9k_hw_set_sta_beacon_timers(ah, &bs);
- 	ah->imask |= ATH9K_INT_BMISS;
- 
--	ath9k_hw_set_interrupts(ah, ah->imask);
-+	ath9k_hw_set_interrupts(ah);
- 	ath9k_hw_enable_interrupts(ah);
- }
- 
-@@ -679,7 +679,7 @@ static void ath_beacon_config_adhoc(stru
- 	ath9k_beacon_init(sc, nexttbtt, intval);
- 	sc->beacon.bmisscnt = 0;
- 
--	ath9k_hw_set_interrupts(ah, ah->imask);
-+	ath9k_hw_set_interrupts(ah);
- 	ath9k_hw_enable_interrupts(ah);
- }
- 
-@@ -821,11 +821,11 @@ void ath9k_set_beaconing_status(struct a
- 	if (status) {
- 		/* Re-enable beaconing */
- 		ah->imask |= ATH9K_INT_SWBA;
--		ath9k_hw_set_interrupts(ah, ah->imask);
-+		ath9k_hw_set_interrupts(ah);
- 	} else {
- 		/* Disable SWBA interrupt */
- 		ah->imask &= ~ATH9K_INT_SWBA;
--		ath9k_hw_set_interrupts(ah, ah->imask);
-+		ath9k_hw_set_interrupts(ah);
- 		tasklet_kill(&sc->bcon_tasklet);
- 		ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
- 	}
---- a/drivers/net/wireless/ath/ath9k/gpio.c
-+++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -151,7 +151,7 @@ static void ath9k_gen_timer_start(struct
- 	if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
- 		ath9k_hw_disable_interrupts(ah);
- 		ah->imask |= ATH9K_INT_GENTIMER;
--		ath9k_hw_set_interrupts(ah, ah->imask);
-+		ath9k_hw_set_interrupts(ah);
- 		ath9k_hw_enable_interrupts(ah);
- 	}
- }
-@@ -166,7 +166,7 @@ static void ath9k_gen_timer_stop(struct 
- 	if (timer_table->timer_mask.val == 0) {
- 		ath9k_hw_disable_interrupts(ah);
- 		ah->imask &= ~ATH9K_INT_GENTIMER;
--		ath9k_hw_set_interrupts(ah, ah->imask);
-+		ath9k_hw_set_interrupts(ah);
- 		ath9k_hw_enable_interrupts(ah);
- 	}
- }
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -273,7 +273,7 @@ static bool ath_complete_reset(struct at
- 
- 	ath9k_cmn_update_txpow(ah, sc->curtxpow,
- 			       sc->config.txpowlimit, &sc->curtxpow);
--	ath9k_hw_set_interrupts(ah, ah->imask);
-+	ath9k_hw_set_interrupts(ah);
- 	ath9k_hw_enable_interrupts(ah);
- 
- 	if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
-@@ -833,7 +833,7 @@ irqreturn_t ath_isr(int irq, void *dev)
- 
- 	if (status & ATH9K_INT_RXEOL) {
- 		ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
--		ath9k_hw_set_interrupts(ah, ah->imask);
-+		ath9k_hw_set_interrupts(ah);
- 	}
- 
- 	if (status & ATH9K_INT_MIB) {
-@@ -1409,7 +1409,7 @@ static void ath9k_calculate_summary_stat
- 		ah->imask &= ~ATH9K_INT_TSFOOR;
- 	}
- 
--	ath9k_hw_set_interrupts(ah, ah->imask);
-+	ath9k_hw_set_interrupts(ah);
- 
- 	/* Set up ANI */
- 	if (iter_data.naps > 0) {
-@@ -1566,7 +1566,7 @@ static void ath9k_enable_ps(struct ath_s
- 	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
- 		if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
- 			ah->imask |= ATH9K_INT_TIM_TIMER;
--			ath9k_hw_set_interrupts(ah, ah->imask);
-+			ath9k_hw_set_interrupts(ah);
- 		}
- 		ath9k_hw_setrxabort(ah, 1);
- 	}
-@@ -1586,7 +1586,7 @@ static void ath9k_disable_ps(struct ath_
- 				  PS_WAIT_FOR_TX_ACK);
- 		if (ah->imask & ATH9K_INT_TIM_TIMER) {
- 			ah->imask &= ~ATH9K_INT_TIM_TIMER;
--			ath9k_hw_set_interrupts(ah, ah->imask);
-+			ath9k_hw_set_interrupts(ah);
- 		}
- 	}
- 
---- a/drivers/net/wireless/ath/ath9k/recv.c
-+++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -1974,7 +1974,7 @@ requeue:
- 
- 	if (!(ah->imask & ATH9K_INT_RXEOL)) {
- 		ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
--		ath9k_hw_set_interrupts(ah, ah->imask);
-+		ath9k_hw_set_interrupts(ah);
- 	}
- 
- 	return 0;
---- a/drivers/net/wireless/ath/ath9k/mac.c
-+++ b/drivers/net/wireless/ath/ath9k/mac.c
-@@ -827,9 +827,9 @@ void ath9k_hw_enable_interrupts(struct a
- }
- EXPORT_SYMBOL(ath9k_hw_enable_interrupts);
- 
--void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
-+void ath9k_hw_set_interrupts(struct ath_hw *ah)
- {
--	enum ath9k_int omask = ah->imask;
-+	enum ath9k_int ints = ah->imask;
- 	u32 mask, mask2;
- 	struct ath9k_hw_capabilities *pCap = &ah->caps;
- 	struct ath_common *common = ath9k_hw_common(ah);
-@@ -837,7 +837,7 @@ void ath9k_hw_set_interrupts(struct ath_
- 	if (!(ints & ATH9K_INT_GLOBAL))
- 		ath9k_hw_disable_interrupts(ah);
- 
--	ath_dbg(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
-+	ath_dbg(common, ATH_DBG_INTERRUPT, "New interrupt mask 0x%x\n", ints);
- 
- 	mask = ints & ATH9K_INT_COMMON;
- 	mask2 = 0;
---- a/drivers/net/wireless/ath/ath9k/mac.h
-+++ b/drivers/net/wireless/ath/ath9k/mac.h
-@@ -735,7 +735,7 @@ int ath9k_hw_beaconq_setup(struct ath_hw
- 
- /* Interrupt Handling */
- bool ath9k_hw_intrpend(struct ath_hw *ah);
--void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints);
-+void ath9k_hw_set_interrupts(struct ath_hw *ah);
- void ath9k_hw_enable_interrupts(struct ath_hw *ah);
- void ath9k_hw_disable_interrupts(struct ath_hw *ah);
- 
diff --git a/package/mac80211/patches/581-ath9k_cleanup_txpower_handling.patch b/package/mac80211/patches/581-ath9k_cleanup_txpower_handling.patch
deleted file mode 100644
index 029ce3d7af..0000000000
--- a/package/mac80211/patches/581-ath9k_cleanup_txpower_handling.patch
+++ /dev/null
@@ -1,627 +0,0 @@
---- a/drivers/net/wireless/ath/ath.h
-+++ b/drivers/net/wireless/ath/ath.h
-@@ -71,7 +71,6 @@ struct ath_regulatory {
- 	char alpha2[2];
- 	u16 country_code;
- 	u16 max_power_level;
--	u32 tp_scale;
- 	u16 current_rd;
- 	u16 current_rd_ext;
- 	int16_t power_limit;
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -3040,6 +3040,10 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- 		return (pBase->miscConfiguration >> 0x3) & 0x1;
- 	case EEP_ANT_DIV_CTL1:
- 		return eep->base_ext1.ant_div_control;
-+	case EEP_ANTENNA_GAIN_5G:
-+		return eep->modalHeader5G.antennaGain;
-+	case EEP_ANTENNA_GAIN_2G:
-+		return eep->modalHeader2G.antennaGain;
- 	default:
- 		return 0;
- 	}
-@@ -4727,20 +4731,14 @@ static u16 ar9003_hw_get_max_edge_power(
- static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
- 					       struct ath9k_channel *chan,
- 					       u8 *pPwrArray, u16 cfgCtl,
--					       u8 twiceAntennaReduction,
--					       u8 twiceMaxRegulatoryPower,
-+					       u8 antenna_reduction,
- 					       u16 powerLimit)
- {
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	struct ath_common *common = ath9k_hw_common(ah);
- 	struct ar9300_eeprom *pEepData = &ah->eeprom.ar9300_eep;
- 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
--	static const u16 tpScaleReductionTable[5] = {
--		0, 3, 6, 9, MAX_RATE_POWER
--	};
- 	int i;
--	int16_t  twiceLargestAntenna;
--	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+	u16 scaledPower = 0, minCtlPower;
- 	static const u16 ctlModesFor11a[] = {
- 		CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
- 	};
-@@ -4758,28 +4756,7 @@ static void ar9003_hw_set_power_per_rate
- 	bool is2ghz = IS_CHAN_2GHZ(chan);
- 
- 	ath9k_hw_get_channel_centers(ah, chan, &centers);
--
--	/* Compute TxPower reduction due to Antenna Gain */
--	if (is2ghz)
--		twiceLargestAntenna = pEepData->modalHeader2G.antennaGain;
--	else
--		twiceLargestAntenna = pEepData->modalHeader5G.antennaGain;
--
--	twiceLargestAntenna = (int16_t)min((twiceAntennaReduction) -
--				twiceLargestAntenna, 0);
--
--	/*
--	 * scaledPower is the minimum of the user input power level
--	 * and the regulatory allowed power level
--	 */
--	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
--
--	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
--		maxRegAllowedPower -=
--			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
--	}
--
--	scaledPower = min(powerLimit, maxRegAllowedPower);
-+	scaledPower = powerLimit - antenna_reduction;
- 
- 	/*
- 	 * Reduce scaled Power by number of chains active to get
-@@ -4966,7 +4943,6 @@ static inline u8 mcsidx_to_tgtpwridx(uns
- static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
- 					struct ath9k_channel *chan, u16 cfgCtl,
- 					u8 twiceAntennaReduction,
--					u8 twiceMaxRegulatoryPower,
- 					u8 powerLimit, bool test)
- {
- 	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-@@ -5019,7 +4995,6 @@ static void ath9k_hw_ar9300_set_txpower(
- 	ar9003_hw_set_power_per_rate_table(ah, chan,
- 					   targetPowerValT2, cfgCtl,
- 					   twiceAntennaReduction,
--					   twiceMaxRegulatoryPower,
- 					   powerLimit);
- 
- 	if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD)) {
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -429,7 +429,6 @@ static void ath9k_hw_init_defaults(struc
- 
- 	regulatory->country_code = CTRY_DEFAULT;
- 	regulatory->power_limit = MAX_RATE_POWER;
--	regulatory->tp_scale = ATH9K_TP_SCALE_MAX;
- 
- 	ah->hw_version.magic = AR5416_MAGIC;
- 	ah->hw_version.subvendorid = 0;
-@@ -1396,9 +1395,7 @@ static bool ath9k_hw_chip_reset(struct a
- static bool ath9k_hw_channel_change(struct ath_hw *ah,
- 				    struct ath9k_channel *chan)
- {
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	struct ath_common *common = ath9k_hw_common(ah);
--	struct ieee80211_channel *channel = chan->chan;
- 	u32 qnum;
- 	int r;
- 
-@@ -1423,14 +1420,7 @@ static bool ath9k_hw_channel_change(stru
- 		return false;
- 	}
- 	ath9k_hw_set_clockrate(ah);
--
--	ah->eep_ops->set_txpower(ah, chan,
--			     ath9k_regd_get_ctl(regulatory, chan),
--			     channel->max_antenna_gain * 2,
--			     channel->max_power * 2,
--			     min((u32) MAX_RATE_POWER,
--			     (u32) regulatory->power_limit), false);
--
-+	ath9k_hw_apply_txpower(ah, chan);
- 	ath9k_hw_rfbus_done(ah);
- 
- 	if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
-@@ -2466,23 +2456,56 @@ bool ath9k_hw_disable(struct ath_hw *ah)
- }
- EXPORT_SYMBOL(ath9k_hw_disable);
- 
-+static int get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan)
-+{
-+	enum eeprom_param gain_param;
-+
-+	if (IS_CHAN_2GHZ(chan))
-+		gain_param = EEP_ANTENNA_GAIN_2G;
-+	else
-+		gain_param = EEP_ANTENNA_GAIN_5G;
-+
-+	return ah->eep_ops->get_eeprom(ah, gain_param);
-+}
-+
-+void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan)
-+{
-+	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
-+	struct ieee80211_channel *channel;
-+	int chan_pwr, new_pwr, max_gain;
-+	int ant_gain, ant_reduction = 0;
-+
-+	if (!chan)
-+		return;
-+
-+	channel = chan->chan;
-+	chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER);
-+	new_pwr = min_t(int, chan_pwr, reg->power_limit);
-+	max_gain = chan_pwr - new_pwr + channel->max_antenna_gain * 2;
-+
-+	ant_gain = get_antenna_gain(ah, chan);
-+	if (ant_gain > max_gain)
-+		ant_reduction = ant_gain - max_gain;
-+
-+	ah->eep_ops->set_txpower(ah, chan,
-+				 ath9k_regd_get_ctl(reg, chan),
-+				 ant_reduction, new_pwr, false);
-+}
-+
- void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
- {
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-+	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
- 	struct ath9k_channel *chan = ah->curchan;
- 	struct ieee80211_channel *channel = chan->chan;
--	int reg_pwr = min_t(int, MAX_RATE_POWER, limit);
--	int chan_pwr = channel->max_power * 2;
- 
-+	reg->power_limit = min_t(int, limit, MAX_RATE_POWER);
- 	if (test)
--		reg_pwr = chan_pwr = MAX_RATE_POWER;
-+		channel->max_power = MAX_RATE_POWER / 2;
- 
--	regulatory->power_limit = reg_pwr;
-+	ath9k_hw_apply_txpower(ah, chan);
- 
--	ah->eep_ops->set_txpower(ah, chan,
--				 ath9k_regd_get_ctl(regulatory, chan),
--				 channel->max_antenna_gain * 2,
--				 chan_pwr, reg_pwr, test);
-+	if (test)
-+		channel->max_power = DIV_ROUND_UP(reg->max_power_level, 2);
- }
- EXPORT_SYMBOL(ath9k_hw_set_txpowerlimit);
- 
---- a/drivers/net/wireless/ath/ath9k/hw.h
-+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -389,14 +389,6 @@ enum ath9k_power_mode {
- 	ATH9K_PM_UNDEFINED
- };
- 
--enum ath9k_tp_scale {
--	ATH9K_TP_SCALE_MAX = 0,
--	ATH9K_TP_SCALE_50,
--	ATH9K_TP_SCALE_25,
--	ATH9K_TP_SCALE_12,
--	ATH9K_TP_SCALE_MIN
--};
--
- enum ser_reg_mode {
- 	SER_REG_MODE_OFF = 0,
- 	SER_REG_MODE_ON = 1,
-@@ -964,6 +956,7 @@ void ath9k_hw_htc_resetinit(struct ath_h
- /* PHY */
- void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
- 				   u32 *coef_mantissa, u32 *coef_exponent);
-+void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan);
- 
- /*
-  * Code Specific to AR5008, AR9001 or AR9002,
---- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-@@ -350,6 +350,8 @@ static u32 ath9k_hw_4k_get_eeprom(struct
- 		return pModal->antdiv_ctl1;
- 	case EEP_TXGAIN_TYPE:
- 		return pBase->txGainType;
-+	case EEP_ANTENNA_GAIN_2G:
-+		return pModal->antennaGainCh[0];
- 	default:
- 		return 0;
- 	}
-@@ -462,8 +464,7 @@ static void ath9k_hw_set_4k_power_per_ra
- 						 struct ath9k_channel *chan,
- 						 int16_t *ratesArray,
- 						 u16 cfgCtl,
--						 u16 AntennaReduction,
--						 u16 twiceMaxRegulatoryPower,
-+						 u16 antenna_reduction,
- 						 u16 powerLimit)
- {
- #define CMP_TEST_GRP \
-@@ -472,20 +473,16 @@ static void ath9k_hw_set_4k_power_per_ra
- 	|| (((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == \
- 	    ((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL))
- 
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	int i;
--	int16_t twiceLargestAntenna;
- 	u16 twiceMinEdgePower;
- 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
--	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+	u16 scaledPower = 0, minCtlPower;
- 	u16 numCtlModes;
- 	const u16 *pCtlMode;
- 	u16 ctlMode, freq;
- 	struct chan_centers centers;
- 	struct cal_ctl_data_4k *rep;
- 	struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
--	static const u16 tpScaleReductionTable[5] =
--		{ 0, 3, 6, 9, MAX_RATE_POWER };
- 	struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
- 		0, { 0, 0, 0, 0}
- 	};
-@@ -503,19 +500,7 @@ static void ath9k_hw_set_4k_power_per_ra
- 
- 	ath9k_hw_get_channel_centers(ah, chan, &centers);
- 
--	twiceLargestAntenna = pEepData->modalHeader.antennaGainCh[0];
--	twiceLargestAntenna = (int16_t)min(AntennaReduction -
--					   twiceLargestAntenna, 0);
--
--	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
--	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
--		maxRegAllowedPower -=
--			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
--	}
--
--	scaledPower = min(powerLimit, maxRegAllowedPower);
--	scaledPower = max((u16)0, scaledPower);
--
-+	scaledPower = powerLimit - antenna_reduction;
- 	numCtlModes = ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40;
- 	pCtlMode = ctlModesFor11g;
- 
-@@ -671,7 +656,6 @@ static void ath9k_hw_4k_set_txpower(stru
- 				    struct ath9k_channel *chan,
- 				    u16 cfgCtl,
- 				    u8 twiceAntennaReduction,
--				    u8 twiceMaxRegulatoryPower,
- 				    u8 powerLimit, bool test)
- {
- 	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-@@ -691,7 +675,6 @@ static void ath9k_hw_4k_set_txpower(stru
- 	ath9k_hw_set_4k_power_per_rate_table(ah, chan,
- 					     &ratesArray[0], cfgCtl,
- 					     twiceAntennaReduction,
--					     twiceMaxRegulatoryPower,
- 					     powerLimit);
- 
- 	ath9k_hw_set_4k_power_cal_table(ah, chan);
---- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-@@ -336,6 +336,9 @@ static u32 ath9k_hw_ar9287_get_eeprom(st
- 			return pBase->tempSensSlopePalOn;
- 		else
- 			return 0;
-+	case EEP_ANTENNA_GAIN_2G:
-+		return max_t(u8, pModal->antennaGainCh[0],
-+				 pModal->antennaGainCh[1]);
- 	default:
- 		return 0;
- 	}
-@@ -554,8 +557,7 @@ static void ath9k_hw_set_ar9287_power_pe
- 						     struct ath9k_channel *chan,
- 						     int16_t *ratesArray,
- 						     u16 cfgCtl,
--						     u16 AntennaReduction,
--						     u16 twiceMaxRegulatoryPower,
-+						     u16 antenna_reduction,
- 						     u16 powerLimit)
- {
- #define CMP_CTL \
-@@ -569,12 +571,8 @@ static void ath9k_hw_set_ar9287_power_pe
- #define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6
- #define REDUCE_SCALED_POWER_BY_THREE_CHAIN   10
- 
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
--	static const u16 tpScaleReductionTable[5] =
--		{ 0, 3, 6, 9, MAX_RATE_POWER };
- 	int i;
--	int16_t twiceLargestAntenna;
- 	struct cal_ctl_data_ar9287 *rep;
- 	struct cal_target_power_leg targetPowerOfdm = {0, {0, 0, 0, 0} },
- 				    targetPowerCck = {0, {0, 0, 0, 0} };
-@@ -582,7 +580,7 @@ static void ath9k_hw_set_ar9287_power_pe
- 				    targetPowerCckExt = {0, {0, 0, 0, 0} };
- 	struct cal_target_power_ht targetPowerHt20,
- 				    targetPowerHt40 = {0, {0, 0, 0, 0} };
--	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+	u16 scaledPower = 0, minCtlPower;
- 	static const u16 ctlModesFor11g[] = {
- 		CTL_11B, CTL_11G, CTL_2GHT20,
- 		CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
-@@ -597,24 +595,7 @@ static void ath9k_hw_set_ar9287_power_pe
- 	tx_chainmask = ah->txchainmask;
- 
- 	ath9k_hw_get_channel_centers(ah, chan, &centers);
--
--	/* Compute TxPower reduction due to Antenna Gain */
--	twiceLargestAntenna = max(pEepData->modalHeader.antennaGainCh[0],
--				  pEepData->modalHeader.antennaGainCh[1]);
--	twiceLargestAntenna = (int16_t)min((AntennaReduction) -
--					   twiceLargestAntenna, 0);
--
--	/*
--	 * scaledPower is the minimum of the user input power level
--	 * and the regulatory allowed power level.
--	 */
--	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
--
--	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX)
--		maxRegAllowedPower -=
--			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
--
--	scaledPower = min(powerLimit, maxRegAllowedPower);
-+	scaledPower = powerLimit - antenna_reduction;
- 
- 	/*
- 	 * Reduce scaled Power by number of chains active
-@@ -815,7 +796,6 @@ static void ath9k_hw_set_ar9287_power_pe
- static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,
- 					struct ath9k_channel *chan, u16 cfgCtl,
- 					u8 twiceAntennaReduction,
--					u8 twiceMaxRegulatoryPower,
- 					u8 powerLimit, bool test)
- {
- 	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-@@ -834,7 +814,6 @@ static void ath9k_hw_ar9287_set_txpower(
- 	ath9k_hw_set_ar9287_power_per_rate_table(ah, chan,
- 						 &ratesArray[0], cfgCtl,
- 						 twiceAntennaReduction,
--						 twiceMaxRegulatoryPower,
- 						 powerLimit);
- 
- 	ath9k_hw_set_ar9287_power_cal_table(ah, chan);
---- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
-@@ -400,6 +400,7 @@ static u32 ath9k_hw_def_get_eeprom(struc
- 	struct ar5416_eeprom_def *eep = &ah->eeprom.def;
- 	struct modal_eep_header *pModal = eep->modalHeader;
- 	struct base_eep_header *pBase = &eep->baseEepHeader;
-+	int band = 0;
- 
- 	switch (param) {
- 	case EEP_NFTHRESH_5:
-@@ -467,6 +468,14 @@ static u32 ath9k_hw_def_get_eeprom(struc
- 			return pBase->pwr_table_offset;
- 		else
- 			return AR5416_PWR_TABLE_OFFSET_DB;
-+	case EEP_ANTENNA_GAIN_2G:
-+		band = 1;
-+		/* fall through */
-+	case EEP_ANTENNA_GAIN_5G:
-+		return max_t(u8, max_t(u8,
-+			pModal[band].antennaGainCh[0],
-+			pModal[band].antennaGainCh[1]),
-+			pModal[band].antennaGainCh[2]);
- 	default:
- 		return 0;
- 	}
-@@ -986,21 +995,15 @@ static void ath9k_hw_set_def_power_per_r
- 						  struct ath9k_channel *chan,
- 						  int16_t *ratesArray,
- 						  u16 cfgCtl,
--						  u16 AntennaReduction,
--						  u16 twiceMaxRegulatoryPower,
-+						  u16 antenna_reduction,
- 						  u16 powerLimit)
- {
- #define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6  /* 10*log10(2)*2 */
- #define REDUCE_SCALED_POWER_BY_THREE_CHAIN   9 /* 10*log10(3)*2 */
- 
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	struct ar5416_eeprom_def *pEepData = &ah->eeprom.def;
- 	u16 twiceMaxEdgePower = MAX_RATE_POWER;
--	static const u16 tpScaleReductionTable[5] =
--		{ 0, 3, 6, 9, MAX_RATE_POWER };
--
- 	int i;
--	int16_t twiceLargestAntenna;
- 	struct cal_ctl_data *rep;
- 	struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
- 		0, { 0, 0, 0, 0}
-@@ -1012,7 +1015,7 @@ static void ath9k_hw_set_def_power_per_r
- 	struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = {
- 		0, {0, 0, 0, 0}
- 	};
--	u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+	u16 scaledPower = 0, minCtlPower;
- 	static const u16 ctlModesFor11a[] = {
- 		CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
- 	};
-@@ -1031,27 +1034,7 @@ static void ath9k_hw_set_def_power_per_r
- 
- 	ath9k_hw_get_channel_centers(ah, chan, &centers);
- 
--	twiceLargestAntenna = max(
--		pEepData->modalHeader
--			[IS_CHAN_2GHZ(chan)].antennaGainCh[0],
--		pEepData->modalHeader
--			[IS_CHAN_2GHZ(chan)].antennaGainCh[1]);
--
--	twiceLargestAntenna = max((u8)twiceLargestAntenna,
--				  pEepData->modalHeader
--				  [IS_CHAN_2GHZ(chan)].antennaGainCh[2]);
--
--	twiceLargestAntenna = (int16_t)min(AntennaReduction -
--					   twiceLargestAntenna, 0);
--
--	maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
--
--	if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
--		maxRegAllowedPower -=
--			(tpScaleReductionTable[(regulatory->tp_scale)] * 2);
--	}
--
--	scaledPower = min(powerLimit, maxRegAllowedPower);
-+	scaledPower = powerLimit - antenna_reduction;
- 
- 	switch (ar5416_get_ntxchains(tx_chainmask)) {
- 	case 1:
-@@ -1256,7 +1239,6 @@ static void ath9k_hw_def_set_txpower(str
- 				    struct ath9k_channel *chan,
- 				    u16 cfgCtl,
- 				    u8 twiceAntennaReduction,
--				    u8 twiceMaxRegulatoryPower,
- 				    u8 powerLimit, bool test)
- {
- #define RT_AR_DELTA(x) (ratesArray[x] - cck_ofdm_delta)
-@@ -1278,7 +1260,6 @@ static void ath9k_hw_def_set_txpower(str
- 	ath9k_hw_set_def_power_per_rate_table(ah, chan,
- 					       &ratesArray[0], cfgCtl,
- 					       twiceAntennaReduction,
--					       twiceMaxRegulatoryPower,
- 					       powerLimit);
- 
- 	ath9k_hw_set_def_power_cal_table(ah, chan);
---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-@@ -763,10 +763,8 @@ static void ar5008_hw_set_channel_regs(s
- static int ar5008_hw_process_ini(struct ath_hw *ah,
- 				 struct ath9k_channel *chan)
- {
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	struct ath_common *common = ath9k_hw_common(ah);
- 	int i, regWrites = 0;
--	struct ieee80211_channel *channel = chan->chan;
- 	u32 modesIndex, freqIndex;
- 
- 	switch (chan->chanmode) {
-@@ -903,14 +901,7 @@ static int ar5008_hw_process_ini(struct 
- 	ar5008_hw_set_channel_regs(ah, chan);
- 	ar5008_hw_init_chain_masks(ah);
- 	ath9k_olc_init(ah);
--
--	/* Set TX power */
--	ah->eep_ops->set_txpower(ah, chan,
--				 ath9k_regd_get_ctl(regulatory, chan),
--				 channel->max_antenna_gain * 2,
--				 channel->max_power * 2,
--				 min((u32) MAX_RATE_POWER,
--				 (u32) regulatory->power_limit), false);
-+	ath9k_hw_apply_txpower(ah, chan);
- 
- 	/* Write analog registers */
- 	if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
---- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
-@@ -19,7 +19,6 @@
- 
- void ar9003_paprd_enable(struct ath_hw *ah, bool val)
- {
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	struct ath9k_channel *chan = ah->curchan;
- 	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
- 
-@@ -54,13 +53,7 @@ void ar9003_paprd_enable(struct ath_hw *
- 
- 	if (val) {
- 		ah->paprd_table_write_done = true;
--
--		ah->eep_ops->set_txpower(ah, chan,
--				ath9k_regd_get_ctl(regulatory, chan),
--				chan->chan->max_antenna_gain * 2,
--				chan->chan->max_power * 2,
--				min((u32) MAX_RATE_POWER,
--				(u32) regulatory->power_limit), false);
-+		ath9k_hw_apply_txpower(ah, chan);
- 	}
- 
- 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0,
---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -628,9 +628,7 @@ static void ar9003_hw_prog_ini(struct at
- static int ar9003_hw_process_ini(struct ath_hw *ah,
- 				 struct ath9k_channel *chan)
- {
--	struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- 	unsigned int regWrites = 0, i;
--	struct ieee80211_channel *channel = chan->chan;
- 	u32 modesIndex;
- 
- 	switch (chan->chanmode) {
-@@ -683,14 +681,7 @@ static int ar9003_hw_process_ini(struct 
- 	ar9003_hw_override_ini(ah);
- 	ar9003_hw_set_channel_regs(ah, chan);
- 	ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
--
--	/* Set TX power */
--	ah->eep_ops->set_txpower(ah, chan,
--				 ath9k_regd_get_ctl(regulatory, chan),
--				 channel->max_antenna_gain * 2,
--				 channel->max_power * 2,
--				 min((u32) MAX_RATE_POWER,
--				 (u32) regulatory->power_limit), false);
-+	ath9k_hw_apply_txpower(ah, chan);
- 
- 	return 0;
- }
---- a/drivers/net/wireless/ath/ath9k/common.c
-+++ b/drivers/net/wireless/ath/ath9k/common.c
-@@ -161,10 +161,12 @@ EXPORT_SYMBOL(ath9k_cmn_count_streams);
- void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
- 			    u16 new_txpow, u16 *txpower)
- {
--	if (cur_txpow != new_txpow) {
-+	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
-+
-+	if (reg->power_limit != new_txpow) {
- 		ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
- 		/* read back in case value is clamped */
--		*txpower = ath9k_hw_regulatory(ah)->power_limit;
-+		*txpower = reg->max_power_level;
- 	}
- }
- EXPORT_SYMBOL(ath9k_cmn_update_txpow);
---- a/drivers/net/wireless/ath/ath9k/eeprom.h
-+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
-@@ -253,7 +253,9 @@ enum eeprom_param {
- 	EEP_PAPRD,
- 	EEP_MODAL_VER,
- 	EEP_ANT_DIV_CTL1,
--	EEP_CHAIN_MASK_REDUCE
-+	EEP_CHAIN_MASK_REDUCE,
-+	EEP_ANTENNA_GAIN_2G,
-+	EEP_ANTENNA_GAIN_5G
- };
- 
- enum ar5416_rates {
-@@ -657,8 +659,7 @@ struct eeprom_ops {
- 	void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
- 	void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
- 			   u16 cfgCtl, u8 twiceAntennaReduction,
--			   u8 twiceMaxRegulatoryPower, u8 powerLimit,
--			   bool test);
-+			   u8 powerLimit, bool test);
- 	u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);
- };
- 
---- a/drivers/net/wireless/ath/ath9k/init.c
-+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -626,7 +626,6 @@ static void ath9k_init_band_txpower(stru
- 	struct ieee80211_supported_band *sband;
- 	struct ieee80211_channel *chan;
- 	struct ath_hw *ah = sc->sc_ah;
--	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
- 	int i;
- 
- 	sband = &sc->sbands[band];
-@@ -635,7 +634,6 @@ static void ath9k_init_band_txpower(stru
- 		ah->curchan = &ah->channels[chan->hw_value];
- 		ath9k_cmn_update_ichannel(ah->curchan, chan, NL80211_CHAN_HT20);
- 		ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true);
--		chan->max_power = reg->max_power_level / 2;
- 	}
- }
- 
diff --git a/package/mac80211/patches/582-ath9k_remove_current_rd_ext.patch b/package/mac80211/patches/582-ath9k_remove_current_rd_ext.patch
deleted file mode 100644
index c2f61c2582..0000000000
--- a/package/mac80211/patches/582-ath9k_remove_current_rd_ext.patch
+++ /dev/null
@@ -1,34 +0,0 @@
---- a/drivers/net/wireless/ath/ath.h
-+++ b/drivers/net/wireless/ath/ath.h
-@@ -72,7 +72,6 @@ struct ath_regulatory {
- 	u16 country_code;
- 	u16 max_power_level;
- 	u16 current_rd;
--	u16 current_rd_ext;
- 	int16_t power_limit;
- 	struct reg_dmn_pair_mapping *regpair;
- };
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -2047,11 +2047,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw
- 	eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
- 	regulatory->current_rd = eeval;
- 
--	eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1);
--	if (AR_SREV_9285_12_OR_LATER(ah))
--		eeval |= AR9285_RDEXT_DEFAULT;
--	regulatory->current_rd_ext = eeval;
--
- 	if (ah->opmode != NL80211_IFTYPE_AP &&
- 	    ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) {
- 		if (regulatory->current_rd == 0x64 ||
---- a/drivers/net/wireless/ath/carl9170/main.c
-+++ b/drivers/net/wireless/ath/carl9170/main.c
-@@ -1912,7 +1912,6 @@ static int carl9170_parse_eeprom(struct 
- 		ar->hw->channel_change_time = 80 * 1000;
- 
- 	regulatory->current_rd = le16_to_cpu(ar->eeprom.reg_domain[0]);
--	regulatory->current_rd_ext = le16_to_cpu(ar->eeprom.reg_domain[1]);
- 
- 	/* second part of wiphy init */
- 	SET_IEEE80211_PERM_ADDR(ar->hw, ar->eeprom.mac_address);
diff --git a/package/mac80211/patches/583-ath9k_remove_eep_reg_1.patch b/package/mac80211/patches/583-ath9k_remove_eep_reg_1.patch
deleted file mode 100644
index feaa30d934..0000000000
--- a/package/mac80211/patches/583-ath9k_remove_eep_reg_1.patch
+++ /dev/null
@@ -1,54 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
-@@ -415,8 +415,6 @@ static u32 ath9k_hw_def_get_eeprom(struc
- 		return get_unaligned_be16(pBase->macAddr + 4);
- 	case EEP_REG_0:
- 		return pBase->regDmn[0];
--	case EEP_REG_1:
--		return pBase->regDmn[1];
- 	case EEP_OP_CAP:
- 		return pBase->deviceCap;
- 	case EEP_OP_MODE:
---- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-@@ -322,8 +322,6 @@ static u32 ath9k_hw_4k_get_eeprom(struct
- 		return get_unaligned_be16(pBase->macAddr + 4);
- 	case EEP_REG_0:
- 		return pBase->regDmn[0];
--	case EEP_REG_1:
--		return pBase->regDmn[1];
- 	case EEP_OP_CAP:
- 		return pBase->deviceCap;
- 	case EEP_OP_MODE:
---- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-@@ -308,8 +308,6 @@ static u32 ath9k_hw_ar9287_get_eeprom(st
- 		return get_unaligned_be16(pBase->macAddr + 4);
- 	case EEP_REG_0:
- 		return pBase->regDmn[0];
--	case EEP_REG_1:
--		return pBase->regDmn[1];
- 	case EEP_OP_CAP:
- 		return pBase->deviceCap;
- 	case EEP_OP_MODE:
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -3014,8 +3014,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- 		return get_unaligned_be16(eep->macAddr + 4);
- 	case EEP_REG_0:
- 		return le16_to_cpu(pBase->regDmn[0]);
--	case EEP_REG_1:
--		return le16_to_cpu(pBase->regDmn[1]);
- 	case EEP_OP_CAP:
- 		return pBase->deviceCap;
- 	case EEP_OP_MODE:
---- a/drivers/net/wireless/ath/ath9k/eeprom.h
-+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
-@@ -225,7 +225,6 @@ enum eeprom_param {
- 	EEP_MAC_MID,
- 	EEP_MAC_LSW,
- 	EEP_REG_0,
--	EEP_REG_1,
- 	EEP_OP_CAP,
- 	EEP_OP_MODE,
- 	EEP_RF_SILENT,
diff --git a/package/mac80211/patches/604-rt2x00-add-CONFIG_RT2X00_LIB_EEPROM-option.patch b/package/mac80211/patches/604-rt2x00-add-CONFIG_RT2X00_LIB_EEPROM-option.patch
index f607ea17b2..81a65610b2 100644
--- a/package/mac80211/patches/604-rt2x00-add-CONFIG_RT2X00_LIB_EEPROM-option.patch
+++ b/package/mac80211/patches/604-rt2x00-add-CONFIG_RT2X00_LIB_EEPROM-option.patch
@@ -1,6 +1,6 @@
 --- a/config.mk
 +++ b/config.mk
-@@ -574,6 +574,7 @@ CONFIG_RT2X00=y
+@@ -573,6 +573,7 @@ CONFIG_RT2X00=y
  CONFIG_RT2X00_LIB=m
  CONFIG_RT2800_LIB=m
  CONFIG_RT2X00_LIB_FIRMWARE=y
diff --git a/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch b/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch
index 9bc8a33990..96baa19637 100644
--- a/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch
+++ b/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/mwl8k.c
 +++ b/drivers/net/wireless/mwl8k.c
-@@ -5192,6 +5192,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
+@@ -5193,6 +5193,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
  MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  
  static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
diff --git a/package/mac80211/patches/800-b43-gpio-mask-module-option.patch b/package/mac80211/patches/800-b43-gpio-mask-module-option.patch
index 0ee93fb177..08ac033cc5 100644
--- a/package/mac80211/patches/800-b43-gpio-mask-module-option.patch
+++ b/package/mac80211/patches/800-b43-gpio-mask-module-option.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/b43/b43.h
 +++ b/drivers/net/wireless/b43/b43.h
-@@ -753,6 +753,7 @@ struct b43_wldev {
+@@ -791,6 +791,7 @@ struct b43_wldev {
  	bool qos_enabled;		/* TRUE, if QoS is used. */
  	bool hwcrypto_enabled;		/* TRUE, if HW crypto acceleration is enabled. */
  	bool use_pio;			/* TRUE if next init should use PIO */
@@ -22,7 +22,7 @@
  static int modparam_bad_frames_preempt;
  module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  MODULE_PARM_DESC(bad_frames_preempt,
-@@ -2679,10 +2684,10 @@ static int b43_gpio_init(struct b43_wlde
+@@ -2686,10 +2691,10 @@ static int b43_gpio_init(struct b43_wlde
  		    & ~B43_MACCTL_GPOUTSMSK);
  
  	b43_write16(dev, B43_MMIO_GPIO_MASK, b43_read16(dev, B43_MMIO_GPIO_MASK)
diff --git a/package/mac80211/patches/810-b43_no_pio.patch b/package/mac80211/patches/810-b43_no_pio.patch
index 3b242f0136..be899c14d4 100644
--- a/package/mac80211/patches/810-b43_no_pio.patch
+++ b/package/mac80211/patches/810-b43_no_pio.patch
@@ -11,7 +11,7 @@
  b43-$(CONFIG_B43_PCMCIA)	+= pcmcia.o
 --- a/drivers/net/wireless/b43/main.c
 +++ b/drivers/net/wireless/b43/main.c
-@@ -1886,9 +1886,11 @@ static void b43_do_interrupt_thread(stru
+@@ -1893,9 +1893,11 @@ static void b43_do_interrupt_thread(stru
  			       dma_reason[4], dma_reason[5]);
  			b43err(dev->wl, "This device does not support DMA "
  			       "on your system. It will now be switched to PIO.\n");