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| author | James <> | 2015-11-04 11:49:21 +0000 |
|---|---|---|
| committer | James <> | 2015-11-04 11:49:21 +0000 |
| commit | 716ca530e1c4515d8683c9d5be3d56b301758b66 (patch) | |
| tree | 700eb5bcc1a462a5f21dcec15ce7c97ecfefa772 /target/linux/cns3xxx/patches-3.18/095-gpio_support.patch | |
| download | trunk-47381-716ca530e1c4515d8683c9d5be3d56b301758b66.tar.gz trunk-47381-716ca530e1c4515d8683c9d5be3d56b301758b66.tar.bz2 trunk-47381-716ca530e1c4515d8683c9d5be3d56b301758b66.zip | |
Diffstat (limited to 'target/linux/cns3xxx/patches-3.18/095-gpio_support.patch')
| -rw-r--r-- | target/linux/cns3xxx/patches-3.18/095-gpio_support.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/target/linux/cns3xxx/patches-3.18/095-gpio_support.patch b/target/linux/cns3xxx/patches-3.18/095-gpio_support.patch new file mode 100644 index 0000000..a6ce177 --- /dev/null +++ b/target/linux/cns3xxx/patches-3.18/095-gpio_support.patch @@ -0,0 +1,67 @@ +--- a/arch/arm/mach-cns3xxx/cns3420vb.c ++++ b/arch/arm/mach-cns3xxx/cns3420vb.c +@@ -245,6 +245,10 @@ static void __init cns3420_init(void) + + cns3xxx_ahci_init(); + cns3xxx_sdhci_init(); ++ cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA, ++ NR_IRQS_CNS3XXX); ++ cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB, ++ NR_IRQS_CNS3XXX + 32); + + pm_power_off = cns3xxx_power_off; + } +--- a/arch/arm/mach-cns3xxx/Kconfig ++++ b/arch/arm/mach-cns3xxx/Kconfig +@@ -1,6 +1,8 @@ + menuconfig ARCH_CNS3XXX + bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6 + select ARM_GIC ++ select ARCH_REQUIRE_GPIOLIB ++ select GENERIC_IRQ_CHIP + select PCI_DOMAINS if PCI + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if LOCAL_TIMERS +--- a/arch/arm/mach-cns3xxx/Makefile ++++ b/arch/arm/mach-cns3xxx/Makefile +@@ -1,7 +1,7 @@ + ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include + + obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o +-cns3xxx-y += core.o pm.o ++cns3xxx-y += core.o pm.o gpio.o + cns3xxx-$(CONFIG_ATAGS) += devices.o + cns3xxx-$(CONFIG_PCI) += pcie.o + cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o +--- a/arch/arm/mach-cns3xxx/cns3xxx.h ++++ b/arch/arm/mach-cns3xxx/cns3xxx.h +@@ -68,8 +68,10 @@ + #define SMC_PCELL_ID_3_OFFSET 0xFFC + + #define CNS3XXX_GPIOA_BASE 0x74000000 /* GPIO port A */ ++#define CNS3XXX_GPIOA_BASE_VIRT 0xFB006000 + + #define CNS3XXX_GPIOB_BASE 0x74800000 /* GPIO port B */ ++#define CNS3XXX_GPIOB_BASE_VIRT 0xFB007000 + + #define CNS3XXX_RTC_BASE 0x75000000 /* Real Time Clock */ + +--- a/arch/arm/mach-cns3xxx/core.c ++++ b/arch/arm/mach-cns3xxx/core.c +@@ -50,6 +50,16 @@ static struct map_desc cns3xxx_io_desc[] + .pfn = __phys_to_pfn(CNS3XXX_PM_BASE), + .length = SZ_4K, + .type = MT_DEVICE, ++ }, { ++ .virtual = CNS3XXX_GPIOA_BASE_VIRT, ++ .pfn = __phys_to_pfn(CNS3XXX_GPIOA_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE, ++ }, { ++ .virtual = CNS3XXX_GPIOB_BASE_VIRT, ++ .pfn = __phys_to_pfn(CNS3XXX_GPIOB_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE, + #ifdef CONFIG_PCI + }, { + .virtual = CNS3XXX_PCIE0_HOST_BASE_VIRT, |