1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
|
/******************************************************************************
**
** FILE NAME : ifxmips_ptm_vdsl.h
** PROJECT : UEIP
** MODULES : PTM
**
** DATE : 7 Jul 2009
** AUTHOR : Xu Liang
** DESCRIPTION : PTM driver header file (core functions for VR9)
** COPYRIGHT : Copyright (c) 2006
** Infineon Technologies AG
** Am Campeon 1-12, 85579 Neubiberg, Germany
**
** This program is free software; you can redistribute it and/or modify
** it under the terms of the GNU General Public License as published by
** the Free Software Foundation; either version 2 of the License, or
** (at your option) any later version.
**
** HISTORY
** $Date $Author $Comment
** 07 JUL 2009 Xu Liang Init Version
*******************************************************************************/
#ifndef IFXMIPS_PTM_VDSL_H
#define IFXMIPS_PTM_VDSL_H
#include <linux/version.h>
#include <linux/netdevice.h>
#include <lantiq_ptm.h>
#include "ifxmips_ptm_common.h"
#include "ifxmips_ptm_ppe_common.h"
#include "ifxmips_ptm_fw_regs_vdsl.h"
#define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24)
#define IFX_REG_W32(_v, _r) __raw_writel((_v), (volatile unsigned int *)(_r))
#define IFX_REG_R32(_r) __raw_readl((volatile unsigned int *)(_r))
#define IFX_REG_W32_MASK(_clr, _set, _r) IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
#define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
/*
* ####################################
* Definition
* ####################################
*/
/*
* Constant Definition
*/
#define ETH_WATCHDOG_TIMEOUT (10 * HZ)
/*
* DMA RX/TX Channel Parameters
*/
#define MAX_ITF_NUMBER 1
#define MAX_RX_DMA_CHANNEL_NUMBER 1
#define MAX_TX_DMA_CHANNEL_NUMBER 1
#define DATA_BUFFER_ALIGNMENT EMA_ALIGNMENT
#define DESC_ALIGNMENT 8
/*
* Ethernet Frame Definitions
*/
#define ETH_MAC_HEADER_LENGTH 14
#define ETH_CRC_LENGTH 4
#define ETH_MIN_FRAME_LENGTH 64
#define ETH_MAX_FRAME_LENGTH (1518 + 4 * 2)
/*
* RX Frame Definitions
*/
#define RX_MAX_BUFFER_SIZE (1600 + RX_HEAD_MAC_ADDR_ALIGNMENT)
#define RX_HEAD_MAC_ADDR_ALIGNMENT 2
#define RX_TAIL_CRC_LENGTH 0 // PTM firmware does not have ethernet frame CRC
// The len in descriptor doesn't include ETH_CRC
// because ETH_CRC may not present in some configuration
/*
* ####################################
* Data Type
* ####################################
*/
struct ptm_itf {
unsigned int rx_desc_pos;
unsigned int tx_desc_pos;
unsigned int tx_swap_desc_pos;
struct net_device_stats stats;
struct napi_struct napi;
};
struct ptm_priv_data {
struct ptm_itf itf[MAX_ITF_NUMBER];
};
/*
* ####################################
* Declaration
* ####################################
*/
extern unsigned int ifx_ptm_dbg_enable;
extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor);
extern void ifx_ptm_init_chip(void);
extern void ifx_ptm_uninit_chip(void);
extern int ifx_pp32_start(int pp32);
extern void ifx_pp32_stop(int pp32);
extern void ifx_reset_ppe(void);
#endif // IFXMIPS_PTM_VDSL_H
|
