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Diffstat (limited to 'target/linux/sunxi/patches-3.13/263-1-dt-sun7i-add-a20-spi.patch')
-rw-r--r--target/linux/sunxi/patches-3.13/263-1-dt-sun7i-add-a20-spi.patch85
1 files changed, 85 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.13/263-1-dt-sun7i-add-a20-spi.patch b/target/linux/sunxi/patches-3.13/263-1-dt-sun7i-add-a20-spi.patch
new file mode 100644
index 0000000000..8d43f621ee
--- /dev/null
+++ b/target/linux/sunxi/patches-3.13/263-1-dt-sun7i-add-a20-spi.patch
@@ -0,0 +1,85 @@
+From 3fff6e0d2bdd3b3f999a9dfcc8432ecba56eaad8 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@free-electrons.com>
+Date: Sat, 22 Feb 2014 22:35:54 +0100
+Subject: [PATCH] ARM: dt: sun7i: Add A20 SPI controller nodes
+
+The A20 has 4 SPI controllers compatible with the one found in the A10. Add
+them in the DT.
+
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm/boot/dts/sun7i-a20.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
+index 1961751..bcea04a 100644
+--- a/arch/arm/boot/dts/sun7i-a20.dtsi
++++ b/arch/arm/boot/dts/sun7i-a20.dtsi
+@@ -393,6 +393,28 @@
+ #size-cells = <1>;
+ ranges;
+
++ spi0: spi@01c05000 {
++ compatible = "allwinner,sun4i-a10-spi";
++ reg = <0x01c05000 0x1000>;
++ interrupts = <0 10 4>;
++ clocks = <&ahb_gates 20>, <&spi0_clk>;
++ clock-names = "ahb", "mod";
++ status = "disabled";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++
++ spi1: spi@01c06000 {
++ compatible = "allwinner,sun4i-a10-spi";
++ reg = <0x01c06000 0x1000>;
++ interrupts = <0 11 4>;
++ clocks = <&ahb_gates 21>, <&spi1_clk>;
++ clock-names = "ahb", "mod";
++ status = "disabled";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++
+ emac: ethernet@01c0b000 {
+ compatible = "allwinner,sun4i-a10-emac";
+ reg = <0x01c0b000 0x1000>;
+@@ -485,6 +507,17 @@
+ status = "disabled";
+ };
+
++ spi2: spi@01c17000 {
++ compatible = "allwinner,sun4i-a10-spi";
++ reg = <0x01c17000 0x1000>;
++ interrupts = <0 12 4>;
++ clocks = <&ahb_gates 22>, <&spi2_clk>;
++ clock-names = "ahb", "mod";
++ status = "disabled";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++
+ ahci: sata@01c18000 {
+ compatible = "allwinner,sun4i-a10-ahci";
+ reg = <0x01c18000 0x1000>;
+@@ -513,6 +546,17 @@
+ status = "disabled";
+ };
+
++ spi3: spi@01c1f000 {
++ compatible = "allwinner,sun4i-a10-spi";
++ reg = <0x01c1f000 0x1000>;
++ interrupts = <0 50 4>;
++ clocks = <&ahb_gates 23>, <&spi3_clk>;
++ clock-names = "ahb", "mod";
++ status = "disabled";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++
+ pio: pinctrl@01c20800 {
+ compatible = "allwinner,sun7i-a20-pinctrl";
+ reg = <0x01c20800 0x400>;
+--
+1.8.5.5
+