diff options
Diffstat (limited to 'target/linux/sunxi/patches-3.12/210-fix-a20-irqtypes.patch')
| -rw-r--r-- | target/linux/sunxi/patches-3.12/210-fix-a20-irqtypes.patch | 179 |
1 files changed, 179 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.12/210-fix-a20-irqtypes.patch b/target/linux/sunxi/patches-3.12/210-fix-a20-irqtypes.patch new file mode 100644 index 0000000000..e1c7c9a39f --- /dev/null +++ b/target/linux/sunxi/patches-3.12/210-fix-a20-irqtypes.patch @@ -0,0 +1,179 @@ +From 3e52e08e7f8f9cb1137f232e3bfa00f89ed27475 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime.ripard@free-electrons.com> +Date: Sat, 7 Dec 2013 12:38:32 +0100 +Subject: [PATCH] ARM: sun7i: dt: Fix interrupt trigger types + +The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The +GIC can work on several interrupt triggers, and the A20 was actually setting it +up to use a rising edge as a trigger, while it was actually a level high +trigger, leading to some interrupts that would be completely ignored if the +edge was missed. + +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> +Reported-by: Hans de Goede <hdegoede@redhat.com> +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +--- + arch/arm/boot/dts/sun7i-a20.dtsi | 42 ++++++++++++++++++++-------------------- + 1 file changed, 21 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi +index f1a6b24..0b7fcc1 100644 +--- a/arch/arm/boot/dts/sun7i-a20.dtsi ++++ b/arch/arm/boot/dts/sun7i-a20.dtsi +@@ -298,7 +298,7 @@ + emac: ethernet@01c0b000 { + compatible = "allwinner,sun4i-emac"; + reg = <0x01c0b000 0x1000>; +- interrupts = <0 55 1>; ++ interrupts = <0 55 4>; + clocks = <&ahb_gates 17>; + status = "disabled"; + }; +@@ -324,7 +324,7 @@ + pio: pinctrl@01c20800 { + compatible = "allwinner,sun7i-a20-pinctrl"; + reg = <0x01c20800 0x400>; +- interrupts = <0 28 1>; ++ interrupts = <0 28 4>; + clocks = <&apb0_gates 5>; + gpio-controller; + interrupt-controller; +@@ -405,12 +405,12 @@ + timer@01c20c00 { + compatible = "allwinner,sun4i-timer"; + reg = <0x01c20c00 0x90>; +- interrupts = <0 22 1>, +- <0 23 1>, +- <0 24 1>, +- <0 25 1>, +- <0 67 1>, +- <0 68 1>; ++ interrupts = <0 22 4>, ++ <0 23 4>, ++ <0 24 4>, ++ <0 25 4>, ++ <0 67 4>, ++ <0 68 4>; + clocks = <&osc24M>; + }; + +@@ -432,7 +432,7 @@ + uart0: serial@01c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; +- interrupts = <0 1 1>; ++ interrupts = <0 1 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 16>; +@@ -442,7 +442,7 @@ + uart1: serial@01c28400 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28400 0x400>; +- interrupts = <0 2 1>; ++ interrupts = <0 2 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 17>; +@@ -452,7 +452,7 @@ + uart2: serial@01c28800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28800 0x400>; +- interrupts = <0 3 1>; ++ interrupts = <0 3 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 18>; +@@ -462,7 +462,7 @@ + uart3: serial@01c28c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28c00 0x400>; +- interrupts = <0 4 1>; ++ interrupts = <0 4 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 19>; +@@ -472,7 +472,7 @@ + uart4: serial@01c29000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29000 0x400>; +- interrupts = <0 17 1>; ++ interrupts = <0 17 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 20>; +@@ -482,7 +482,7 @@ + uart5: serial@01c29400 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29400 0x400>; +- interrupts = <0 18 1>; ++ interrupts = <0 18 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 21>; +@@ -492,7 +492,7 @@ + uart6: serial@01c29800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29800 0x400>; +- interrupts = <0 19 1>; ++ interrupts = <0 19 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 22>; +@@ -502,7 +502,7 @@ + uart7: serial@01c29c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29c00 0x400>; +- interrupts = <0 20 1>; ++ interrupts = <0 20 4>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&apb1_gates 23>; +@@ -512,7 +512,7 @@ + i2c0: i2c@01c2ac00 { + compatible = "allwinner,sun4i-i2c"; + reg = <0x01c2ac00 0x400>; +- interrupts = <0 7 1>; ++ interrupts = <0 7 4>; + clocks = <&apb1_gates 0>; + clock-frequency = <100000>; + status = "disabled"; +@@ -521,7 +521,7 @@ + i2c1: i2c@01c2b000 { + compatible = "allwinner,sun4i-i2c"; + reg = <0x01c2b000 0x400>; +- interrupts = <0 8 1>; ++ interrupts = <0 8 4>; + clocks = <&apb1_gates 1>; + clock-frequency = <100000>; + status = "disabled"; +@@ -530,7 +530,7 @@ + i2c2: i2c@01c2b400 { + compatible = "allwinner,sun4i-i2c"; + reg = <0x01c2b400 0x400>; +- interrupts = <0 9 1>; ++ interrupts = <0 9 4>; + clocks = <&apb1_gates 2>; + clock-frequency = <100000>; + status = "disabled"; +@@ -539,7 +539,7 @@ + i2c3: i2c@01c2b800 { + compatible = "allwinner,sun4i-i2c"; + reg = <0x01c2b800 0x400>; +- interrupts = <0 88 1>; ++ interrupts = <0 88 4>; + clocks = <&apb1_gates 3>; + clock-frequency = <100000>; + status = "disabled"; +@@ -548,7 +548,7 @@ + i2c4: i2c@01c2bc00 { + compatible = "allwinner,sun4i-i2c"; + reg = <0x01c2bc00 0x400>; +- interrupts = <0 89 1>; ++ interrupts = <0 89 4>; + clocks = <&apb1_gates 15>; + clock-frequency = <100000>; + status = "disabled"; +-- +1.8.5.1 + |