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-rw-r--r--package/mac80211/patches/409-ath9k-remove-u16-casts-from-rtc-register-access.patch60
1 files changed, 60 insertions, 0 deletions
diff --git a/package/mac80211/patches/409-ath9k-remove-u16-casts-from-rtc-register-access.patch b/package/mac80211/patches/409-ath9k-remove-u16-casts-from-rtc-register-access.patch
new file mode 100644
index 0000000000..7aa2ee34f5
--- /dev/null
+++ b/package/mac80211/patches/409-ath9k-remove-u16-casts-from-rtc-register-access.patch
@@ -0,0 +1,60 @@
+From 491719852fb049d0a65dc05550b645b62d799453 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Mon, 5 Jan 2009 11:11:28 +0100
+Subject: [PATCH 09/11] ath9k: remove (u16) casts from rtc register access
+
+The RTC register offsets don't fit into 'u16' on the AR913x, so we have
+to remove the existing casts.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
+---
+ drivers/net/wireless/ath9k/hw.c | 14 +++++++-------
+ 1 files changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/wireless/ath9k/hw.c
++++ b/drivers/net/wireless/ath9k/hw.c
+@@ -1010,7 +1010,7 @@ static void ath9k_hw_init_pll(struct ath
+ pll |= SM(0xb, AR_RTC_PLL_DIV);
+ }
+ }
+- REG_WRITE(ah, (u16) (AR_RTC_PLL_CONTROL), pll);
++ REG_WRITE(ah, (AR_RTC_PLL_CONTROL), pll);
+
+ udelay(RTC_PLL_SETTLE_DELAY);
+
+@@ -1550,11 +1550,11 @@ static bool ath9k_hw_set_reset(struct at
+ rst_flags |= AR_RTC_RC_MAC_COLD;
+ }
+
+- REG_WRITE(ah, (u16) (AR_RTC_RC), rst_flags);
++ REG_WRITE(ah, (AR_RTC_RC), rst_flags);
+ udelay(50);
+
+- REG_WRITE(ah, (u16) (AR_RTC_RC), 0);
+- if (!ath9k_hw_wait(ah, (u16) (AR_RTC_RC), AR_RTC_RC_M, 0)) {
++ REG_WRITE(ah, (AR_RTC_RC), 0);
++ if (!ath9k_hw_wait(ah, (AR_RTC_RC), AR_RTC_RC_M, 0)) {
+ DPRINTF(ah->ah_sc, ATH_DBG_RESET,
+ "RTC stuck in MAC reset\n");
+ return false;
+@@ -1576,8 +1576,8 @@ static bool ath9k_hw_set_reset_power_on(
+ REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
+ AR_RTC_FORCE_WAKE_ON_INT);
+
+- REG_WRITE(ah, (u16) (AR_RTC_RESET), 0);
+- REG_WRITE(ah, (u16) (AR_RTC_RESET), 1);
++ REG_WRITE(ah, (AR_RTC_RESET), 0);
++ REG_WRITE(ah, (AR_RTC_RESET), 1);
+
+ if (!ath9k_hw_wait(ah,
+ AR_RTC_STATUS,
+@@ -2602,7 +2602,7 @@ static void ath9k_set_power_sleep(struct
+ if (!AR_SREV_9100(ah))
+ REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
+
+- REG_CLR_BIT(ah, (u16) (AR_RTC_RESET),
++ REG_CLR_BIT(ah, (AR_RTC_RESET),
+ AR_RTC_RESET_EN);
+ }
+ }