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author | John Crispin <blogic@openwrt.org> | 2015-10-05 10:28:12 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2015-10-05 10:28:12 +0000 |
commit | dff2ed6792e4121d689b3c4f779766fa2e7edf0c (patch) | |
tree | a7f665e30d5bf076c16fd8adfe62a9e933a51dd2 /target/linux | |
parent | df855a498e296b7db0143d478d6940bd608b8a3c (diff) | |
download | master-187ad058-dff2ed6792e4121d689b3c4f779766fa2e7edf0c.tar.gz master-187ad058-dff2ed6792e4121d689b3c4f779766fa2e7edf0c.tar.bz2 master-187ad058-dff2ed6792e4121d689b3c4f779766fa2e7edf0c.zip |
lantiq: fix ath_pci_fixup hang on bridged devices
Port of r41856.
In contrast to the brcm63xx target, it isn't sufficient to enable/disable
the bridge. The device needs to be enabled/disabled to fix the hang. The
bridge will be automatically enabled by the time the connected device is
enabled.
Fixes boot on TD-W8980.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47129 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux')
2 files changed, 20 insertions, 2 deletions
diff --git a/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch b/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch index ec769ccf63..2fc4db3066 100644 --- a/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch +++ b/target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch @@ -415,7 +415,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +device_initcall(of_eth_mac_init); --- /dev/null +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c -@@ -0,0 +1,109 @@ +@@ -0,0 +1,118 @@ +/* + * Atheros AP94 reference board PCI initialization + * @@ -442,6 +442,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +static void ath_pci_fixup(struct pci_dev *dev) +{ + void __iomem *mem; ++ struct pci_dev *bridge = pci_upstream_bridge(dev); + u16 *cal_data = NULL; + u16 cmd; + u32 bar0; @@ -477,6 +478,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + return; + } + ++ if (bridge) { ++ pci_enable_device(dev); ++ } ++ + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base); + pci_read_config_word(dev, PCI_COMMAND, &cmd); @@ -512,6 +517,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); + ++ if (bridge) { ++ pci_disable_device(dev); ++ } ++ + iounmap(mem); +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup); diff --git a/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch b/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch index ec769ccf63..2fc4db3066 100644 --- a/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch +++ b/target/linux/lantiq/patches-4.1/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch @@ -415,7 +415,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +device_initcall(of_eth_mac_init); --- /dev/null +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c -@@ -0,0 +1,109 @@ +@@ -0,0 +1,118 @@ +/* + * Atheros AP94 reference board PCI initialization + * @@ -442,6 +442,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +static void ath_pci_fixup(struct pci_dev *dev) +{ + void __iomem *mem; ++ struct pci_dev *bridge = pci_upstream_bridge(dev); + u16 *cal_data = NULL; + u16 cmd; + u32 bar0; @@ -477,6 +478,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + return; + } + ++ if (bridge) { ++ pci_enable_device(dev); ++ } ++ + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base); + pci_read_config_word(dev, PCI_COMMAND, &cmd); @@ -512,6 +517,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); + ++ if (bridge) { ++ pci_disable_device(dev); ++ } ++ + iounmap(mem); +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup); |