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authorJohn Crispin <blogic@openwrt.org>2015-12-12 07:37:53 +0000
committerJohn Crispin <blogic@openwrt.org>2015-12-12 07:37:53 +0000
commitc4c9a719f166242e9e2bc7c20655f68051258c0f (patch)
treeb068081a672bf1c72eef8ce1a3ed1893b14406f4 /target/linux
parent3373d2bd800d2890f3101002fa5f67f7a79545f2 (diff)
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ramips: add support for Spansion S34ML0[24]G2 flash
Signed-off-by: John Crispin <blogic@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47880 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ramips/patches-4.3/0901-spansion_nand_id_fix.patch43
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.3/0901-spansion_nand_id_fix.patch b/target/linux/ramips/patches-4.3/0901-spansion_nand_id_fix.patch
new file mode 100644
index 0000000000..bb95461276
--- /dev/null
+++ b/target/linux/ramips/patches-4.3/0901-spansion_nand_id_fix.patch
@@ -0,0 +1,43 @@
+From 8b61a1a33e41456ebeafa0ebe7ec0fccf859861e Mon Sep 17 00:00:00 2001
+From: Nikolay Martynov <mar.kolya@gmail.com>
+Date: Wed, 25 Nov 2015 20:43:46 -0500
+Subject: [PATCH] mtd: nand: Fix Spansion sparearea size detection
+
+According to datasheet S34ML02G2 and S34ML04G2 have
+larger sparea area size than was detected.
+
+Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
+---
+ drivers/mtd/nand/nand_base.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/mtd/nand/nand_base.c
++++ b/drivers/mtd/nand/nand_base.c
+@@ -3422,6 +3422,7 @@ static void nand_decode_ext_id(struct mt
+ /*
+ * Field definitions are in the following datasheets:
+ * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
++ * Spansion S34ML02G2 (p.33)
+ * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
+ * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
+ *
+@@ -3519,6 +3520,19 @@ static void nand_decode_ext_id(struct mt
+ *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
+
+ /*
++ * Spansion S34ML0[24]G2 have oobsize twice as large
++ * as S34ML01G2 encoded in the same bit. We
++ * differinciate them by their ID length
++ */
++ if (id_data[0] == NAND_MFR_AMD
++ && (id_data[1] == 0xda
++ || id_data[1] == 0xdc
++ || id_data[1] == 0xca
++ || id_data[1] == 0xcc)) {
++ mtd->oobsize *= 2;
++ }
++
++ /*
+ * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
+ * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
+ * follows: