diff options
author | Zoltan HERPAI <wigyori@uid0.hu> | 2016-01-09 16:20:39 +0000 |
---|---|---|
committer | Zoltan HERPAI <wigyori@uid0.hu> | 2016-01-09 16:20:39 +0000 |
commit | e055d9d9674666645b2cd08b8f3129c80dcf3f15 (patch) | |
tree | 7a0d14b3e0dbfc2ec6af7231959e5414dc8f41b2 /target/linux/sunxi/patches-4.4/111-1-dt-sun4i-add-ve-clock-module.patch | |
parent | 221a67a90a5d278033f896a7170291d70260cf3b (diff) | |
download | master-187ad058-e055d9d9674666645b2cd08b8f3129c80dcf3f15.tar.gz master-187ad058-e055d9d9674666645b2cd08b8f3129c80dcf3f15.tar.bz2 master-187ad058-e055d9d9674666645b2cd08b8f3129c80dcf3f15.zip |
sunxi: initial 4.4 support
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48161 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/sunxi/patches-4.4/111-1-dt-sun4i-add-ve-clock-module.patch')
-rw-r--r-- | target/linux/sunxi/patches-4.4/111-1-dt-sun4i-add-ve-clock-module.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-4.4/111-1-dt-sun4i-add-ve-clock-module.patch b/target/linux/sunxi/patches-4.4/111-1-dt-sun4i-add-ve-clock-module.patch new file mode 100644 index 0000000000..f24711ea41 --- /dev/null +++ b/target/linux/sunxi/patches-4.4/111-1-dt-sun4i-add-ve-clock-module.patch @@ -0,0 +1,34 @@ +From 1ccc4939220cf815c309feddcf82dba260499194 Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai <wens@csie.org> +Date: Sat, 5 Dec 2015 21:16:45 +0800 +Subject: [PATCH] ARM: dts: sun4i: Add VE (Video Engine) module clock node + +The video engine has its own module clock, which also includes a +reset control for it. + +Signed-off-by: Chen-Yu Tsai <wens@csie.org> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> +--- + arch/arm/boot/dts/sun4i-a10.dtsi | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi +index 849d024..2c8f5e6 100644 +--- a/arch/arm/boot/dts/sun4i-a10.dtsi ++++ b/arch/arm/boot/dts/sun4i-a10.dtsi +@@ -520,6 +520,15 @@ + "dram_de_mp", "dram_ace"; + }; + ++ ve_clk: clk@01c2013c { ++ #clock-cells = <0>; ++ #reset-cells = <0>; ++ compatible = "allwinner,sun4i-a10-ve-clk"; ++ reg = <0x01c2013c 0x4>; ++ clocks = <&pll4>; ++ clock-output-names = "ve"; ++ }; ++ + codec_clk: clk@01c20140 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-codec-clk"; |