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| author | Zoltan HERPAI <wigyori@uid0.hu> | 2014-03-06 00:09:30 +0000 |
|---|---|---|
| committer | Zoltan HERPAI <wigyori@uid0.hu> | 2014-03-06 00:09:30 +0000 |
| commit | a8ab50ee77d004e4a00cd6280cc1b542e57054b1 (patch) | |
| tree | 0a2be71f002d9dd9084a172a72bef22388f0ca0e /target/linux/sunxi/patches-3.13/213-dt-sun7i-add-external-clk-outputs.patch | |
| parent | 8911fab5ade7400cdb42c43f884b4a10141c159e (diff) | |
| download | master-187ad058-a8ab50ee77d004e4a00cd6280cc1b542e57054b1.tar.gz master-187ad058-a8ab50ee77d004e4a00cd6280cc1b542e57054b1.tar.bz2 master-187ad058-a8ab50ee77d004e4a00cd6280cc1b542e57054b1.zip | |
sunxi: driver refresh for 3.13
- update gmac / mmc / usb / ahci drivers to follow mainline dev trees
- add driver for spi
- update clock support
- update a31 support
- move to new DT compats where appropriate
- re-order patchqueue where needed
- verified working a20 smp
- move most DTSes off files/
- update defconfig
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39782 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/sunxi/patches-3.13/213-dt-sun7i-add-external-clk-outputs.patch')
| -rw-r--r-- | target/linux/sunxi/patches-3.13/213-dt-sun7i-add-external-clk-outputs.patch | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/target/linux/sunxi/patches-3.13/213-dt-sun7i-add-external-clk-outputs.patch b/target/linux/sunxi/patches-3.13/213-dt-sun7i-add-external-clk-outputs.patch deleted file mode 100644 index 3dda2946d2..0000000000 --- a/target/linux/sunxi/patches-3.13/213-dt-sun7i-add-external-clk-outputs.patch +++ /dev/null @@ -1,38 +0,0 @@ -From f3a50c26f33a4627e5d3e35f80db3f22a5375237 Mon Sep 17 00:00:00 2001 -From: Chen-Yu Tsai <wens@csie.org> -Date: Tue, 24 Dec 2013 21:26:20 +0800 -Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for clock outputs - -This patch adds the clock output pin options on the A20. -The 2 pins can output a configurable clock to be used by -external modules. This is used on the CubieTruck, to supply -a 32768 Hz low power clock to the onboard Wifi+BT module. - -Signed-off-by: Chen-Yu Tsai <wens@csie.org> ---- - arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/arch/arm/boot/dts/sun7i-a20.dtsi -+++ b/arch/arm/boot/dts/sun7i-a20.dtsi -@@ -490,6 +490,20 @@ - allwinner,drive = <3>; - allwinner,pull = <0>; - }; -+ -+ clk_out_a_pins: clk_out_a@0 { -+ allwinner,pins = "PI12"; -+ allwinner,function = "clk_out_a"; -+ allwinner,drive = <0>; -+ allwinner,pull = <0>; -+ }; -+ -+ clk_out_b_pins: clk_out_b@0 { -+ allwinner,pins = "PI13"; -+ allwinner,function = "clk_out_b"; -+ allwinner,drive = <0>; -+ allwinner,pull = <0>; -+ }; - }; - - sata: ahci@01c18000 { |