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| author | Marek Vasut <marex@denx.de> | 2016-06-20 15:28:36 +0200 |
|---|---|---|
| committer | Zoltan HERPAI <wigyori@uid0.hu> | 2016-06-20 15:28:36 +0200 |
| commit | 870678baa7f8b9a65945237704d84d7724f42459 (patch) | |
| tree | 29dba8a076d9e53752b02f768dcdbe15fa9271cd /target/linux/socfpga/patches-4.4/0033-ARM-socfpga-Enable-QSPI-flash-on-SoCKit.patch | |
| parent | 8864b97350bde1fffe614df3c0bfc0cb34fb40d4 (diff) | |
| download | master-187ad058-870678baa7f8b9a65945237704d84d7724f42459.tar.gz master-187ad058-870678baa7f8b9a65945237704d84d7724f42459.tar.bz2 master-187ad058-870678baa7f8b9a65945237704d84d7724f42459.zip | |
target: socfpga: Add support for QSPI NOR boot
Add necessary kernel backports to support the Cadence QSPI controller
present on the Altera SoCFPGA SoC.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'target/linux/socfpga/patches-4.4/0033-ARM-socfpga-Enable-QSPI-flash-on-SoCKit.patch')
| -rw-r--r-- | target/linux/socfpga/patches-4.4/0033-ARM-socfpga-Enable-QSPI-flash-on-SoCKit.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/target/linux/socfpga/patches-4.4/0033-ARM-socfpga-Enable-QSPI-flash-on-SoCKit.patch b/target/linux/socfpga/patches-4.4/0033-ARM-socfpga-Enable-QSPI-flash-on-SoCKit.patch new file mode 100644 index 0000000000..f242d8cb72 --- /dev/null +++ b/target/linux/socfpga/patches-4.4/0033-ARM-socfpga-Enable-QSPI-flash-on-SoCKit.patch @@ -0,0 +1,47 @@ +From 8c1cd66d13406533f9948dbcd25d4b53d389c109 Mon Sep 17 00:00:00 2001 +From: Marek Vasut <marex@denx.de> +Date: Sun, 21 Jun 2015 23:00:06 +0200 +Subject: [PATCH 33/33] ARM: socfpga: Enable QSPI flash on SoCKit + +Add the QSPI NOR node on SoCkit. + +Signed-off-by: Marek Vasut <marex@denx.de> +--- + arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +index 02e22f5..d706348 100644 +--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts ++++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +@@ -175,6 +175,27 @@ + status = "okay"; + }; + ++&qspi { ++ status = "okay"; ++ ++ flash0: n25q00@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "n25q00"; ++ reg = <0>; /* chip select */ ++ spi-max-frequency = <100000000>; ++ m25p,fast-read; ++ ++ cdns,page-size = <256>; ++ cdns,block-size = <16>; ++ cdns,read-delay = <4>; ++ cdns,tshsl-ns = <50>; ++ cdns,tsd2d-ns = <50>; ++ cdns,tchsh-ns = <4>; ++ cdns,tslch-ns = <4>; ++ }; ++}; ++ + &usb1 { + status = "okay"; + }; +-- +2.8.1 + |