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| author | John Crispin <blogic@openwrt.org> | 2014-08-01 20:51:14 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2014-08-01 20:51:14 +0000 |
| commit | c6ded2d17c8dee15a119191b3ca2e3efd924521f (patch) | |
| tree | dc832f07d6580bb2393c90a1bee97fb8d73b0d6c /target/linux/ramips | |
| parent | f8d6bdb4e23824b44b85cb03978c5da7cd429deb (diff) | |
| download | master-187ad058-c6ded2d17c8dee15a119191b3ca2e3efd924521f.tar.gz master-187ad058-c6ded2d17c8dee15a119191b3ca2e3efd924521f.tar.bz2 master-187ad058-c6ded2d17c8dee15a119191b3ca2e3efd924521f.zip | |
ramips: Add support for SPI_CS1 pinmux
This patch adds support for setting SPI_CS1 as Chip Select, Watchdog reset output and GPIO#27.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41938 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips')
| -rw-r--r-- | target/linux/ramips/dts/rt5350.dtsi | 6 | ||||
| -rw-r--r-- | target/linux/ramips/patches-3.10/0221-pinmux-rt5350-spi_cs1.patch | 31 |
2 files changed, 37 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/rt5350.dtsi b/target/linux/ramips/dts/rt5350.dtsi index e88f28dee8..722540b037 100644 --- a/target/linux/ramips/dts/rt5350.dtsi +++ b/target/linux/ramips/dts/rt5350.dtsi @@ -230,6 +230,12 @@ ralink,function = "uartf"; }; }; + spi_cs1: spi1 { + spi1 { + ralink,group = "spi_cs1"; + ralink,function = "spi_cs1"; + }; + }; }; rstctrl: rstctrl { diff --git a/target/linux/ramips/patches-3.10/0221-pinmux-rt5350-spi_cs1.patch b/target/linux/ramips/patches-3.10/0221-pinmux-rt5350-spi_cs1.patch new file mode 100644 index 0000000000..bdcf7f0c1a --- /dev/null +++ b/target/linux/ramips/patches-3.10/0221-pinmux-rt5350-spi_cs1.patch @@ -0,0 +1,31 @@ +--- a/arch/mips/include/asm/mach-ralink/rt305x.h ++++ b/arch/mips/include/asm/mach-ralink/rt305x.h +@@ -145,6 +145,7 @@ static inline int soc_is_rt5350(void) + #define RT305X_GPIO_MODE_SDRAM 8 + #define RT305X_GPIO_MODE_RGMII 9 + #define RT5350_GPIO_MODE_PHY_LED 14 ++#define RT5350_GPIO_MODE_SPI_CS1 21 + #define RT3352_GPIO_MODE_LNA 18 + #define RT3352_GPIO_MODE_PA 20 + +--- a/arch/mips/ralink/rt305x.c ++++ b/arch/mips/ralink/rt305x.c +@@ -38,6 +38,10 @@ static struct rt2880_pmx_func uartlite_f + static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) }; + static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) }; + static struct rt2880_pmx_func rt5350_led_func[] = { FUNC("led", 0, 22, 5) }; ++static struct rt2880_pmx_func rt5350_cs1_func[] = { ++ FUNC("spi_cs1", 0, 27, 1), ++ FUNC("wdg_cs1", 1, 27, 1), ++}; + static struct rt2880_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 16) }; + static struct rt2880_pmx_func rt3352_rgmii_func[] = { FUNC("rgmii", 0, 24, 12) }; + static struct rt2880_pmx_func rgmii_func[] = { FUNC("rgmii", 0, 40, 12) }; +@@ -81,6 +85,7 @@ static struct rt2880_pmx_group rt5350_pi + GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1), + GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG), + GRP("led", rt5350_led_func, 1, RT5350_GPIO_MODE_PHY_LED), ++ GRP("spi_cs1", rt5350_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1), + { 0 } + }; + |