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| author | John Crispin <blogic@openwrt.org> | 2013-07-14 18:00:34 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-07-14 18:00:34 +0000 |
| commit | d4b8b8d62fcb34be61c325efa6f91d937d19a616 (patch) | |
| tree | 29b48b2691fa9b9bb934598aab3dd09bb8562f6e /target/linux/ramips/patches-3.8/0042-MIPS-ralink-add-memory-definition-for-MT7620.patch | |
| parent | 6bcbd536ed1e845dce59f5a063bbce293740c26e (diff) | |
| download | master-187ad058-d4b8b8d62fcb34be61c325efa6f91d937d19a616.tar.gz master-187ad058-d4b8b8d62fcb34be61c325efa6f91d937d19a616.tar.bz2 master-187ad058-d4b8b8d62fcb34be61c325efa6f91d937d19a616.zip | |
ralink: drop v3.8 support
Signed-off-by: John Crispin <blogic@opewnrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37311 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.8/0042-MIPS-ralink-add-memory-definition-for-MT7620.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.8/0042-MIPS-ralink-add-memory-definition-for-MT7620.patch | 65 |
1 files changed, 0 insertions, 65 deletions
diff --git a/target/linux/ramips/patches-3.8/0042-MIPS-ralink-add-memory-definition-for-MT7620.patch b/target/linux/ramips/patches-3.8/0042-MIPS-ralink-add-memory-definition-for-MT7620.patch deleted file mode 100644 index da2610ce9c..0000000000 --- a/target/linux/ramips/patches-3.8/0042-MIPS-ralink-add-memory-definition-for-MT7620.patch +++ /dev/null @@ -1,65 +0,0 @@ -From e7dfbb1eafed754442099a33492a9e90fa33d3fa Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Sun, 14 Apr 2013 09:55:29 +0200 -Subject: [PATCH 42/79] MIPS: ralink: add memory definition for MT7620 - -Populate struct soc_info with the data that describes our RAM window. - -Signed-off-by: John Crispin <blogic@openwrt.org> -Patchwork: http://patchwork.linux-mips.org/patch/5183/ ---- - arch/mips/include/asm/mach-ralink/mt7620.h | 8 ++++++++ - arch/mips/ralink/mt7620.c | 20 ++++++++++++++++++++ - 2 files changed, 28 insertions(+) - -diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h -index b272649..9809972 100644 ---- a/arch/mips/include/asm/mach-ralink/mt7620.h -+++ b/arch/mips/include/asm/mach-ralink/mt7620.h -@@ -50,6 +50,14 @@ - #define SYSCFG0_DRAM_TYPE_DDR1 1 - #define SYSCFG0_DRAM_TYPE_DDR2 2 - -+#define MT7620_DRAM_BASE 0x0 -+#define MT7620_SDRAM_SIZE_MIN 2 -+#define MT7620_SDRAM_SIZE_MAX 64 -+#define MT7620_DDR1_SIZE_MIN 32 -+#define MT7620_DDR1_SIZE_MAX 128 -+#define MT7620_DDR2_SIZE_MIN 32 -+#define MT7620_DDR2_SIZE_MAX 256 -+ - #define MT7620_GPIO_MODE_I2C BIT(0) - #define MT7620_GPIO_MODE_UART0_SHIFT 2 - #define MT7620_GPIO_MODE_UART0_MASK 0x7 -diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c -index eb00ab8..98ddb93 100644 ---- a/arch/mips/ralink/mt7620.c -+++ b/arch/mips/ralink/mt7620.c -@@ -211,4 +211,24 @@ void prom_soc_init(struct ralink_soc_info *soc_info) - - cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0); - dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK; -+ -+ switch (dram_type) { -+ case SYSCFG0_DRAM_TYPE_SDRAM: -+ soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN; -+ soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX; -+ break; -+ -+ case SYSCFG0_DRAM_TYPE_DDR1: -+ soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; -+ soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; -+ break; -+ -+ case SYSCFG0_DRAM_TYPE_DDR2: -+ soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN; -+ soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX; -+ break; -+ default: -+ BUG(); -+ } -+ soc_info->mem_base = MT7620_DRAM_BASE; - } --- -1.7.10.4 - |