diff options
| author | John Crispin <blogic@openwrt.org> | 2013-04-03 09:59:10 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-04-03 09:59:10 +0000 |
| commit | 6bb6cbe60011dd33b8ff9f6b6058fb644548b088 (patch) | |
| tree | 03310346c9d78ed5485994b47e3bb610250851ae /target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch | |
| parent | cf9b57476dfb78296cd3b8ffad52d9bed3ee8b0f (diff) | |
| download | master-187ad058-6bb6cbe60011dd33b8ff9f6b6058fb644548b088.tar.gz master-187ad058-6bb6cbe60011dd33b8ff9f6b6058fb644548b088.tar.bz2 master-187ad058-6bb6cbe60011dd33b8ff9f6b6058fb644548b088.zip | |
[ramips] add patches for v3.8
Signed-off-by: John Crsipin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36163 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch b/target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch new file mode 100644 index 0000000000..9632cc22de --- /dev/null +++ b/target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch @@ -0,0 +1,70 @@ +From dcc7310e144c3bf17a86d2f058d60fb525d4b34a Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Thu, 31 Jan 2013 13:44:10 +0100 +Subject: [PATCH 12/14] Document: devicetree: add OF documents for MIPS + interrupt controller + +Signed-off-by: John Crispin <blogic@openwrt.org> +Acked-by: David Daney <david.daney@cavium.com> +Patchwork: http://patchwork.linux-mips.org/patch/4901/ +--- + Documentation/devicetree/bindings/mips/cpu_irq.txt | 47 ++++++++++++++++++++ + 1 file changed, 47 insertions(+) + create mode 100644 Documentation/devicetree/bindings/mips/cpu_irq.txt + +diff --git a/Documentation/devicetree/bindings/mips/cpu_irq.txt b/Documentation/devicetree/bindings/mips/cpu_irq.txt +new file mode 100644 +index 0000000..13aa4b6 +--- /dev/null ++++ b/Documentation/devicetree/bindings/mips/cpu_irq.txt +@@ -0,0 +1,47 @@ ++MIPS CPU interrupt controller ++ ++On MIPS the mips_cpu_intc_init() helper can be used to initialize the 8 CPU ++IRQs from a devicetree file and create a irq_domain for IRQ controller. ++ ++With the irq_domain in place we can describe how the 8 IRQs are wired to the ++platforms internal interrupt controller cascade. ++ ++Below is an example of a platform describing the cascade inside the devicetree ++and the code used to load it inside arch_init_irq(). ++ ++Required properties: ++- compatible : Should be "mti,cpu-interrupt-controller" ++ ++Example devicetree: ++ cpu-irq: cpu-irq@0 { ++ #address-cells = <0>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ compatible = "mti,cpu-interrupt-controller"; ++ }; ++ ++ intc: intc@200 { ++ compatible = "ralink,rt2880-intc"; ++ reg = <0x200 0x100>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-parent = <&cpu-irq>; ++ interrupts = <2>; ++ }; ++ ++ ++Example platform irq.c: ++static struct of_device_id __initdata of_irq_ids[] = { ++ { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init }, ++ { .compatible = "ralink,rt2880-intc", .data = intc_of_init }, ++ {}, ++}; ++ ++void __init arch_init_irq(void) ++{ ++ of_irq_init(of_irq_ids); ++} +-- +1.7.10.4 + |