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| author | Gabor Juhos <juhosg@openwrt.org> | 2009-09-04 15:08:26 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2009-09-04 15:08:26 +0000 |
| commit | 4087330444e959cdc79c05e2ac066585bdbe9835 (patch) | |
| tree | ccf6a5b81e9dc2421a4387d63ac2735067130ab1 /target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c | |
| parent | beeade30e75f7f7052a902709a8c995cd60a237f (diff) | |
| download | master-187ad058-4087330444e959cdc79c05e2ac066585bdbe9835.tar.gz master-187ad058-4087330444e959cdc79c05e2ac066585bdbe9835.tar.bz2 master-187ad058-4087330444e959cdc79c05e2ac066585bdbe9835.zip | |
[ramips] add GPIO configuration feature
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17512 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c index 249da36b06..002aaebabd 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c @@ -14,6 +14,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> +#include <linux/gpio.h> #include <asm/mach-ralink/common.h> #include <asm/mach-ralink/rt305x.h> @@ -66,3 +67,60 @@ void __init rt305x_detect_sys_freq(void) rt305x_sys_freq = rt305x_cpu_freq / 3; } + +static void rt305x_gpio_reserve(int first, int last) +{ + for (; first <= last; first++) + gpio_request(first, "reserved"); +} + +void __init rt305x_gpio_init(u32 mode) +{ + u32 t; + + rt305x_sysc_wr(mode, SYSC_REG_GPIO_MODE); + + ramips_gpio_init(); + if ((mode & RT305X_GPIO_MODE_I2C) == 0) + rt305x_gpio_reserve(RT305X_GPIO_I2C_SD, RT305X_GPIO_I2C_SCLK); + + if ((mode & RT305X_GPIO_MODE_SPI) == 0) + rt305x_gpio_reserve(RT305X_GPIO_SPI_EN, RT305X_GPIO_SPI_CLK); + + t = mode >> RT305X_GPIO_MODE_UART0_SHIFT; + t &= RT305X_GPIO_MODE_UART0_MASK; + switch (t) { + case RT305X_GPIO_MODE_UARTF: + case RT305X_GPIO_MODE_PCM_UARTF: + case RT305X_GPIO_MODE_PCM_I2S: + case RT305X_GPIO_MODE_I2S_UARTF: + rt305x_gpio_reserve(RT305X_GPIO_7, RT305X_GPIO_14); + break; + case RT305X_GPIO_MODE_PCM_GPIO: + rt305x_gpio_reserve(RT305X_GPIO_10, RT305X_GPIO_14); + break; + case RT305X_GPIO_MODE_GPIO_UARTF: + case RT305X_GPIO_MODE_GPIO_I2S: + rt305x_gpio_reserve(RT305X_GPIO_7, RT305X_GPIO_10); + break; + } + + if ((mode & RT305X_GPIO_MODE_UART1) == 0) + rt305x_gpio_reserve(RT305X_GPIO_UART1_TXD, + RT305X_GPIO_UART1_RXD); + + if ((mode & RT305X_GPIO_MODE_JTAG) == 0) + rt305x_gpio_reserve(RT305X_GPIO_JTAG_TDO, RT305X_GPIO_JTAG_TDI); + + if ((mode & RT305X_GPIO_MODE_MDIO) == 0) + rt305x_gpio_reserve(RT305X_GPIO_MDIO_MDC, + RT305X_GPIO_MDIO_MDIO); + + if ((mode & RT305X_GPIO_MODE_SDRAM) == 0) + rt305x_gpio_reserve(RT305X_GPIO_SDRAM_MD16, + RT305X_GPIO_SDRAM_MD31); + + if ((mode & RT305X_GPIO_MODE_RGMII) == 0) + rt305x_gpio_reserve(RT305X_GPIO_GE0_TXD0, + RT305X_GPIO_GE0_RXCLK); +} |