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author | Luka Perkov <luka@openwrt.org> | 2013-09-27 01:52:28 +0000 |
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committer | Luka Perkov <luka@openwrt.org> | 2013-09-27 01:52:28 +0000 |
commit | e0e36cb5d987c6515f2b9c6ed4e4df6c84f18541 (patch) | |
tree | 90b32b568e37dd68264a916ebdcdb807897b2451 /target/linux/mvebu/patches-3.8/037-arm_mvebu_add_pcie_dt_a370.patch | |
parent | 896a6277b51daa7f253d849a7a501959dfcf705e (diff) | |
download | master-187ad058-e0e36cb5d987c6515f2b9c6ed4e4df6c84f18541.tar.gz master-187ad058-e0e36cb5d987c6515f2b9c6ed4e4df6c84f18541.tar.bz2 master-187ad058-e0e36cb5d987c6515f2b9c6ed4e4df6c84f18541.zip |
mvebu: drop 3.8 support
Signed-off-by: Luka Perkov <luka@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38225 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/mvebu/patches-3.8/037-arm_mvebu_add_pcie_dt_a370.patch')
-rw-r--r-- | target/linux/mvebu/patches-3.8/037-arm_mvebu_add_pcie_dt_a370.patch | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/target/linux/mvebu/patches-3.8/037-arm_mvebu_add_pcie_dt_a370.patch b/target/linux/mvebu/patches-3.8/037-arm_mvebu_add_pcie_dt_a370.patch deleted file mode 100644 index 2cb8a17f07..0000000000 --- a/target/linux/mvebu/patches-3.8/037-arm_mvebu_add_pcie_dt_a370.patch +++ /dev/null @@ -1,40 +0,0 @@ -The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the -necessary Device Tree informations to make these interfaces availabel. - -Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> ---- - arch/arm/boot/dts/armada-370.dtsi | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/arch/arm/boot/dts/armada-370.dtsi -+++ b/arch/arm/boot/dts/armada-370.dtsi -@@ -153,5 +153,29 @@ - clocks = <&coreclk 0>; - }; - -+ pcie-controller { -+ compatible = "marvell,armada-370-xp-pcie"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0xd0040000 0x2000 -+ 0x2000 0xd0080000 0x2000>; -+ -+ pcie0@0xd0040000 { -+ reg = <0x0 0x2000>; -+ interrupts = <58>; -+ clocks = <&gateclk 5>; -+ status = "disabled"; -+ marvell,pcie-port = <0>; -+ }; -+ -+ pcie1@0xd0080000 { -+ reg = <0x2000 0x2000>; -+ interrupts = <62>; -+ clocks = <&gateclk 9>; -+ status = "disabled"; -+ marvell,pcie-port = <1>; -+ }; -+ }; - }; - }; |